JPS6151849A - Flat package type integrated circuit element - Google Patents
Flat package type integrated circuit elementInfo
- Publication number
- JPS6151849A JPS6151849A JP17373984A JP17373984A JPS6151849A JP S6151849 A JPS6151849 A JP S6151849A JP 17373984 A JP17373984 A JP 17373984A JP 17373984 A JP17373984 A JP 17373984A JP S6151849 A JPS6151849 A JP S6151849A
- Authority
- JP
- Japan
- Prior art keywords
- pwb
- leads
- positioning
- integrated circuit
- flat package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、素子リードが素子本体の水平方向に伸長して
なるフラットパッケージ形集偵回路素子（以下ＦＰ−Ｉ
Ｃと略称する）に係り、特に、印刷配線板（以下ＰＷＢ
と略称する）の導体リードへの装着の際の位置決めが確
実且つ容易になされるようにしたＦＰ−ＩＣに関する。Detailed Description of the Invention [Technical Field of the Invention] The present invention relates to a flat package type collector circuit element (hereinafter referred to as FP-I) in which element leads extend in the horizontal direction of the element body.
In particular, printed wiring boards (hereinafter referred to as PWB)
The present invention relates to an FP-IC that can be reliably and easily positioned when attached to a conductor lead.
ＦＰ−ＩＣは、所謂、デュアルインライン形のＩＣ素子
よりもそのピッチ幅を狭くして高い密度化を図ったもの
として近時多用されている。そして、そのリード形状も
、デュアルインライン形のＩＣ素子で１１ Ｐ Ｗ Ｂ
に設けられたＩＣソケット又はスルホールへ嵌入するた
めに直角形であるに対し、このＦＰ−ＩＣは、ＰＷＢに
設けられた導体リードへの素子リードの接着のために水
平形となっている。FP-ICs have been frequently used in recent years as they have a narrower pitch width and higher density than so-called dual in-line IC elements. The lead shape is also a dual in-line type IC element with 11 P W B
The FP-IC has a right-angled shape for fitting into an IC socket or through-hole provided in the PWB, whereas this FP-IC has a horizontal shape for adhering the device leads to the conductor leads provided in the PWB.
そして、ＰＷＢへの装着は、デュアルインライン形のＩ
Ｃ素子が上記スルホールへの嵌入であるに対し、このＦ
Ｐ−１０では、上記導体リードへの素子リードの接着に
よりなされる。And, the installation on the PWB is a dual inline type I
While the C element is fitted into the above-mentioned through hole, this F element
In P-10, this is done by adhering the element lead to the conductor lead.
この種ＦＰ−ＩＣとしては、素子本体の四方向に素子リ
ードが設けられたもの、素子本体の二方向に素子リード
が設けられたものが知られている。As this type of FP-IC, there are known ones in which element leads are provided in four directions of the element body, and those in which element leads are provided in two directions of the element body.
上述したＦＰ−ＩＣのＰＷＢへの装着は次ぎ′のように
して行なわれる。The above-mentioned FP-IC is attached to the PWB as follows.
即ち、ＰＷＢの各導体リードは、ＦＰ−ＩＣの各素子リ
ードよりも幅寸法を大きく形成する。そして、作業者は
ＦＰ−ＩＣの両側縁を例えば左手により把持し、素子リ
ードの接着される端部を、上記導体リード所定の位置に
配置し、この状態で右手にもった半田鏝により、上記素
子リード四隅端部夫々を、導体リード四隅端部夫々の所
定の位置に仮半田付けする。この仮半田付は後に上記素
子リードが導体リードの所定のの位置に半田付けされて
いるかを目視確認を行ない、次ぎの工程で上記半田鏝で
上記素子リード全部を導体リードに全半田付けする。そ
して、最終検査として双眼顕微鏡等にて半田付けのチェ
ックを行なう。この半田付けのチェックは半田ブリッジ
やペーストの付は過ぎ、半田不足等が生じていないかを
確認して、上記リード部を溶剤等で洗浄して上記ペース
トを除去し、全工程が終了する。That is, each conductor lead of the PWB is formed to have a larger width than each element lead of the FP-IC. Then, the operator grasps both edges of the FP-IC with, for example, his left hand, places the end to which the element lead is to be bonded at the predetermined position of the conductor lead, and in this state, uses the soldering iron held in his right hand to Each of the four corner ends of the element lead is temporarily soldered to a predetermined position of each of the four corner ends of the conductor lead. After this temporary soldering, it is visually confirmed whether the element leads are soldered to the predetermined positions of the conductor leads, and in the next step, all the element leads are completely soldered to the conductor leads using the soldering iron. Then, as a final inspection, the soldering is checked using a binocular microscope or the like. The soldering is checked to see if solder bridges or paste have been applied too much, and there is no shortage of solder, and the lead portions are cleaned with a solvent or the like to remove the paste, and the entire process is completed.
〔背景技術の問題点〕
上記のごとくのＦＰ−ＩＣでは、近時、その実装密度の
向上を図るために素子リード数を多くし、これに伴いピ
ッチ幅を狭くしたものが出現している。このため、上述
したＰＷＢへの装着作業、特に素子リードの導体リード
への位置決めは困難さが増し、熟練を要するばかりか細
心の注意と経験が必要となっていた。[Problems with Background Art] Recently, in the above-mentioned FP-ICs, in order to improve the packaging density, the number of element leads has been increased, and the pitch width has been narrowed accordingly. For this reason, the above-mentioned mounting work on the PWB, especially the positioning of the element leads to the conductor leads, has become increasingly difficult, requiring not only skill but also careful attention and experience.
本発明は上記事情に基いてなされたもので、その目的と
するところは、ＰＷＢへの装着を熟練を要さず容易に行
なうことが可能なＦＰ−ＩＣを提供することを目的とす
る。The present invention has been made based on the above-mentioned circumstances, and an object thereof is to provide an FP-IC that can be easily attached to a PWB without requiring any skill.
本発明によるＦＰ−ＩＣは、上記目的を達成するために
、ＰＷＢの導体リードとＦＰ−ＩＣの素子リードとが対
応するべく、ＰＷＢに設けた位置決め用の穴に挿入され
るように上記素子本体の下部に位置決め用のガイドを設
けたことを特徴とする。In order to achieve the above object, the FP-IC according to the present invention has a structure in which the element body is inserted into a positioning hole provided in the PWB so that the conductor leads of the PWB and the element leads of the FP-IC correspond to each other. It is characterized by a positioning guide provided at the bottom.
以下本発明に係るＦＰ−ＩＣを図面に示す実施例に従い
説明する。FP-IC according to the present invention will be explained below according to embodiments shown in the drawings.
第１図、第２図及び第３図は、本発明に係るＦＰ−ＩＣ
の第１の実施例を示しており、１は素子本体であり、２
ａ、２ｂ、２ｃ、２ｃＮ；を素子本体１の四方向の両側
縁に導出して設けられた素子リードである。この素子リ
ード２ａ、２ｂ、２ｃ。FIG. 1, FIG. 2, and FIG. 3 show an FP-IC according to the present invention.
1 is the element body, 2 is the element body, and 2 is the first embodiment.
A, 2b, 2c, 2cN; These element leads 2a, 2b, 2c.
２ｄはその形状が段差を有した水平形に形成され、その
夫々の端部は、ＰＷＢの導体リード夫々に対応して装着
されるようになっている。３は素子本体１の下部の対向
した隅に突出して設けられた位置決めガイドであり、こ
の位置決めガイド３は図示しないＰＷＢの対応する位置
決め穴に挿入されるようになっている。2d is formed in a horizontal shape with steps, and each end thereof is attached to each conductor lead of the PWB. Reference numeral 3 designates positioning guides protruding from opposite corners of the lower part of the element body 1, and the positioning guides 3 are inserted into corresponding positioning holes of a PWB (not shown).
次ぎに上記の如く構成された本実施例の作用について第
１図乃至第３図、及び第４図乃至第６図を参照して説明
する。Next, the operation of this embodiment configured as described above will be explained with reference to FIGS. 1 to 3 and 4 to 6.
即ち、第４図に示すようにＰＷＢにはその表面に第１図
乃至７ｉ３図に示した四方向形のＦＰ−ＩＣの素子リー
ド２ａ、２ｂ、２ｃ、２ｄに対応した導体リード４ａ、
４ｂ、４ｃ、 ７１．ｄが形成されている。また、容体
リード４ａ、４ｂ、４ｃ、４ｄの内側側には、ＦＰ−Ｉ
Ｃの位置決めガイド３に対応して位置決め用の穴５が設
けられている。That is, as shown in FIG. 4, the PWB has conductor leads 4a, 4a, 4a, 4a, 4a, 4a, 4a, 4b, 4a, 4b, 4a, 4b, 4b, 4b, and 4b corresponding to the element leads 2a, 2b, 2c, and 2d of the four-way FP-IC shown in FIGS.
4b, 4c, 71. d is formed. In addition, on the inside of the container leads 4a, 4b, 4c, 4d,
A positioning hole 5 is provided corresponding to the positioning guide 3 of C.
上記第４図の如くのＰＷＢに第１図乃至第３図に示した
ＦＰ−ＩＣを装着するにあたり、先ず、ＦＰ−ＩＣの位
置決めガイド３夫々をＰＷＢの位置決め用の穴５夫々に
挿入し、ＦＰ−ＩＣの素子リード２ａ、２ｂ、２ｃ、２
ｄの夫々の端部を、ＰＷＢの導１本リード４ａ、４ｂ、
４Ｇ、４６夫々の所定の位置に位置決めを行なって第５
図及び第６図に示−ツ状態に設定する。この状態で素子
リード２ａ、２ｂ、２ｃ、２ｄの夫々の端部を、ＰＷＢ
の導体リード４ａ、４ｂ、４ｃ、４ｄ夫々ニ半田付けを
する。これ以降の工程は従来と同様に検査及び洗ａ１を
経て終了となる。When mounting the FP-IC shown in FIGS. 1 to 3 on the PWB shown in FIG. 4 above, first insert the positioning guides 3 of the FP-IC into the positioning holes 5 of the PWB, FP-IC element leads 2a, 2b, 2c, 2
Connect each end of d to one PWB lead 4a, 4b,
4G and 46 are positioned at the predetermined positions, and the fifth
The state shown in FIG. 6 and FIG. 6 is set. In this state, connect each end of the element leads 2a, 2b, 2c, and 2d to the PWB.
Solder the conductor leads 4a, 4b, 4c, and 4d, respectively. The subsequent steps are completed through inspection and washing a1 as in the conventional method.
以上述べたように本実施例によれば、四方向形のＦＰ−
ＩＣの素子本体１に位置決めガイド３を設けたので、従
来の如く一方の手でＰ ＷＢへの位置決め設定を行ない
つつ他方の手で仮半田付けを行なう等の煩わしさは解消
され、位置決め工程と半田付は工程とを別々に行なうこ
とができ、各工程は夫々一方の手で行なうことか可能と
なり、位置決め及び、半田付けの仕上りの信頼性が向上
する。As described above, according to this embodiment, a four-way FP-
Since the positioning guide 3 is provided in the IC element body 1, the conventional trouble of setting the position to the PWB with one hand while performing temporary soldering with the other hand is eliminated, and the positioning process and The soldering process can be performed separately, and each process can be performed with one hand, improving the reliability of positioning and soldering finish.
次ぎに第７図及び第８図を参照して本発明の第２の実施
例について説明する。本実施例は素子本体６の二方向の
両側縁に素子リード７ａ、７ｂが導出して設けられた二
方向形のＦＰ−ＩＣに適用し、その素子本体６の下部の
中央に２個の位置決めガイド８を設けた構成としている
。この構成でも、図示しないＰＷＢに、位置決めガイド
８に対応して位置決め用の穴を設けることにより、上記
四方向形のＦＰ−１，Ｃに適応した場合と同作な作用効
果を得ることができる。Next, a second embodiment of the present invention will be described with reference to FIGS. 7 and 8. This embodiment is applied to a two-way type FP-IC in which element leads 7a and 7b are led out from both sides of the element body 6 in two directions, and two positioning leads are placed at the center of the lower part of the element body 6. A guide 8 is provided. Even in this configuration, by providing a positioning hole corresponding to the positioning guide 8 in the PWB (not shown), it is possible to obtain the same effect as when applied to the above-mentioned four-way type FP-1 and C. .
次ぎに第１図乃至第３図と同一部分には同一符号を付し
た第９図及び第１０図を参照して本発明の第３の実施例
を説明する。本実施例では四方向形のＦＰ−ＩＣの素子
本体１の下部の中央部に一個の位置決めガイド９を設け
た構成としている。Next, a third embodiment of the present invention will be described with reference to FIGS. 9 and 10, in which the same parts as in FIGS. 1 to 3 are given the same reference numerals. In this embodiment, one positioning guide 9 is provided at the center of the lower part of the element body 1 of the four-way FP-IC.
第１１図及び第１２図は第７図及び第８図と同一部分に
は同一符号を付した本発明の第４の実施例を示しており
、二方向形のＦＰ−ＩＣの素子本体６の下ｎｌｌの中央
部に一周の位置決めガイド１０を設けた（１」１成と゛
している。11 and 12 show a fourth embodiment of the present invention, in which the same parts as in FIGS. 7 and 8 are denoted by the same reference numerals. A one-round positioning guide 10 is provided in the center of the lower nll (1" in 1 configuration).
上記第３．第４の実施例の構成でも、図示しないＰＷＢ
に、位置決めガイド９，１６に対応して位置決め用の穴
を設けることにより、上記第１゜第２の実施例に適応し
た場合と同様な作用効果を得ることができる。3 above. Even in the configuration of the fourth embodiment, the PWB (not shown)
By providing positioning holes corresponding to the positioning guides 9 and 16, the same effects as in the first and second embodiments can be obtained.
次ぎに第１図乃至第３図と同一部分には同一符号を付し
た第１３図及び第１４図を参照して本発明の第５の実施
例を説明する。本実施例では四方向形のＦＰ−ＩＣの素
子本体１の下部の対向した隅に突出して設けられる位置
決めガイド１１を段差部を有した構成としたことを特徴
としている。Next, a fifth embodiment of the present invention will be described with reference to FIGS. 13 and 14, in which the same parts as in FIGS. 1 to 3 are given the same reference numerals. This embodiment is characterized in that the positioning guides 11 protruding from opposite corners of the lower part of the element body 1 of the four-directional FP-IC are configured to have stepped portions.
この位置決めガイド１１の段差部は、素子本体１の根元
部を大径とし、先端部を小径としている。The stepped portion of the positioning guide 11 has a large diameter at the base of the element body 1 and a small diameter at the tip.
上記の如く構成した第５の実施例によれば、図示しない
ＰＷＢへの装着後において、ＰＷＢと索子本体１との間
に隙間が形成されるので、溶剤が良好に流入し、フラッ
クスの洗浄が容易になされる。このため、半田付は後に
洗浄を要する高精度印刷ユニットに好適となる。According to the fifth embodiment configured as described above, a gap is formed between the PWB and the cord main body 1 after it is attached to the PWB (not shown), so that the solvent can flow in well and the flux can be cleaned. is easily done. This makes soldering suitable for high-precision printing units that require subsequent cleaning.
本発明は上記上記実施例に限定されるものではなく、例
えば、位置決めガイドの形状は、ＦＰ−ＩＣ及びＰＷＢ
等に応じて円柱状、角柱状等のい−ずれの形状を適応し
てもよく、この他に本発明の要旨を逸脱しない範囲で種
々変形して実施可能である。The present invention is not limited to the above-mentioned embodiments. For example, the shape of the positioning guide may be different from that of FP-IC and PWB.
Any shape such as a columnar shape or a prismatic shape may be applied depending on the purpose of the present invention.
以上述べたように本発明によれば、ＰＷＢの導体リード
とＦＰ−ＩＣの素子リードとが対応するべく、ＰＷＢに
設けた位置決め用の穴にＩＩＩＩｉ人されるように素子
本体の下部に位置決め用のガイドを設けたので、ＰＷＢ
への装着を熟練を要さず容易に行なうことが可能なＦＰ
−ＩＣを提供することができる。As described above, according to the present invention, in order that the conductor leads of the PWB and the element leads of the FP-IC correspond to each other, a positioning hole is provided at the bottom of the element body so that the conductor leads of the PWB and the element leads of the FP-IC are aligned with each other in the positioning holes provided in the PWB. Since we have set up a guide for PWB
FP that can be easily installed without requiring any skill.
-Can provide an IC.
第１図乃至第３図は夫々本発明によるＦＰ−ＩＣの第１
の実施例を示しており第１図は平面図、第２図は側面図
、第３図は正面図、第４図乃至第６図は夫々同実施例の
作用を説明するためのものであって四方向形のＦＰ−Ｉ
ＣとＰＷＢとの装着関係を示し第４図はＰＷＢの平面図
、第５図は四方向形のＦＰ−ＩＣがＰＷＢに装着されて
いる状態を示す平面図、第６図は第５図の正面図、第７
図及び第８図は夫々本発明を二方向形のＦＰ−ＩＣに適
応した第２の実施例を示すもので第７図は平面図、第８
図は正面図、第９図及び第１０図は夫々本発明を四方向
形のＦＰ−ＩＣに適応した第３の実施例庖゛示ずもので
第９図は平面図、第１０図は正面図、第１１図及び第１
２図は夫々本発明を二方向形のＦＰ−ＩＣに適応した第
４の実施例を示すもので第１１図は平面図、第１２図は
正面図、第１３図及び第１４図は夫々本発明を四方向形
のＦＰ−ＩＣに適応した第５の実施例を示ずもので第１
３図は平面図、第１４図は正面図である。
１．６・・・索子本体、２ａ、２ｂ、２ｃ、２ｄ。
”／ａ、７ｂ・・・素子リード、３，８，９，１０．１
１・・・位置決めガイド、４ａ、４ｂ、４ｃ、４ｄ・・
・導体リード、５・・・位置決め用の穴。
第１図
２ａ 第２図
第３図
第７図
第８図
第９図
７ｔ） −ｚ２第１０図
第１２図
第１３図
ａ
第１４図FIGS. 1 to 3 each show a first FP-IC according to the present invention.
Fig. 1 is a plan view, Fig. 2 is a side view, Fig. 3 is a front view, and Figs. 4 to 6 are for explaining the operation of the embodiment. Four-way FP-I
4 is a plan view of the PWB, FIG. 5 is a plan view showing the state in which a four-way FP-IC is attached to the PWB, and FIG. 6 is a plan view of the PWB. Front view, No. 7
8 and 8 respectively show a second embodiment in which the present invention is applied to a bidirectional FP-IC, and FIG. 7 is a plan view, and FIG.
The figure is a front view, and FIGS. 9 and 10 respectively show a third embodiment in which the present invention is applied to a four-way FP-IC. FIG. 9 is a plan view, and FIG. 10 is a front view. Fig. 11 and Fig. 1
Fig. 2 shows a fourth embodiment in which the present invention is applied to a two-way FP-IC, Fig. 11 is a plan view, Fig. 12 is a front view, and Figs. 13 and 14 are main views, respectively. The first embodiment does not show the fifth embodiment in which the invention is applied to a four-way FP-IC.
3 is a plan view, and FIG. 14 is a front view. 1.6... Chord body, 2a, 2b, 2c, 2d. ”/a, 7b...Element lead, 3, 8, 9, 10.1
1...Positioning guide, 4a, 4b, 4c, 4d...
・Conductor lead, 5... Hole for positioning. Figure 1 2a Figure 2 Figure 3 Figure 7 Figure 8 Figure 9 Figure 7t) -z2 Figure 10 Figure 12 Figure 13a Figure 14
Claims (1)
と略平行となるように形成された素子リードが素子本体
の四方向又は二方向に設けられてなるフラットパッケー
ジ形集積回路素子において、上記導体リードと素子リー
ドとが対応するべく、上記印刷配線板に設けた位置決め
用の穴に挿入されるように上記素子本体の下部に位置決
め用のガイドを設けたことを特徴とするフラットパッケ
ージ形集積回路素子。In a flat package integrated circuit element in which element leads are provided in four or two directions of the element body, the element leads are formed substantially parallel to a printed wiring board on which conductor leads are provided in a predetermined pattern, A flat package integrated circuit characterized in that a positioning guide is provided at the bottom of the element main body so as to be inserted into a positioning hole provided in the printed wiring board so that the leads and the element leads correspond to each other. element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17373984A JPS6151849A (en) | 1984-08-21 | 1984-08-21 | Flat package type integrated circuit element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17373984A JPS6151849A (en) | 1984-08-21 | 1984-08-21 | Flat package type integrated circuit element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6151849A true JPS6151849A (en) | 1986-03-14 |
Family
ID=15966226
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17373984A Pending JPS6151849A (en) | 1984-08-21 | 1984-08-21 | Flat package type integrated circuit element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6151849A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02142538U (en) * | 1989-04-28 | 1990-12-04 | ||
| JPH03201945A (en) * | 1989-04-06 | 1991-09-03 | Unilever Nv | Production of tea article |
-
1984
- 1984-08-21 JP JP17373984A patent/JPS6151849A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03201945A (en) * | 1989-04-06 | 1991-09-03 | Unilever Nv | Production of tea article |
| JPH0551260B2 (en) * | 1989-04-06 | 1993-08-02 | Unilever Nv | |
| JPH02142538U (en) * | 1989-04-28 | 1990-12-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH02100392A (en) | Circuit board and soldering method | |
| JPH03120789A (en) | Method for fitting electronic component to printed wiring board | |
| JPS6151849A (en) | Flat package type integrated circuit element | |
| JPH0823147A (en) | Connecting structure for circuit board | |
| JPH0487393A (en) | Printed board for surface mounting | |
| JPS60160641A (en) | Mounting of leadless package ic for board | |
| JPS61160992A (en) | Printed wiring board | |
| JP2526170Y2 (en) | Electronic circuit board | |
| JP2938010B1 (en) | Semiconductor device mounting positioning jig and semiconductor device mounting positioning method | |
| JPS62243347A (en) | Face-bonding enabled electronic component | |
| KR0141229B1 (en) | Local hardening method for package soldering | |
| JPH04105390A (en) | Substrate mechanism | |
| JPS5853890A (en) | Method of soldering electronic part | |
| JPS58221667A (en) | Soldering method of chip parts | |
| JPH04243187A (en) | Printed circuit board | |
| JPH04789A (en) | Pattern disposition and connecting structure for printed circuit board | |
| JPH0546066U (en) | Printed circuit board soldering land | |
| JPH08102596A (en) | Method for mounting surface-mounting parts | |
| IE920421A1 (en) | Added wiring on printed circuit boards | |
| JPS6236300Y2 (en) | ||
| JPS6259461B2 (en) | ||
| JPH02241084A (en) | Electronic part mounting process and electronic part | |
| JPH08111569A (en) | Printed board capable of coping with electroplating | |
| JPH04267088A (en) | Soldering method for connecting connector to printed board | |
| JPH06112635A (en) | Wiring board |