JPS6145851B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a capacitor manufacturing method.

2. Description of the Related Art Recently, with the miniaturization of integrated circuits and the like, electronic components are required to be smaller and have better performance. Capacitors are no exception. Generally, a capacitor is a stack of dielectrics and electrodes.
The best-performing small capacitor is known as a multilayer chip capacitor. A multilayer chip capacitor is a device in which a large number of thin dielectrics and metal thin film electrodes such as silver are alternately laminated, fired and integrated, and external terminals are baked on both ends of the chip and electrically connected to the positive and negative electrodes. However, manufacturing such small capacitors requires numerous steps;
Required a firing process.

The applicant previously filed Utility Application No. 53-95683,
No. 97941, No. 53-97942, Patent Application No. 156249-1983,
No. 53-159364, No. 54-5589, etc., provided multilayer chip capacitors using a method different from conventional methods. That is, the manufacturing methods described in these applications include a printing method or a sheet method (a method in which a paste is extruded into a film shape) by kneading powders of alumina, barium titanate, titanium oxide, etc.
A sheet-like dielectric material with a thickness of several tens to several hundred microns is made using the above method, and a paste of metal powder such as Ag-Pd or Pd is kneaded on top of the dielectric material to form a desired electrode pattern to a thickness of several tens to several hundred microns. Then, in the same manner, alternately print a dielectric layer and an electrode pattern,
Finally, a predetermined firing process is performed. Although this method significantly simplifies the process, allows mass production due to the advantages of the printing method, and achieves thinner products, there is still a considerable thickness of each layer, which limits the capacity. However, it requires an additional firing process.

The present invention provides a method for achieving large capacitance or small size capacitors by ion plating without the need for firing, thus overcoming the deficiencies of the prior art. Briefly, the present invention involves depositing conductive metals such as silver, copper, palladium, gold, aluminum, etc. onto a ceramic substrate by ion plating, and depositing BaTiO ₃ , TiO ₂ , glass, or plastic on top of the evaporated conductive metals. , and other dielectric materials are similarly deposited by the ion plating method, and the same steps are repeated to form a capacitor. The time required for ion plating is only about 2 to 3 minutes for 1μ. The capacitor manufactured by this method does not require firing and can be used as a capacitor as is. The capacitor of the present invention is mechanically strong due to the strong interlayer bonding characteristic of ion plating. For example, peel strength can be measured using the sputter method.
It weighs about 200 g compared to 10 to 20 g, and has sufficient solder resistance. A film deposited by the ion plating method becomes a uniform pinhole-free film at a thickness of 0.5 microns, and a thickness of 1 micron provides sufficient strength for most uses. Therefore, it is possible to provide a much larger capacitance than conventional multilayer chip capacitors produced by printing methods or the like. However, the present invention does not necessarily require multilayer lamination. In addition, there is no need for a time-consuming firing process, and there is no need to manufacture the dielectric part and the conductor part using completely separate methods, which has the effect of streamlining, labor saving, reducing material costs, and improving properties. can be achieved. Further, according to the present invention, the lead wire portion can be reduced, and molding, soldering, component assembly, etc. can be omitted or simplified.

The ion plating method has been actively developed recently, so a detailed explanation will be omitted, but its principle is based on a relatively high vacuum (10 ^-3 to 10 ^{- 5} Torr) Among other things, metal vapor from a molten metal evaporation source is heated by direct current or high frequency,
Or ionization by an electric field using a combination of these,
This is accelerated by a direct current electric field to be accelerated and deposited onto the substrate surface. Since the metal ions impact the deposition surface and firmly adhere thereto, the metal film has sufficiently high mechanical strength even with a film thickness of about 0.5 to 1 μm. It has been found that the materials that can be deposited by the ion plating method are not limited to metals, but also include plastics (polyester, polyimide, etc.), dielectrics, resistors, composite metal oxides such as ferrite, etc. The ability to choose from such a wide range of materials provides significant benefits. For example, conventional capacitors required a firing process, which limited the types of electrode materials available.
In the present invention, inexpensive aluminum (including alloys), copper, etc. can be used, and silver, platinum, platinum-palladium, tin-lead alloy, tin, vanadium oxide, magnetite, etc. can also be used.

The invention will now be explained in detail with reference to examples. The drawings show each step of the manufacturing process of a multilayer chip capacitor according to an embodiment of the present invention, where A is a plan view and B is a horizontal cross-sectional view of A. Although the thickness of Figure B is exaggerated for ease of viewing, each layer has a thickness of only 0.5 to several microns.

FIG. 1 shows a somewhat thick ceramic substrate 1 made of alumina or the like. As shown in FIG. 2, an aluminum electrode (first electrode) 2 is ion plated on the substrate 1 in contact with the right side of the substrate 1 through a mask M1. Next, as shown in FIG. 3, TiBaO ₃ (dielectric layer) 3 is ion-plated over the entire surface of the substrate 1 through a mask M2, leaving the right side of the first electrode 2 intact. Moving on to FIG. 4, an aluminum electrode (second electrode) 4 is ion plated in contact with the left side of the substrate 1 through a mask M3, and then, as shown in FIG. 5, a part of the second electrode 4 is left and the right side of the first electrode is With the .
_PaTiO3 is ion plated. Finally, as shown in FIG.
The ion plate is placed so as to overlap with electrode 2. As a result, the first electrode and the second electrode are stacked with the dielectric layer interposed therebetween, and the first electrodes are electrically connected to each other. The right end of the first electrode is exposed on the right side of the substrate 1, and the left end of the second electrode is exposed on the left side of the substrate 1. In this way, the external terminals 7 and 8 can be formed only by the ion plating method. If necessary, additional dielectric material can be deposited according to the process of FIG. 5 to protect the surface. A ceramic substrate was attached to a substrate holder, Al and BaTiO ₃ sources were placed in positions opposite to this, a high frequency coil was placed between the substrate and the source, and -500V was applied between the source and the substrate. The source was bombarded with an electron beam. Conditions are Ar pressure 10 ^-4
Thor, Al on board with 13.56MHz RF power 200W,
_BaTiO2 was ion plated alternately. Several layers of ion plate were prepared so that each layer had a thickness of about 1 μm.
Note that the top layer was BaTiO ₃ . For control, sputtering method (bombarding targets Al and BaTiO ₃ with Ar ions and depositing the released molecules or atoms on the substrate)
Several layers were formed so that each layer had a thickness of about 1 μm. The end surfaces of the rods were pasted onto these laminates using epoxy resin as an adhesive according to the tensile method described in section 212 [] (a) of "Thin Film Handbook" published by Ohmsha, and were sufficiently heat-cured. After that, I pulled the rod. When the tensile force is F and the area of the laminate is S, f=F/S is approximately 200 for the ion plate.
g, and the spatsuta one weighed about 15 g. As described above, according to the method of the present invention, a capacitor with strong interlayer coupling can be obtained.

As described above, since the capacitor of the present invention is manufactured only by the ion plating method, the process is greatly simplified. Furthermore, although the above embodiment has been described with reference to a single device, in reality, a wide substrate 1 is used, a large number of devices are manufactured thereon according to the above steps, and finally the substrate is cut into the shape of a single device. is more common. As described above, the present invention is suitable for mass production, and since the thickness of each layer can be easily controlled, process control is also easy. The manufactured capacitors have constant characteristics, high interlayer adhesion, and a thin overall thickness, allowing for miniaturization. Furthermore, since the external terminals are also formed in the same process, there is no need to separately bake the external terminals. However, if necessary, it is also possible to adopt a separate baking method. In this embodiment, an example in which three electrodes are formed has been described, but it is also within the scope of the present invention to repeat the steps shown in FIGS. 1 to 6 to obtain a predetermined number of laminated layers, if necessary.

[Brief explanation of the drawing]

Figure 1 shows the first step in the manufacturing process of the capacitor of the present invention.
Fig. 2 also shows the second stage, A is a plan view, B is a sectional view,
Figure 3 shows the third stage, A is a plan view, B is a sectional view, and Figure 4 shows the fourth stage, A is a plan view,
B is a cross-sectional view, FIG. 5 is a fifth stage, A is a plan view, B is a cross-sectional view, and FIG. 6 is a sixth stage, A is a plan view, and B is a cross-sectional view. The main members in the figure are as follows. 1... Substrate, 2, 6... First electrode, 3, 5...
Dielectric, 4... second electrode, 7, 8... external terminal.

Claims (1)

[Claims] 1. On a ceramic substrate, an electrode layer that does not reach the other end of the substrate is ion plated to one end of the substrate,
A dielectric layer covering at least the other end of the electrode layer is ion plated thereon, leaving the electrode layer portion at one end, and extending to the other end of the substrate while leaving the one end on the dielectric layer. ion plate the extending electrode layer, and ion plate a dielectric layer covering at least one end of the electrode layer, leaving the other end of the electrode layer, but not extending to the one end of the substrate; A capacitor manufacturing method characterized by repeating the process. 2. The capacitor according to claim 1, wherein each layer has a thickness of 1 μm or less. 3. The capacitor according to claim 1 or 2, wherein the dielectric material is ion plated with the ends of the electrodes exposed, and these exposed portions constitute external terminals. 4 Form a first electrode by ion-plating a metal such as aluminum on a ceramic substrate, and then
A dielectric layer is formed by depositing a dielectric material such as BaTiO ₃ , and then a second electrode is formed by ion-plating a metal such as aluminum in an insulating relationship with the first electrode. and the first electrode, the second
A method for manufacturing a capacitor, characterized in that electrodes are repeatedly ion plated. 5. The method of manufacturing a capacitor according to claim 4, wherein the ion plate of each layer is formed until a thickness of 1 μm or less is obtained. 6. A patent in which the dielectric layer is ion-plated so that the first electrode and the second electrode are partially exposed at specific locations, so that the first electrode and the second electrode constitute external electrodes at the specific locations. A method for manufacturing a capacitor according to claim 4 or 5.