JPH1083937A - Layered electronic component - Google Patents
Layered electronic componentInfo
- Publication number
- JPH1083937A JPH1083937A JP8236292A JP23629296A JPH1083937A JP H1083937 A JPH1083937 A JP H1083937A JP 8236292 A JP8236292 A JP 8236292A JP 23629296 A JP23629296 A JP 23629296A JP H1083937 A JPH1083937 A JP H1083937A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- capacitance
- capacitor
- electronic component
- capacitance correction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、積層型電子部品、
特に、容量等の特性の補正用電極を備えたコンデンサや
バリスタ等の積層型電子部品に関する。The present invention relates to a multilayer electronic component,
In particular, the present invention relates to a multilayer electronic component such as a capacitor or a varistor having an electrode for correcting characteristics such as capacitance.
【0002】[0002]
【従来の技術】例えば、狭偏差の静電容量が要求される
積層型コンデンサの構造としては、図5に示すものが知
られている。この積層型コンデンサ21は内部電極2
3,24と誘電体22を積み重ねて積層体を構成すると
共に、内部電極23,24の最外層部に容量補正用電極
25を配置したものである。容量補正用電極25の面積
は内部電極23,24の面積より小さく設定されてい
る。この内部電極23と24間で静電容量が形成される
と共に、内部電極23と容量補正用電極25間で微調整
のための静電容量が形成される。2. Description of the Related Art For example, a structure shown in FIG. 5 is known as a structure of a multilayer capacitor that requires a narrow deviation capacitance. This multilayer capacitor 21 has internal electrodes 2
A stacked body is formed by stacking the dielectrics 22, 24 and the dielectric 22, and a capacitance correction electrode 25 is arranged on the outermost layer of the internal electrodes 23, 24. The area of the capacitance correction electrode 25 is set smaller than the areas of the internal electrodes 23 and 24. A capacitance is formed between the internal electrodes 23 and 24, and a capacitance for fine adjustment is formed between the internal electrode 23 and the capacitance correction electrode 25.
【0003】[0003]
【発明が解決しようとする課題】しかしながら、従来の
積層型コンデンサ21にあっては、内部電極23,24
と誘電体22と容量補正用電極25を積み重ねて一体的
に焼成する際、容量補正用電極25と誘電体22との間
にデラミネーション26が発生することがあった。容量
補正用電極25が最外層部に配置されていること、及び
容量補正用電極25と誘電体22の熱収縮率の差が大き
いことのために、熱ストレスが容量補正用電極25に集
中するからと考えられる。However, in the conventional multilayer capacitor 21, the internal electrodes 23 and 24 are not provided.
When laminating the dielectric material 22 and the capacitance correction electrode 25 and firing them integrally, the delamination 26 may be generated between the capacitance correction electrode 25 and the dielectric 22. The thermal stress is concentrated on the capacitance correcting electrode 25 because the capacitance correcting electrode 25 is arranged in the outermost layer and the difference in thermal shrinkage between the capacitance correcting electrode 25 and the dielectric 22 is large. It is thought to be from.
【0004】また、この積層型コンデンサ21を回路基
板等に半田付けする際にも、容量補正用電極25が配置
されている側の表面部(図5の上面部)と反対側の表面
部(図5の下面部)の熱ストレスの差によって積層型コ
ンデンサ21にサーマルクラックが生じることがあっ
た。そこで、本発明の目的は、耐熱性に優れた積層型電
子部品を提供することにある。When the multilayer capacitor 21 is soldered to a circuit board or the like, a surface portion opposite to the surface portion on which the capacitance correction electrode 25 is disposed (the upper surface portion in FIG. 5) (FIG. 5). A thermal crack may occur in the multilayer capacitor 21 due to a difference in thermal stress in the lower surface portion of FIG. 5). Therefore, an object of the present invention is to provide a multilayer electronic component having excellent heat resistance.
【0005】[0005]
【課題を解決するための手段】以上の目的を達成するた
め、本発明に係る積層型電子部品は、容量補正用電極
が、積層体の積層方向の中央部に配置されていることを
特徴とする。In order to achieve the above object, a laminated electronic component according to the present invention is characterized in that the capacitance correcting electrode is arranged at the center of the laminated body in the laminating direction. I do.
【0006】[0006]
【作用】以上の構成により、容量補正用電極と誘電体の
熱収縮率の差が緩和され、容量補正用電極への熱ストレ
ス集中が阻止される。According to the above arrangement, the difference in the thermal contraction rate between the capacitance correcting electrode and the dielectric is reduced, and the concentration of thermal stress on the capacitance correcting electrode is prevented.
【0007】[0007]
【発明の実施の形態】以下、本発明に係る積層型電子部
品の一実施形態について添付図面を参照して説明する。
本実施形態では、積層型コンデンサを例にして説明す
る。図1に示すように、積層型コンデンサ1は、内部電
極3,4をそれぞれ表面に設けた誘電体シート2と、容
量補正用電極5を表面に設けた誘電体シート2と、保護
層用誘電体シート2等にて構成されている。誘電体シー
ト2の材料としては、エポキシ等の樹脂あるいはセラミ
ック誘電体等が用いられる。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of a multilayer electronic component according to the present invention will be described with reference to the accompanying drawings.
In the present embodiment, a multilayer capacitor will be described as an example. As shown in FIG. 1, the multilayer capacitor 1 includes a dielectric sheet 2 having internal electrodes 3 and 4 provided on the surface thereof, a dielectric sheet 2 having capacitance correcting electrodes 5 provided on the surface, and a dielectric layer 2 having a protective layer. It is composed of a body sheet 2 and the like. As a material of the dielectric sheet 2, a resin such as epoxy or a ceramic dielectric is used.
【0008】内部電極3は、誘電体シート2の表面に広
面積に形成され、その引出し部3aがシート2の右辺に
露出している。同様にして、内部電極4は、誘電体シー
ト2の表面に広面積に形成され、その引出し部4aがシ
ート2の左辺に露出している。容量補正用電極5は、誘
電体シート2の表面の略左半分に形成され、その引出し
部5aがシート2の左辺に露出している。容量補正用電
極5の面積は、内部電極4の面積より小さく設定されて
いる。電極3〜5はAg−Pd,Ag,Pd,Ni,C
u等の材料からなり、スパッタリング法、真空蒸着法、
印刷法等の任意の方法により形成される。The internal electrode 3 is formed in a wide area on the surface of the dielectric sheet 2, and a lead portion 3 a thereof is exposed on the right side of the sheet 2. Similarly, the internal electrode 4 is formed in a wide area on the surface of the dielectric sheet 2, and the lead portion 4 a is exposed on the left side of the sheet 2. The capacitance correction electrode 5 is formed on substantially the left half of the surface of the dielectric sheet 2, and a lead portion 5 a thereof is exposed on the left side of the sheet 2. The area of the capacitance correction electrode 5 is set smaller than the area of the internal electrode 4. The electrodes 3 to 5 are made of Ag-Pd, Ag, Pd, Ni, C
u, etc., sputtering method, vacuum evaporation method,
It is formed by any method such as a printing method.
【0009】各誘電体シート2は、図1に示すように積
み重ねられた後、一体的に焼成され、積層体とされる。
図2及び図3に示すように、積層体の左右の側面部には
外部電極10,11が形成されている。外部電極10,
11はスパッタリング法、真空蒸着法、塗布法等の任意
の方法により形成され、Ag−Pd,Ag,Pd,N
i,Cu等の材料からなる。外部電極10は、内部電極
4の引出し部4a及び容量補正用電極5の引出し部5a
に電気的に接続され、外部電極11は内部電極3の引出
し部3aに電気的に接続されている。After the dielectric sheets 2 are stacked as shown in FIG. 1, they are integrally fired to form a laminate.
As shown in FIGS. 2 and 3, external electrodes 10 and 11 are formed on the left and right side surfaces of the laminate. External electrode 10,
11 is formed by an arbitrary method such as a sputtering method, a vacuum evaporation method, a coating method, and the like, and is made of Ag-Pd, Ag, Pd,
It is made of a material such as i or Cu. The external electrode 10 is provided with a lead portion 4 a of the internal electrode 4 and a lead portion 5 a of the capacitance correction electrode 5.
The external electrode 11 is electrically connected to the lead portion 3 a of the internal electrode 3.
【0010】こうして得られた積層型コンデンサ1は、
内部電極3と4の間で主たる静電容量が形成され、内部
電極3と容量補正用電極5の間で微調整のための静電容
量が形成される。容量補正用電極5はコンデンサ1の厚
み方向(積層体の積層方向)の中央部に配置されてお
り、コンデンサ1は構造的に厚み方向に上下対称になっ
ている。すなわち、熱収縮作用上バランスのとれた、熱
ストレスに強い構造になっている。従って、内部電極
3,4と誘電体シート2と容量補正用電極5を積み重ね
て一体的に焼成する際、容量補正用電極5への熱ストレ
ス集中が緩和され、容量補正用電極5と誘電体2との間
のデラミネーションを防止することができる。さらに、
このコンデンサ1を回路基板等に半田付けする際にも、
コンデンサ1にサーマルクラック等の発生が起きない。The multilayer capacitor 1 thus obtained is
A main capacitance is formed between the internal electrodes 3 and 4, and a capacitance for fine adjustment is formed between the internal electrode 3 and the capacitance correction electrode 5. The capacitance correcting electrode 5 is arranged at the center in the thickness direction of the capacitor 1 (the laminating direction of the laminate), and the capacitor 1 is structurally vertically symmetrical in the thickness direction. That is, the structure is well balanced with respect to the heat shrinkage action and is resistant to heat stress. Therefore, when the internal electrodes 3 and 4, the dielectric sheet 2 and the capacitance correcting electrode 5 are stacked and fired integrally, the concentration of thermal stress on the capacitance correcting electrode 5 is reduced, and the capacitance correcting electrode 5 and the dielectric 2 can be prevented from delamination. further,
When soldering this capacitor 1 to a circuit board or the like,
No thermal crack or the like occurs in the capacitor 1.
【0011】[他の実施形態]なお、本発明に係る積層
型電子部品は前記実施形態に限定するものではなく、そ
の要旨の範囲内で種々に変更することができる。容量補
正用電極5は必ずしも正確に、積層体の積層方向の中央
部に配置されなくてもよい。また、図4に示すように、
容量補正用電極5と同一層(あるいは隣接する層)に、
容量補正用電極5に並設するようにダミー電極6を配置
し、容量補正用電極5への熱ストレス集中をさらに緩和
してもよい。この場合、ダミー電極6は外部電極11に
電気的に接続されている。[Other Embodiments] The multilayer electronic component according to the present invention is not limited to the above-described embodiment, but can be variously modified within the scope of the invention. The capacitance correcting electrode 5 does not necessarily have to be arranged exactly at the center of the stack in the stacking direction. Also, as shown in FIG.
In the same layer (or an adjacent layer) as the capacitance correction electrode 5,
The dummy electrodes 6 may be arranged so as to be juxtaposed to the capacitance correction electrodes 5 to further reduce the concentration of thermal stress on the capacitance correction electrodes 5. In this case, the dummy electrode 6 is electrically connected to the external electrode 11.
【0012】また、電子部品としては、積層型コンデン
サの他に、積層型バリスタ等であってもよい。さらに、
前記実施形態は、シートを積み重ねた後、一体的に焼成
するものであるが、必ずしもこれに限定されない。例え
ば、印刷等の方法により、ペースト状の絶縁体材料や導
電体材料を順に塗布、乾燥して重ね塗りすることによっ
て、積層構造を有する電子部品を得てもよい。The electronic component may be a multilayer varistor or the like in addition to the multilayer capacitor. further,
In the above embodiment, the sheets are stacked and then integrally fired, but the invention is not necessarily limited to this. For example, an electronic component having a laminated structure may be obtained by sequentially applying a paste-like insulator material or a conductor material by a method such as printing, drying, and applying the paste again.
【0013】[0013]
【発明の効果】以上の説明で明らかなように、本発明に
よれば、容量補正用電極を積層体の積層方向の中央部に
配置したので、焼成過程における容量補正用電極への熱
ストレス集中が緩和され、容量補正用電極と絶縁体との
間のデラミネーションを防止することができる。さら
に、積層型電子部品を回路基板等に半田付けする際に
も、積層型電子部品にサーマルクラック等が発生するの
を避けることができる。As is apparent from the above description, according to the present invention, since the capacitance correcting electrode is disposed at the center of the laminate in the stacking direction, the heat stress concentration on the capacitance correcting electrode during the firing process. Is reduced, and delamination between the capacitance correcting electrode and the insulator can be prevented. Further, even when the multilayer electronic component is soldered to a circuit board or the like, it is possible to avoid a thermal crack or the like from occurring in the multilayer electronic component.
【図1】本発明に係る積層型電子部品の一実施形態を示
す分解斜視図。FIG. 1 is an exploded perspective view showing an embodiment of a multilayer electronic component according to the present invention.
【図2】図1に示した積層型電子部品の外観を示す斜視
図。FIG. 2 is an exemplary perspective view showing the appearance of the multilayer electronic component shown in FIG. 1;
【図3】図2のIII−III断面図。FIG. 3 is a sectional view taken along the line III-III of FIG. 2;
【図4】他の実施形態を示す断面図。FIG. 4 is a sectional view showing another embodiment.
【図5】従来例を示す断面図。FIG. 5 is a sectional view showing a conventional example.
1…積層型コンデンサ 2…誘電体シート 3,4…内部電極 5…容量補正用電極 DESCRIPTION OF SYMBOLS 1 ... Multilayer capacitor 2 ... Dielectric sheet 3, 4 ... Internal electrode 5 ... Capacitance correction electrode
Claims (1)
を構成した積層型電子部品において、 容量補正用電極が、前記積層体の積層方向の中央部に配
置されていることを特徴とする積層型電子部品。1. A multilayer electronic component in which an internal electrode and an insulator are stacked to form a multilayer body, wherein a capacitance correcting electrode is arranged at a central portion of the multilayer body in the stacking direction. Laminated electronic components.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8236292A JPH1083937A (en) | 1996-09-06 | 1996-09-06 | Layered electronic component |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8236292A JPH1083937A (en) | 1996-09-06 | 1996-09-06 | Layered electronic component |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH1083937A true JPH1083937A (en) | 1998-03-31 |
Family
ID=16998637
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8236292A Pending JPH1083937A (en) | 1996-09-06 | 1996-09-06 | Layered electronic component |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH1083937A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008166511A (en) * | 2006-12-28 | 2008-07-17 | Tdk Corp | Ceramic varistor, semiconductor built-in module, and method of manufacturing these |
JP2011040581A (en) * | 2009-08-11 | 2011-02-24 | Sony Corp | Capacitance element and resonance circuit |
-
1996
- 1996-09-06 JP JP8236292A patent/JPH1083937A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008166511A (en) * | 2006-12-28 | 2008-07-17 | Tdk Corp | Ceramic varistor, semiconductor built-in module, and method of manufacturing these |
JP2011040581A (en) * | 2009-08-11 | 2011-02-24 | Sony Corp | Capacitance element and resonance circuit |
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