JPS5866321A - Method of producing laminated ceramic condenser - Google Patents

Method of producing laminated ceramic condenser

Info

Publication number
JPS5866321A
JPS5866321A JP16518781A JP16518781A JPS5866321A JP S5866321 A JPS5866321 A JP S5866321A JP 16518781 A JP16518781 A JP 16518781A JP 16518781 A JP16518781 A JP 16518781A JP S5866321 A JPS5866321 A JP S5866321A
Authority
JP
Japan
Prior art keywords
silicone
multilayer ceramic
silver
electrodes
ceramic capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16518781A
Other languages
Japanese (ja)
Other versions
JPH0113206B2 (en
Inventor
板倉 鉉
黒田 孝之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP16518781A priority Critical patent/JPS5866321A/en
Publication of JPS5866321A publication Critical patent/JPS5866321A/en
Publication of JPH0113206B2 publication Critical patent/JPH0113206B2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明はシリコーン被覆を有し、両端部に銀または銀−
パラジウム合金、ニッケル及びスズ−鉛合金からなる電
極部を有する耐湿性の良好な積層セラミックコンデンサ
の製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention has a silicone coating and silver or silver-coated ends.
The present invention relates to a method for manufacturing a multilayer ceramic capacitor with good moisture resistance and having electrode parts made of palladium alloy, nickel, and tin-lead alloy.

2/、−・・ 従来より、積層セラミックコンデンサは電子回路の小型
化と相まって小型大容量化が図られてきており、現在ノ
・イブリッドIC用及びプリント基板直付は用のチップ
部品としてその需要は急増している。
2/, -... Multilayer ceramic capacitors have traditionally been made smaller and larger in capacity in conjunction with the miniaturization of electronic circuits, and are currently in demand as chip components for hybrid ICs and for direct mounting on printed circuit boards. is rapidly increasing.

この積層セラミックコンデンサは、一般にセラミック誘
電体とパラジウム及び/または白金の薄膜層を交互に積
層して得られる積層体に基づくものであり、内部の金属
薄膜が誘電体を挟持する形で並列回路を形成するように
端部の銀または銀−パラジウム合金電極と接続する構成
をなしている。
Multilayer ceramic capacitors are generally based on a laminate obtained by alternately laminating a ceramic dielectric and thin film layers of palladium and/or platinum, and a parallel circuit is formed by sandwiching the dielectric between the internal metal thin films. It is configured to be connected to a silver or silver-palladium alloy electrode at the end so as to form a structure.

この積層セラミックコンデンサに使用される誘電体の厚
みは16〜10−0μm程度であり、このような薄い誘
電体平面に電極を設けて折りたたんだよう表構造をして
いる。
The thickness of the dielectric material used in this multilayer ceramic capacitor is approximately 16 to 10-0 μm, and electrodes are provided on the flat surface of such a thin dielectric material to form a folded surface structure.

一般に、コンデンサの静電容量は、 c=tt互  t であちわされる。ここで、εは真空の誘電率、ε。Generally, the capacitance of a capacitor is c=tt mutual t I'm torn about it. Here, ε is the dielectric constant of vacuum, ε.

は誘電体の比誘電率、Sは電極面積、及びtは電極部距
離を示す。したがって、体積当りの容lをs/ニー=’ 考えると、 となり、厚みの2乗に反比例する。そこで、単板型のセ
ラミックコンデンサと積層セラミックコンデンサの体積
当りの容量を比較すると、積層セラミックコンデンサの
方が円板型セラミックコンデンサの厚みの約殉以下にす
ることが可能であるから、約100倍以上の容量が同一
体積で得ることができる。(尚、円板型セラミックコン
デンサでは強度的に厚みを薄くすることが不可能だから
、現在では500μm前後が限度である。)このように
積層セラミックコンデンサは小型かつ大静電容量を有す
るものであり、電子回路の小型化に適合しており、さら
に電極にスズ及び鉛の合金メッキをほどこすことにより
、プリント基板への直付けが容易にできるようになって
きている。
is the dielectric constant of the dielectric, S is the electrode area, and t is the electrode distance. Therefore, considering the capacity l per volume as s/knee=', it is inversely proportional to the square of the thickness. Therefore, when comparing the capacitance per volume of a single-plate ceramic capacitor and a multilayer ceramic capacitor, the thickness of a multilayer ceramic capacitor can be approximately 100 times smaller than that of a disk-type ceramic capacitor. The above capacity can be obtained with the same volume. (However, since it is impossible to reduce the thickness of disc-type ceramic capacitors in terms of strength, the current limit is around 500 μm.) In this way, multilayer ceramic capacitors are small and have large capacitance. It is suitable for the miniaturization of electronic circuits, and by applying tin and lead alloy plating to the electrodes, it has become easy to attach it directly to a printed circuit board.

しかしながら、このような積層セラミックコンデンサの
欠点もいくつかあり、その欠点の一つは、誘電体厚みを
薄くするために生ずる欠陥である。
However, such multilayer ceramic capacitors have several drawbacks, one of which is defects that occur due to the thinning of the dielectric material.

すなわち、セラミック自身もともと多結晶体から孔を有
している。このような気孔はまた均一な大きさではなく
、大きな気孔も存在する。この気孔を小さく均一分布化
することは一つの課題であり、積々研究されてはいるが
、未だ十分とはいえたい。
That is, the ceramic itself originally has pores because it is a polycrystalline material. Such pores are also not of uniform size, and large pores also exist. Making these pores small and uniformly distributed is one of the challenges, and although much research has been done, it cannot be said to be sufficient yet.

このような気孔の及ぼす影響としては、耐湿性を弱くす
ることである。特に、ニッケルあるいはスズー鉛合金メ
ッキなどにより、電解液を用いる工程において、電解質
の残存などが問題となったりする。電解質が残存すると
、湿気が再び浸透することにより絶縁抵抗が低下するこ
とがある。このようなことは製品としての信頼性を著し
く損なうものであり、市場にて問題を発生することが少
なくない。このため、特にメッキ電極を付与する積層セ
ラミックコンデンサについては注意を要したものであっ
た。
The effect of such pores is to weaken moisture resistance. Particularly, in processes using electrolytes such as nickel or tin-lead alloy plating, residual electrolyte may become a problem. If the electrolyte remains, the insulation resistance may decrease due to re-penetration of moisture. Such a situation significantly impairs the reliability of the product and often causes problems in the market. For this reason, special attention must be paid to multilayer ceramic capacitors provided with plated electrodes.

本発明は以上の欠点を考慮し、種々の実験を通して得ら
れたものである。
The present invention was achieved through various experiments in consideration of the above drawbacks.

以下、本発明の詳細について実施例に基づき説明する。Hereinafter, details of the present invention will be explained based on examples.

チタン酸バリウム71.4重量部、ジルコン酸バリウム
20.4重量部、チタン酸カルシウム7.4重量部、酸
化亜鉛0.2重量部、二酸化マンガン0.16重量部、
酸化タングステン0.25重量部及び酸化アルミニウム
0.25重量部よりなる混合粉末に対して、エチルセル
ローズを主体とするバインダーを用いてスラリーを作製
し、40±2μmの厚みのシートをドクターブレード法
を用いて成型した。
71.4 parts by weight of barium titanate, 20.4 parts by weight of barium zirconate, 7.4 parts by weight of calcium titanate, 0.2 parts by weight of zinc oxide, 0.16 parts by weight of manganese dioxide,
A slurry was prepared from a mixed powder consisting of 0.25 parts by weight of tungsten oxide and 0.25 parts by weight of aluminum oxide using a binder mainly composed of ethyl cellulose, and a sheet with a thickness of 40±2 μm was prepared using a doctor blade method. It was molded using

このシートを一定のサイズに打抜いた後、パラジウム電
極を印刷した。この電極印刷済みのシートを電極がクシ
形状になるように積重ねて圧着した後、3.61111
 ×j、8 NM X O,45ffの大きさに切断し
た。このチップを1370℃±20°Cで2時間焼成し
て得た焼結体の両端面に銀ペーストをほどこし、800
℃で焼付けた。このようにして作製された積層体の全面
にシリコーンを付着し、260〜3oo℃の範囲で4〜
6時間熱処理してシリコ−ツを重合させた後、その熱処
理済みの積層体を内径150111のポリポット内に投
入し96〜1o067、−コ・ r、p、 m の回転速度にて30分間共ズリして両端
部の銀電極部のシリコーンを除去した8ついで、シリコ
ーンの除去された両端部の銀電極部に二゛ツケルメッキ
を1〜2μm、さらにその上にスズと鉛の合金メッキを
1〜2μmはどこした。
After punching out this sheet to a certain size, palladium electrodes were printed. After stacking and pressing the electrode-printed sheets so that the electrodes form a comb shape, 3.61111
×j, 8 NM X O, cut into a size of 45ff. This chip was fired at 1370°C ± 20°C for 2 hours, and silver paste was applied to both end faces of the obtained sintered body.
Baked at ℃. Silicone was applied to the entire surface of the laminate thus produced, and
After heat-treating for 6 hours to polymerize the silicone, the heat-treated laminate was put into a polypot with an inner diameter of 150111 and stirred for 30 minutes at a rotational speed of 96~1o067, -co, r, p, m. Then, the silicone on the silver electrodes at both ends was removed.Next, the silver electrodes at both ends from which the silicone had been removed were plated with two-layer plating to a thickness of 1 to 2 μm, and then tin and lead alloy plating was applied to a thickness of 1 to 2 μm on top of that. Where was it?

第1図はこのようにして得られた本発明の積層セラミッ
クコンデンサを示し、図中1は磁器誘電体層、2はパラ
ジウム電極層、3は銀電極、4はニッケルメッキ層、5
はスズと鉛の合金メッキ層、6はシリコーン層である。
FIG. 1 shows the multilayer ceramic capacitor of the present invention thus obtained, in which 1 is a ceramic dielectric layer, 2 is a palladium electrode layer, 3 is a silver electrode, 4 is a nickel plating layer, and 5 is a nickel plating layer.
6 is a tin and lead alloy plating layer, and 6 is a silicone layer.

また、第2図は本発明の方法に基づく積層セラミックコ
ンデンサと、従来の方法に基づくシリコーン処理のない
積層セラミックコンデンサ(シリコーン処理以外は本発
明方法と同一である)の40’C,相対湿度95チ中で
のSOV印加時の耐湿特性の様子を示したものである。
Figure 2 shows a multilayer ceramic capacitor based on the method of the present invention and a multilayer ceramic capacitor based on a conventional method without silicone treatment (same as the method of the present invention except for silicone treatment) at 40'C and relative humidity of 95. This figure shows the moisture resistance characteristics when SOV is applied in the room.

第2図で亀は本発明品の特性、bは従来品の特性である
。この第2図から明らかなように1本発明の方法に基づ
く積層セラミックコンデンサの耐湿特性は極めて安定し
ていることが明白である。
In FIG. 2, the tortoise indicates the characteristics of the product of the present invention, and b indicates the characteristics of the conventional product. As is clear from FIG. 2, it is clear that the moisture resistance of the multilayer ceramic capacitor based on the method of the present invention is extremely stable.

7ベー2 以上述べたように、本発明の方法によれば、メッキ電極
を設けた積層セラミックコンデンサにありがちな耐湿特
性の不安定性といった問題点を解決し得た点で極めて有
意義なものである。
7.2 As described above, the method of the present invention is extremely significant in that it solves the problem of instability in moisture resistance, which is common in multilayer ceramic capacitors provided with plated electrodes.

尚、上記実施例ではチタン酸バリウム、ジルコン酸バリ
ウム及びチタン酸カルシウムを主体とする磁器誘電体材
料を使用したが、他の誘電体材料に関しても適用可能な
ととは言うまでもないことである。また、両端面に銀電
極をほどこした場合について説明したが、銀−パラジウ
ム合金電極でもよいものである。
Incidentally, in the above embodiment, a porcelain dielectric material mainly composed of barium titanate, barium zirconate, and calcium titanate was used, but it goes without saying that the present invention is also applicable to other dielectric materials. Furthermore, although a case has been described in which silver electrodes are provided on both end faces, silver-palladium alloy electrodes may also be used.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明方法に基づく積層セラミックコンデ/す
の一部切欠斜視図、第2図は本発明方法と従来方法に基
づく積層セラミックコンデンサの耐湿特性の比較図であ
る。 1・・・・・・磁器誘電体層、2・・・・・・電極層(
パラジウム電極層)、3・・・・・・銀電極、4・−・
・・ニッケルメッキ層゛、6・・・・・・スズと鉛の合
金メッキ層、6・・・・・・シ)フコーン層。 第1図 第2図 →拭I#持閤(hrs)
FIG. 1 is a partially cutaway perspective view of a multilayer ceramic capacitor based on the method of the present invention, and FIG. 2 is a comparison diagram of the moisture resistance characteristics of multilayer ceramic capacitors based on the method of the present invention and the conventional method. 1... Ceramic dielectric layer, 2... Electrode layer (
palladium electrode layer), 3...silver electrode, 4...
...Nickel plating layer, 6...Tin and lead alloy plating layer, 6...Fucone layer. Figure 1 Figure 2 → Wipe I # Mochiko (hrs)

Claims (1)

【特許請求の範囲】[Claims] 両端部kIlまたは銀−パラジウム合金電極を有する、
磁器誘電体層及びクシ形状に電極層が交互に積層されて
なる積層体の全面属シリコーンを付着すると共にこのシ
リコーンの付着した積層体を熱処理してシリコーンを重
合させ、その後両端部の鋼重極部に付着したシリコーン
を除去し、ついでニッケルメッキを両端部の銀電極部に
ほどこし、このニッケルメッキ処理一部分にスズと鉛の
合金メッキをほどこすようにした積層セラミックコンデ
ンサの製造方法。
having both ends kIl or silver-palladium alloy electrodes,
Metallic silicone is applied to the entire surface of the laminate consisting of porcelain dielectric layers and comb-shaped electrode layers alternately laminated, and the laminate with the silicone adhered is heat treated to polymerize the silicone, and then the steel poles at both ends are attached. A method for manufacturing a multilayer ceramic capacitor, in which silicone adhering to the capacitor is removed, then nickel plating is applied to the silver electrodes at both ends, and a portion of the nickel plating is coated with tin and lead alloy plating.
JP16518781A 1981-10-15 1981-10-15 Method of producing laminated ceramic condenser Granted JPS5866321A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16518781A JPS5866321A (en) 1981-10-15 1981-10-15 Method of producing laminated ceramic condenser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16518781A JPS5866321A (en) 1981-10-15 1981-10-15 Method of producing laminated ceramic condenser

Publications (2)

Publication Number Publication Date
JPS5866321A true JPS5866321A (en) 1983-04-20
JPH0113206B2 JPH0113206B2 (en) 1989-03-03

Family

ID=15807487

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16518781A Granted JPS5866321A (en) 1981-10-15 1981-10-15 Method of producing laminated ceramic condenser

Country Status (1)

Country Link
JP (1) JPS5866321A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59202618A (en) * 1983-04-30 1984-11-16 松下電器産業株式会社 Method of producing laminated ceramic condenser
JPS62122104A (en) * 1985-11-20 1987-06-03 松下電器産業株式会社 Electrode treatment of laminated chip varistor
JPH01241809A (en) * 1988-03-23 1989-09-26 Nec Corp Laminated ceramic chip parts

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59202618A (en) * 1983-04-30 1984-11-16 松下電器産業株式会社 Method of producing laminated ceramic condenser
JPH0153497B2 (en) * 1983-04-30 1989-11-14 Matsushita Electric Ind Co Ltd
JPS62122104A (en) * 1985-11-20 1987-06-03 松下電器産業株式会社 Electrode treatment of laminated chip varistor
JPH0727803B2 (en) * 1985-11-20 1995-03-29 松下電器産業株式会社 Electrode treatment method for laminated chip varistor
JPH01241809A (en) * 1988-03-23 1989-09-26 Nec Corp Laminated ceramic chip parts
JPH0440849B2 (en) * 1988-03-23 1992-07-06 Nippon Electric Co

Also Published As

Publication number Publication date
JPH0113206B2 (en) 1989-03-03

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