JPH0153497B2 - - Google Patents

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Publication number
JPH0153497B2
JPH0153497B2 JP58076643A JP7664383A JPH0153497B2 JP H0153497 B2 JPH0153497 B2 JP H0153497B2 JP 58076643 A JP58076643 A JP 58076643A JP 7664383 A JP7664383 A JP 7664383A JP H0153497 B2 JPH0153497 B2 JP H0153497B2
Authority
JP
Japan
Prior art keywords
silver
electrode
multilayer ceramic
electrodes
ceramic capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58076643A
Other languages
Japanese (ja)
Other versions
JPS59202618A (en
Inventor
Kenji Kusakabe
Gen Itakura
Yoshio Iida
Tooru Tamura
Takayuki Kuroda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP7664383A priority Critical patent/JPS59202618A/en
Publication of JPS59202618A publication Critical patent/JPS59202618A/en
Publication of JPH0153497B2 publication Critical patent/JPH0153497B2/ja
Granted legal-status Critical Current

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  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

産業上の利用分野 本発明はハイブリツドIC用及びプリント基板
直付用の積層セラミツクコンデンサの製造方法に
関するものである。 従来例の構成とその問題点 積層セラミツクコンデンサは、一般にセラミツ
ク誘電体とパラジウム及び/または白金の薄膜層
を交互に積層して得られる積層体に基づくもので
あり、内部の金属薄膜が誘電体を挾持する形で並
列回路を形成するように端部の銀または銀−パラ
ジウム合金電極と接続する構成をなしている。こ
の積層セラミツクコンデンサに使用される誘電体
の厚みは15〜100μm程度であり、このような薄
い誘電体平面に電極を設けて折りたたんだような
構造をしている。一般に、コンデンサの静電容量
は、 C=ε・ε0s/t であらわされる。ここで、ε0は真空の誘電率、ε
は誘電体の比誘電率、sは電極面積、及びtは電
極間距離を示す。したがつて、体積当りの容量を
考えると、 C/V∝1/t2 (Vはコンデンサの体積) となり、厚みの2乗に反比例する。そこで、円板
型のセラミツクコンデンサと積層セラミツクコン
デンサの体積当りの容量を比較すると、積層セラ
ミツクコンデンサの方が円板型セラミツクコンデ
ンサの厚みの約1/10以下にすることが可能である
から、約100倍以上の容量が同一体積で得ること
ができる。(なお、円板型セラミツクコンデンサ
では強度的に厚みを薄くすることが不可能だか
ら、現在では300μm前後が限度である。) このように積層セラミツクコンデンサは小型か
つ大静電容量を有するものであり、電子回路の小
型化に適合しており、さらに電極にスズ及び鉛の
合金メツキをほどこすことにより、プリント基板
への直付けが容易にできるようになつてきてい
る。 しかしながら、このような積層セラミツクコン
デンサの欠点もいくつかあり、その欠点の一つ
は、誘電体厚みを薄くするために生ずる欠陥があ
る。すなわち、セラミツク自身もともと多結晶体
からなるもので、緻密な単結晶とは異なり、無数
の気孔を有している。このような気孔はまた均一
な大きさではなく、大きな気孔も存在する。この
気孔は小さく均一分布化することは一つの課題で
あり、種々研究されてはいるが、未だ十分とはい
えない。このような気孔の及ぼす影響としては、
耐湿性を弱くすることである。特に、ニツケルあ
るいはスズ−鉛合金メツキなどにより、電解液を
用いる工程において、電解質の残存などが問題と
なつたりする。電解質が残存すると、湿気が再び
浸透することにより絶縁抵抗が低下することがあ
る。また両端部の銀電極は通常銀粒子、ガラスフ
リツト微粒子、有機バインダ及び有機溶剤よりな
る電極ペーストを、焼結したセラミツクチツプに
塗布・乾燥したものを800℃程度の電極焼付炉に
て焼付ける。そうすることによりセラミツクと焼
結した銀粒子をガラスフリツト成分にて結合しか
つセラミツク内部のPdあるいはPd−Pt電極とこ
の端面銀電極の接合を計つている。しかしなが
ら、この焼結した銀電極にも気孔が存在し、前記
と同様にメツキ時において電解質が浸透し、ガラ
スフリツト成分が電解質により溶解され端部電極
とセラミツクの接着強度が低下し、信頼性が低下
することになる。特にこのような銀焼付電極の場
合、焼付温度及びセラミツクとのなじみなどの制
限より、硼珪酸鉛系ガラスがガラスフリツトとし
て使用される場合が多く、これは酸性のメツキ液
に容易に浸され、外部電極固着力の低下の原因と
なつていた。このようなことは製品としての信頼
性を著しく損なうものであり、市場にて問題を発
生することが少なくない。このため、特にメツキ
電極を付与する積層セラミツクコンデンサについ
ては注意を要したものであつた。 発明の目的 本発明は上記従来の問題に対処すべく為された
もので、外部電極固着力が大きく、耐湿性の良好
なメツキされた端部電極を有する積層セラミツク
コンデンサを製造することを目的とするものであ
る。 発明の構成 上記目的を達成するため、本発明の積層セラミ
ツクコンデンサの製造方法は、クシ形状に電極層
が交互に積層されてなる磁器誘電体の両端部に銀
または銀−パラジウム合金電極を付与し、この磁
器誘電体に嫌気性接着剤を低温で真空含浸させ、
その後表面部に付着した余分の接着剤を溶剤によ
り除去後、上記嫌気性接着剤を高温で硬化させた
後、両端部の電極部にメツキをほどこしたもので
ある。 実施例の説明 以下、本発明の一実施例について、図面に基づ
いて説明する。 チタン酸バリウム71.4重量部、ジルコン酸バリ
ウム20.4重量部、チタン酸カルシウム7.4重量部、
酸化亜鉛0.2重量部、二酸化マンガン0.15重量部、
酸化タングステン0.25重量部及び酸化アルミニウ
ム0.25重量部よりなる混合粉末に対して、エチル
セルローズを主体とするバインダーを用いてスラ
リーを作製し、40±2μmの厚みのシートをドク
ターブレード法を用いて成形した。このシートを
一定のサイズに打抜いた後、パラジウム電極を印
刷した。この電極印刷済みのシートを電極がクシ
形状になるように積重ねて圧着した後、3.6×1.8
mm×0.69mmの大きさに切断した。このチツプを
1370℃±20℃で2時間焼成して得た焼結体の両端
面に銀ペーストをほどこし、800℃で焼付けた。
このようにして作製された積層体に嫌気性接着剤
(商品名:ロツクタイトPMS−10)を4℃にて1
時間真空含浸した。ここで外部電極の気孔部に侵
入した嫌気性接着剤は、その性質から閉所に閉じ
込められことにより半硬化し、外部電極の銀の気
孔を埋める。その後、セラツミク及び端部電極な
どの表面に付着した余分の接着剤は未硬化の状態
で遠心分離により大半を除去し、更にトリクロル
エチレンで洗浄除去した。この際、気孔内に含浸
された接着剤は半硬化状態であるので、洗浄によ
り除去されない。その後、80℃で15分接着剤を完
全硬化させた。ついで、両端部の銀電極部にバレ
ルメツキ法にてニツケルメツキを1〜2μm、さ
らにその上にスズと鉛の合金メツキを1〜2μm
ほどこした。このときのメツキ液のPH(水素イオ
ン濃度)はニツケルメツキ浴は約4、スズと鉛の
合金メツキ浴は約1であつた。 第1図はこのようにして得られた本発明の積層
セラミツクコンデンサを示し、図中1は磁器誘電
体層、2はパラジウム電極層、3は銀電極、4は
ニツケルメツキ層、5はスズと鉛の合金メツキ層
である。 次表は本発明の方法に基づく積層セラミツクコ
ンデンサと、従来の方法に基づく接着剤含浸のな
い積層セラミツクコンデンサ(接着剤含浸以外は
本発明方法と同一である)の外部電極固着力の実
測値である。表より明らかなように、本発明によ
るものは外部電極のセラミツクとの接着が強固で
ある。なお外部電極固着力はチツプに0.5mmφの
リード線をハンダ付けし、引張り強度試験機にて
垂直方向の引張り強度を測定した。
INDUSTRIAL APPLICATION FIELD The present invention relates to a method of manufacturing a multilayer ceramic capacitor for hybrid ICs and for direct mounting on printed circuit boards. Conventional configurations and their problems Multilayer ceramic capacitors are generally based on a laminate obtained by alternately laminating a ceramic dielectric and thin film layers of palladium and/or platinum, in which the internal thin metal film covers the dielectric. It is configured to be connected to a silver or silver-palladium alloy electrode at the end so as to form a parallel circuit in a pinched manner. The thickness of the dielectric material used in this multilayer ceramic capacitor is approximately 15 to 100 μm, and the structure is such that electrodes are provided on a flat surface of such a thin dielectric material and folded. Generally, the capacitance of a capacitor is expressed as C=ε·ε 0 s/t. Here, ε 0 is the permittivity of vacuum, ε
is the dielectric constant of the dielectric, s is the electrode area, and t is the distance between the electrodes. Therefore, considering the capacitance per volume, it becomes C/V∝1/t 2 (V is the volume of the capacitor), which is inversely proportional to the square of the thickness. Therefore, when comparing the capacitance per volume of a disc-shaped ceramic capacitor and a multilayer ceramic capacitor, the thickness of a multilayer ceramic capacitor can be reduced to about 1/10 or less of that of a disc-shaped ceramic capacitor, so it is approximately More than 100 times more capacity can be obtained with the same volume. (Note that it is impossible to reduce the thickness of disc-type ceramic capacitors in terms of strength, so the current limit is around 300 μm.) In this way, multilayer ceramic capacitors are small and have large capacitance. It is suitable for the miniaturization of electronic circuits, and by applying tin and lead alloy plating to the electrodes, it has become possible to easily attach it directly to a printed circuit board. However, such laminated ceramic capacitors have several drawbacks, one of which is defects that occur due to the thinning of the dielectric material. That is, ceramic itself is originally a polycrystalline material, and unlike a dense single crystal, it has countless pores. Such pores are also not of uniform size, and large pores also exist. It is one of the challenges to make these pores small and uniformly distributed, and although various studies have been conducted, it is still not sufficient. The effects of these pores are as follows:
It weakens moisture resistance. In particular, in the process of using electrolyte with nickel or tin-lead alloy plating, residual electrolyte may become a problem. If the electrolyte remains, the insulation resistance may decrease due to re-penetration of moisture. The silver electrodes at both ends are usually made by coating a sintered ceramic chip with an electrode paste consisting of silver particles, glass frit particles, an organic binder, and an organic solvent, drying the paste, and baking the paste in an electrode baking furnace at about 800°C. By doing so, the ceramic and the sintered silver particles are bonded by the glass frit component, and the Pd or Pd-Pt electrode inside the ceramic is bonded to the end surface silver electrode. However, this sintered silver electrode also has pores, and as mentioned above, the electrolyte penetrates during plating, and the glass frit components are dissolved by the electrolyte, reducing the adhesive strength between the end electrode and the ceramic, reducing reliability. I will do it. Particularly in the case of such silver-baked electrodes, lead borosilicate glass is often used as the glass frit due to limitations such as baking temperature and compatibility with ceramics. This was a cause of a decrease in electrode adhesion. Such a situation significantly impairs the reliability of the product and often causes problems in the market. For this reason, special attention must be paid to multilayer ceramic capacitors provided with plated electrodes. OBJECT OF THE INVENTION The present invention has been made to address the above-mentioned conventional problems, and its purpose is to manufacture a multilayer ceramic capacitor having plated end electrodes with high external electrode adhesion strength and good moisture resistance. It is something to do. Structure of the Invention In order to achieve the above object, the method for manufacturing a multilayer ceramic capacitor of the present invention includes applying silver or silver-palladium alloy electrodes to both ends of a ceramic dielectric material in which electrode layers are alternately laminated in a comb shape. , this porcelain dielectric is vacuum impregnated with an anaerobic adhesive at low temperature,
After that, excess adhesive adhering to the surface was removed using a solvent, and the anaerobic adhesive was cured at high temperature, and then the electrodes at both ends were plated. DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. Barium titanate 71.4 parts by weight, barium zirconate 20.4 parts by weight, calcium titanate 7.4 parts by weight,
Zinc oxide 0.2 parts by weight, manganese dioxide 0.15 parts by weight,
A slurry was prepared using a binder mainly composed of ethyl cellulose from a mixed powder consisting of 0.25 parts by weight of tungsten oxide and 0.25 parts by weight of aluminum oxide, and a sheet with a thickness of 40 ± 2 μm was formed using a doctor blade method. . After punching out this sheet to a certain size, palladium electrodes were printed. After stacking and crimping the electrode-printed sheets so that the electrodes form a comb shape, the 3.6 x 1.8
It was cut into a size of mm x 0.69 mm. This chip
Silver paste was applied to both end faces of the sintered body obtained by firing at 1370°C ± 20°C for 2 hours, and then baked at 800°C.
An anaerobic adhesive (trade name: Loctite PMS-10) was applied to the thus prepared laminate at 4°C.
Vacuum impregnated for an hour. The anaerobic adhesive that has entered the pores of the external electrode is confined in a closed space due to its nature and becomes semi-hardened, filling the pores of the silver of the external electrode. Thereafter, most of the excess adhesive adhering to the surfaces of the ceramics, end electrodes, etc. was removed by centrifugation in an uncured state, and further washed away with trichlorethylene. At this time, since the adhesive impregnated into the pores is in a semi-cured state, it is not removed by cleaning. Thereafter, the adhesive was completely cured at 80°C for 15 minutes. Next, apply 1-2 μm of nickel plating to the silver electrodes on both ends using the barrel plating method, and then apply 1-2 μm of tin and lead alloy plating on top of that.
I applied it. The pH (hydrogen ion concentration) of the plating solution at this time was approximately 4 for the nickel plating bath and approximately 1 for the tin and lead alloy plating bath. FIG. 1 shows the multilayer ceramic capacitor of the present invention thus obtained, in which 1 is a ceramic dielectric layer, 2 is a palladium electrode layer, 3 is a silver electrode, 4 is a nickel plating layer, and 5 is a tin and lead layer. This is an alloy plating layer. The following table shows the actual measured values of the external electrode adhesion strength of a multilayer ceramic capacitor based on the method of the present invention and a multilayer ceramic capacitor without adhesive impregnation based on the conventional method (same as the method of the present invention except for adhesive impregnation). be. As is clear from the table, the electrodes according to the present invention have strong adhesion to the ceramic of the external electrode. The adhesion strength of the external electrode was measured by soldering a lead wire of 0.5 mm diameter to the chip and measuring the tensile strength in the vertical direction using a tensile strength tester.

【表】 また、第2図は本発明の方法に基づく積層セラ
ミツクコンデンサと、従来の方法に基づく接着剤
含浸処理のない積層セラミツクコンデンサ(接着
剤含浸処理以外は本発明方法と同一である)の40
℃、相対湿度95%中での50V印加時の耐湿特性の
様子を示したものである。第2図でaは本発明品
の特性、bは従来品の特性である。この第2図か
ら明らかなように、本発明の方法に基づく積層セ
ラミツクコンデンサの耐湿特性は極めて安定して
いることが明白である。 尚、上記実施例ではチタン酸バリウム、ジルコ
ン酸バリウム及びチタン酸カルシウムを主体とす
る磁器誘電体材料を使用したが、他の誘電体材料
に関しても適用可能なことは言うまでもないこと
である。また、両端面に銀電極をほどこした場合
について説明したが、銀−パラジウム合金電極で
もよいものである。また実施例ではニツケルメツ
キ及びスズ−鉛合金メツキについて説明したが、
金、パラジウム等の他の貴金属のメツキにおいて
も同様の効果が確認されているし、無電解メツキ
法を用いても有効である。 発明の効果 以上述べたように、本発明の方法によれば、メ
ツキ電極を設けた積層セラミツクコンデンサにあ
りがちな外部電極固着力の低下、耐湿特性の不安
定特性等といつた問題点を解決することができ
る。
[Table] Figure 2 also shows a multilayer ceramic capacitor based on the method of the present invention and a multilayer ceramic capacitor based on the conventional method without adhesive impregnation treatment (same as the method of the present invention except for the adhesive impregnation treatment). 40
℃ and 95% relative humidity when 50V is applied. In FIG. 2, a shows the characteristics of the product of the present invention, and b shows the characteristics of the conventional product. As is clear from FIG. 2, it is clear that the moisture resistance of the multilayer ceramic capacitor based on the method of the present invention is extremely stable. Incidentally, in the above embodiment, a porcelain dielectric material mainly composed of barium titanate, barium zirconate, and calcium titanate was used, but it goes without saying that other dielectric materials are also applicable. Furthermore, although a case has been described in which silver electrodes are provided on both end faces, silver-palladium alloy electrodes may also be used. In addition, in the examples, nickel plating and tin-lead alloy plating were explained,
Similar effects have been confirmed in plating other noble metals such as gold and palladium, and electroless plating is also effective. Effects of the Invention As described above, according to the method of the present invention, problems such as a decrease in external electrode adhesion and unstable moisture resistance characteristics, which are common to multilayer ceramic capacitors with plated electrodes, can be solved. be able to.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明方法に基づく積層セラミツクコ
ンデンサの一部切欠斜視図、第2図は本発明方法
と従来方法に基づく積層セラミツクコンデンサの
耐湿特性の比較図である。 1……磁器誘電体層、2……電極層(パラジウ
ム電極層)、3……銀電極、4……ニツケルメツ
キ層、5……スズと鉛の合金メツキ層。
FIG. 1 is a partially cutaway perspective view of a multilayer ceramic capacitor based on the method of the present invention, and FIG. 2 is a comparison diagram of the moisture resistance characteristics of multilayer ceramic capacitors based on the method of the present invention and the conventional method. 1... Porcelain dielectric layer, 2... Electrode layer (palladium electrode layer), 3... Silver electrode, 4... Nickel plating layer, 5... Tin and lead alloy plating layer.

Claims (1)

【特許請求の範囲】[Claims] 1 クシ形状に電極層が交互に積層されてなる磁
器誘電体の両端部に銀または銀−パラジウム合金
電極を付与し、この磁器誘電体に嫌気性接着剤を
低温で真空含浸させ、その後表面部に付着した余
分の接着剤を溶剤により除去し、上記嫌気性接着
剤を高温で硬化させた後、両端部の電極部にメツ
キをほどこした積層セラミツクコンデンサの製造
方法。
1 Silver or silver-palladium alloy electrodes are applied to both ends of a porcelain dielectric material in which electrode layers are alternately laminated in a comb shape, and an anaerobic adhesive is vacuum impregnated into this porcelain dielectric material at a low temperature. A method for manufacturing a multilayer ceramic capacitor, in which excess adhesive adhered to the capacitor is removed using a solvent, the anaerobic adhesive is cured at high temperature, and then electrode portions at both ends are plated.
JP7664383A 1983-04-30 1983-04-30 Method of producing laminated ceramic condenser Granted JPS59202618A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7664383A JPS59202618A (en) 1983-04-30 1983-04-30 Method of producing laminated ceramic condenser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7664383A JPS59202618A (en) 1983-04-30 1983-04-30 Method of producing laminated ceramic condenser

Publications (2)

Publication Number Publication Date
JPS59202618A JPS59202618A (en) 1984-11-16
JPH0153497B2 true JPH0153497B2 (en) 1989-11-14

Family

ID=13611063

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7664383A Granted JPS59202618A (en) 1983-04-30 1983-04-30 Method of producing laminated ceramic condenser

Country Status (1)

Country Link
JP (1) JPS59202618A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0519942Y2 (en) * 1986-09-30 1993-05-25
JPH01241809A (en) * 1988-03-23 1989-09-26 Nec Corp Laminated ceramic chip parts
JPH0656824B2 (en) * 1991-01-25 1994-07-27 太陽誘電株式会社 Chip-shaped electronic component and manufacturing method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4935058A (en) * 1972-08-02 1974-04-01
JPS5123417A (en) * 1974-05-08 1976-02-25 Loctite Corp Takoseibutsupinnokaizensaretaganshinhoho
JPS5546644A (en) * 1978-09-29 1980-04-01 Nippon Technical Co Ltd Rotary preset channel selector
JPS5866321A (en) * 1981-10-15 1983-04-20 松下電器産業株式会社 Method of producing laminated ceramic condenser

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4935058A (en) * 1972-08-02 1974-04-01
JPS5123417A (en) * 1974-05-08 1976-02-25 Loctite Corp Takoseibutsupinnokaizensaretaganshinhoho
JPS5546644A (en) * 1978-09-29 1980-04-01 Nippon Technical Co Ltd Rotary preset channel selector
JPS5866321A (en) * 1981-10-15 1983-04-20 松下電器産業株式会社 Method of producing laminated ceramic condenser

Also Published As

Publication number Publication date
JPS59202618A (en) 1984-11-16

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