JPS6145269B2 - - Google Patents
Info
- Publication number
- JPS6145269B2 JPS6145269B2 JP58039321A JP3932183A JPS6145269B2 JP S6145269 B2 JPS6145269 B2 JP S6145269B2 JP 58039321 A JP58039321 A JP 58039321A JP 3932183 A JP3932183 A JP 3932183A JP S6145269 B2 JPS6145269 B2 JP S6145269B2
- Authority
- JP
- Japan
- Prior art keywords
- buffer
- block
- data
- address
- storage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
- G06F7/78—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
- G06F7/785—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using a RAM
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Memory System (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US36282782A | 1982-03-29 | 1982-03-29 | |
US362827 | 1982-03-29 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58169390A JPS58169390A (ja) | 1983-10-05 |
JPS6145269B2 true JPS6145269B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1986-10-07 |
Family
ID=23427692
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58039321A Granted JPS58169390A (ja) | 1982-03-29 | 1983-03-11 | バツフア記憶の書込み方法 |
Country Status (2)
Country | Link |
---|---|
EP (1) | EP0090137A3 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
JP (1) | JPS58169390A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0283157U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1988-12-19 | 1990-06-27 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5220516A (en) * | 1989-02-21 | 1993-06-15 | International Business Machines Corp. | Asynchronous staging of objects between computer systems in cooperative processing systems |
EP0442548B1 (fr) * | 1990-01-30 | 1995-08-02 | Laboratoires D'electronique Philips S.A.S. | Dispositifs de codage et de décodage à longueur variable de signaux numériques |
FR2662318A1 (fr) * | 1990-05-15 | 1991-11-22 | Philips Electronique Lab | Dispositif de decodage a longueur variable de signaux numeriques. |
US6161155A (en) * | 1998-07-20 | 2000-12-12 | Hewlett-Packard Company | Apparatus and method for storing retrievable boundary information into a buffer memory of a receiving device |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2440058A1 (fr) * | 1978-10-27 | 1980-05-23 | Materiel Telephonique | Systeme de memoire tampon pour unite d'echange entre deux unites fonctionnelles et procede de mise en oeuvre |
-
1983
- 1983-01-26 EP EP83100695A patent/EP0090137A3/en not_active Withdrawn
- 1983-03-11 JP JP58039321A patent/JPS58169390A/ja active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0283157U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1988-12-19 | 1990-06-27 |
Also Published As
Publication number | Publication date |
---|---|
EP0090137A2 (en) | 1983-10-05 |
EP0090137A3 (en) | 1986-12-03 |
JPS58169390A (ja) | 1983-10-05 |
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