JPS6135705B2 - - Google Patents

Info

Publication number
JPS6135705B2
JPS6135705B2 JP51035824A JP3582476A JPS6135705B2 JP S6135705 B2 JPS6135705 B2 JP S6135705B2 JP 51035824 A JP51035824 A JP 51035824A JP 3582476 A JP3582476 A JP 3582476A JP S6135705 B2 JPS6135705 B2 JP S6135705B2
Authority
JP
Japan
Prior art keywords
region
substrate
impurity element
type
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP51035824A
Other languages
English (en)
Japanese (ja)
Other versions
JPS52119186A (en
Inventor
Hiroshi Shiba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP3582476A priority Critical patent/JPS52119186A/ja
Priority to US05/782,418 priority patent/US4063901A/en
Publication of JPS52119186A publication Critical patent/JPS52119186A/ja
Publication of JPS6135705B2 publication Critical patent/JPS6135705B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10P32/1414—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2257—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3215—Doping the layers
    • H01L21/32155—Doping polycristalline - or amorphous silicon layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H10P32/171—
    • H10P32/302—
    • H10P95/00—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/02—Contacts, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/923—Diffusion through a layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/96—Porous semiconductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP3582476A 1976-03-31 1976-03-31 Manufacture of semiconductor Granted JPS52119186A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP3582476A JPS52119186A (en) 1976-03-31 1976-03-31 Manufacture of semiconductor
US05/782,418 US4063901A (en) 1976-03-31 1977-03-29 Method of manufacturing a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3582476A JPS52119186A (en) 1976-03-31 1976-03-31 Manufacture of semiconductor

Publications (2)

Publication Number Publication Date
JPS52119186A JPS52119186A (en) 1977-10-06
JPS6135705B2 true JPS6135705B2 (OSRAM) 1986-08-14

Family

ID=12452692

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3582476A Granted JPS52119186A (en) 1976-03-31 1976-03-31 Manufacture of semiconductor

Country Status (2)

Country Link
US (1) US4063901A (OSRAM)
JP (1) JPS52119186A (OSRAM)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL190710C (nl) * 1978-02-10 1994-07-01 Nec Corp Geintegreerde halfgeleiderketen.
JPS5939906B2 (ja) * 1978-05-04 1984-09-27 超エル・エス・アイ技術研究組合 半導体装置の製造方法
DE2927824A1 (de) * 1978-07-12 1980-01-31 Vlsi Technology Res Ass Halbleitervorrichtungen und ihre herstellung
NL7900280A (nl) * 1979-01-15 1980-07-17 Philips Nv Halfgeleiderinrichting en werkwijze ter vervaardiging daarvan.
DE2926874A1 (de) * 1979-07-03 1981-01-22 Siemens Ag Verfahren zum herstellen von niederohmigen, diffundierten bereichen bei der silizium-gate-technologie
NL186352C (nl) * 1980-08-27 1990-11-01 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting.
US6251470B1 (en) * 1997-10-09 2001-06-26 Micron Technology, Inc. Methods of forming insulating materials, and methods of forming insulating materials around a conductive component
US6333556B1 (en) 1997-10-09 2001-12-25 Micron Technology, Inc. Insulating materials
US6858526B2 (en) * 1998-07-14 2005-02-22 Micron Technology, Inc. Methods of forming materials between conductive electrical components, and insulating materials
US6103590A (en) * 1997-12-12 2000-08-15 Texas Instruments Incorporated SiC patterning of porous silicon
US6350679B1 (en) 1999-08-03 2002-02-26 Micron Technology, Inc. Methods of providing an interlevel dielectric layer intermediate different elevation conductive metal layers in the fabrication of integrated circuitry
US6437417B1 (en) * 2000-08-16 2002-08-20 Micron Technology, Inc. Method for making shallow trenches for isolation

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3600651A (en) * 1969-12-08 1971-08-17 Fairchild Camera Instr Co Bipolar and field-effect transistor using polycrystalline epitaxial deposited silicon

Also Published As

Publication number Publication date
US4063901A (en) 1977-12-20
JPS52119186A (en) 1977-10-06

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