JPS6129538B2 - - Google Patents
Info
- Publication number
- JPS6129538B2 JPS6129538B2 JP11206578A JP11206578A JPS6129538B2 JP S6129538 B2 JPS6129538 B2 JP S6129538B2 JP 11206578 A JP11206578 A JP 11206578A JP 11206578 A JP11206578 A JP 11206578A JP S6129538 B2 JPS6129538 B2 JP S6129538B2
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- main surface
- forming
- buried layer
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000758 substrate Substances 0.000 claims description 38
- 239000011248 coating agent Substances 0.000 claims description 26
- 238000000576 coating method Methods 0.000 claims description 26
- 238000009792 diffusion process Methods 0.000 claims description 24
- 239000004065 semiconductor Substances 0.000 claims description 21
- 239000012535 impurity Substances 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 16
- 150000002500 ions Chemical class 0.000 claims description 12
- 238000010438 heat treatment Methods 0.000 claims description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 26
- 229910052710 silicon Inorganic materials 0.000 description 26
- 239000010703 silicon Substances 0.000 description 26
- 230000015572 biosynthetic process Effects 0.000 description 8
- 238000007796 conventional method Methods 0.000 description 3
- 238000002513 implantation Methods 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 229910001439 antimony ion Inorganic materials 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- -1 arsenic ions Chemical class 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 150000001463 antimony compounds Chemical class 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 229910001423 beryllium ion Inorganic materials 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 150000003377 silicon compounds Chemical class 0.000 description 1
Landscapes
- Bipolar Transistors (AREA)
Description
【発明の詳細な説明】
この発明は半導体装置の埋込み層の形成方法の
改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a method for forming a buried layer of a semiconductor device.
以下、バイポーラ形集積回路の埋込み層の形成
方法を例にとり説明する。 Hereinafter, a method for forming a buried layer of a bipolar integrated circuit will be described as an example.
第1図a〜cは従来の埋込み層の形成方法につ
いて各形成段階を示す断面図である。 FIGS. 1a to 1c are cross-sectional views showing each formation step of a conventional method for forming a buried layer.
先ず、P形シリコン基板1の主面上に絶縁膜2
を形成する。次に、絶縁膜2に選択エツチングを
施して不純物拡散用窓3を形成する。次いで、窓
3内に露出したP形シリコン基板1の主面上を含
み絶縁膜2上に、遠心回転塗布機を用いて、例え
ばケイ素化合物を主成分としたアンチモン化合物
を有機溶剤に懸濁させた溶液〔東京応化工業(株)社
のOCD液など〕を塗布して塗布膜4を成膜する
〔第1図a〕。しかるのち、P形シリコン基板1に
高温の熱処理を施すと、窓3内のP形シリコン基
板1の主面部に+N形拡散層5が形成される〔第
1図b〕。次に、P形シリコン基板1の主面上か
ら絶縁膜2および塗布膜4を除去したのち、N+
形拡散層5上およびP形シリコン基板1の主面上
にN形半導体層6を形成すると、N+形拡散層5
からなる埋込み層7が形成される〔第1図c〕。 First, an insulating film 2 is formed on the main surface of a P-type silicon substrate 1.
form. Next, the insulating film 2 is selectively etched to form an impurity diffusion window 3. Next, on the insulating film 2 including the main surface of the P-type silicon substrate 1 exposed in the window 3, an antimony compound mainly composed of a silicon compound is suspended in an organic solvent using a centrifugal rotary coater. A coating film 4 is formed by applying a solution [such as OCD solution manufactured by Tokyo Ohka Kogyo Co., Ltd.] [FIG. 1a]. Thereafter, when the P-type silicon substrate 1 is subjected to high-temperature heat treatment, an N-type diffusion layer 5 is formed on the main surface of the P-type silicon substrate 1 within the window 3 [FIG. 1b]. Next, after removing the insulating film 2 and coating film 4 from the main surface of the P-type silicon substrate 1,
When the N type semiconductor layer 6 is formed on the P type diffusion layer 5 and the main surface of the P type silicon substrate 1, the N + type diffusion layer 5 is formed.
A buried layer 7 consisting of the following is formed (FIG. 1c).
ところで、上記埋込み層7の形成方法では、塗
布膜4とP形シリコン基板1の主面との密着性が
悪いので、窓3内のP形シリコン基板1の主面上
にこの主面と均一に密着した塗布膜4を形成する
ことが容易ではなかつた。このために、埋込み層
7の層厚を均一に形成することができないという
欠点があつた。この欠点を解決するために、塗布
膜4との密着性のよい酸化膜を、予め窓3内に露
出したP形シリコン基板1の主面上に形成してお
く方法が用いられている。 By the way, in the method for forming the buried layer 7 described above, since the adhesion between the coating film 4 and the main surface of the P-type silicon substrate 1 is poor, a layer is formed uniformly on the main surface of the P-type silicon substrate 1 within the window 3. It was not easy to form a coating film 4 that adhered to the surface. For this reason, there was a drawback that the thickness of the buried layer 7 could not be formed uniformly. In order to solve this drawback, a method is used in which an oxide film having good adhesion to the coating film 4 is previously formed on the main surface of the P-type silicon substrate 1 exposed within the window 3.
第2図a〜cはこの先行技術による埋込み層の
形成方法についてその各形成段階を示す断面図で
ある。 FIGS. 2a to 2c are cross-sectional views showing each formation step of the method for forming a buried layer according to this prior art.
先ず、P形シリコン基板1の主面上に形成され
た絶縁膜2の窓3内に露出したP形シリコン基板
1の主面上に、例えば0.03ミクロン程度の膜厚の
酸化膜8を形成する〔第2図a〕。次に、酸化膜
8上を含み絶縁膜2上に塗布膜4を成膜したの
ち、P形シリコン基板1に高温の熱処理を施す
と、窓3内のP形シリコン基板1の主面部にN+
形拡散層5aが形成される〔第2図b〕。しかる
のち、P形シリコン基板1の主面上およびN+形
拡散層5a上からこれらの上の絶縁膜2、塗布膜
4、および酸化膜8を除去して、P形シリコン基
板1の主面上およびN+形拡散層5a上にN形半
導体層6を形成する。N+形拡散層5aからなる
埋込み層7aが形成される〔第2図c〕。 First, an oxide film 8 having a thickness of, for example, about 0.03 microns is formed on the main surface of the P-type silicon substrate 1 exposed within the window 3 of the insulating film 2 formed on the main surface of the P-type silicon substrate 1. [Figure 2a]. Next, after forming the coating film 4 on the insulating film 2 including on the oxide film 8, the P-type silicon substrate 1 is subjected to high-temperature heat treatment. +
A shaped diffusion layer 5a is formed (FIG. 2b). Thereafter, the insulating film 2, coating film 4, and oxide film 8 are removed from the main surface of the P-type silicon substrate 1 and the N + type diffusion layer 5a, and the main surface of the P-type silicon substrate 1 is removed. An N type semiconductor layer 6 is formed on top and on the N + type diffusion layer 5a. A buried layer 7a consisting of an N + type diffusion layer 5a is formed [FIG. 2c].
このような先行技術による埋込み層7aの形成
方法では、塗布膜4と酸化膜8との密着性がよい
ので、酸化膜8上にこれと均一に密着した塗布膜
4を形成することができる。このために、埋込み
層7aの層厚を均一に形成することが可能になる
が、絶縁膜2の窓3内のP形シリコン基板1の主
面部にN+形拡散層5aを形成する第2図bの段
階において、塗布膜4のN形不純物が酸化膜8を
通してP形シリコン基板1の主面部へ拡散するの
で、埋込み層7aのシート抵抗が、第1図の従来
例の方法によつて形成された埋込み層7のシート
抵抗よりほぼ30%程度高くなり、埋込み層として
の機能が阻害されるという新たな欠点があつた。 In such a method of forming the buried layer 7a according to the prior art, since the adhesion between the coating film 4 and the oxide film 8 is good, the coating film 4 can be formed on the oxide film 8 in uniform adhesion thereto. For this reason, it becomes possible to form the buried layer 7a with a uniform layer thickness, but it is also possible to form the buried layer 7a with a uniform layer thickness. At the stage shown in FIG. 1B, the N-type impurities in the coating film 4 diffuse into the main surface of the P-type silicon substrate 1 through the oxide film 8, so that the sheet resistance of the buried layer 7a is reduced by the conventional method shown in FIG. There was a new drawback that the sheet resistance was approximately 30% higher than the sheet resistance of the formed buried layer 7, and its function as a buried layer was inhibited.
この発明は、上述の欠点に鑑みてなされたもの
で、不純物を含有した塗布膜との密着性をよくす
るために半導体基板の主面上に形成された酸化膜
にイオンを注入し、その後この上に上記塗布膜を
形成し、これらを熱処理して上記酸化膜を通して
上記半導体基板の主面部へ上記不純物を拡散させ
て埋込み層を形成することにより、該埋込み層を
形成するための不純物の基板中への拡散を容易に
でき、層厚の均一なシート抵抗の低い埋込み層を
得ることができる半導体装置の埋込み層の形成方
法を提供することを目的とする。 This invention was made in view of the above-mentioned drawbacks, and in order to improve the adhesion with a coating film containing impurities, ions are implanted into an oxide film formed on the main surface of a semiconductor substrate. A substrate of impurities for forming the buried layer is formed by forming the coating film thereon and heat-treating these to diffuse the impurity through the oxide film to the main surface of the semiconductor substrate to form a buried layer. It is an object of the present invention to provide a method for forming a buried layer of a semiconductor device, which can facilitate diffusion into the semiconductor device and obtain a buried layer having a uniform layer thickness and low sheet resistance.
第3図a〜cはこの発明の一実施例の埋込み層
の形成方法についてその各形成段階を示す断面図
である。 3a to 3c are cross-sectional views showing each formation step of a method for forming a buried layer according to an embodiment of the present invention.
先ず、第2図aの段階と同様に、絶縁膜2の窓
3内のP形シリコン基板1の主面上に0.03ミクロ
ン程度の膜厚の酸化膜8を形成する。次に、図示
矢印Iの方向から例えばヒ素イオン、アンチモン
イオンなどのN形不純物イオンを酸化膜8へ注入
する〔第3図a〕。このとき、上記N形不純物イ
オンの注入エネルギーを50Kev程度以上で、その
注入量を2×1014個/cm3程度に設定する。 First, as in the step shown in FIG. 2A, an oxide film 8 having a thickness of about 0.03 microns is formed on the main surface of the P-type silicon substrate 1 within the window 3 of the insulating film 2. Next, N-type impurity ions such as arsenic ions and antimony ions are implanted into the oxide film 8 from the direction of arrow I in the figure (FIG. 3a). At this time, the implantation energy of the N-type impurity ions is set to about 50 Kev or more, and the implantation amount is set to about 2×10 14 ions/cm 3 .
しかるのち、酸化膜8上を含み絶縁膜2上に、
遠心回転塗布機を用いて、第1図aの段階で説明
したと同様の塗布膜4を成膜する。次いで、P形
シリコン基板1に高温の熱処理を施すと、窓3内
のP形シリコン基板1の主面部にN+形拡散層5
bが形成される〔第3図b〕。次いで、P形シリ
コン基板1の主面上およびN+形拡散層5b上か
らこれらの上の絶縁膜2、塗布膜4、および酸化
膜8を除去して、P形シリコン基板1の主面上お
よびN+形拡散層5b上にN形半導体層6を形成
すると、N+形拡散層5bからなる埋込み層7b
が形成される〔第3図c〕。 After that, on the insulating film 2 including the oxide film 8,
Using a centrifugal rotary coating machine, a coating film 4 similar to that described in the step of FIG. 1a is formed. Next, when the P-type silicon substrate 1 is subjected to high-temperature heat treatment, an N + type diffusion layer 5 is formed on the main surface of the P-type silicon substrate 1 within the window 3.
b is formed [Fig. 3b]. Next, the insulating film 2, coating film 4, and oxide film 8 on the main surface of the P-type silicon substrate 1 and the N + type diffusion layer 5b are removed, and the main surface of the P-type silicon substrate 1 is removed. When the N type semiconductor layer 6 is formed on the N + type diffusion layer 5b, a buried layer 7b made of the N + type diffusion layer 5b is formed.
is formed [Fig. 3c].
このようにこの実施例の埋込み層7bの形成方
法では、塗布膜4と酸化膜8との密着性がよいの
で、酸化膜8上にこれと均一に密着した塗布膜4
を形成することが可能となり、埋込み層7bの層
厚を均一にすることができる。その上、酸化膜8
に不純物イオンを注入することによつて、第3図
bのN+形拡散層5bの形成段階において、塗布
膜4に含有されているN形不純物が酸化膜8を通
してP形シリコン基板1の主面部へ拡散しやすく
なるので、埋込み層7bのシート抵抗を、塗布膜
1との密着性をよくするための酸化膜8を形成し
ない場合の第1図に示した埋込み層7のシート抵
抗とほぼ同一程度にすることができる。また、こ
のイオン注入はヒ素イオン、アンチモンイオンな
どのN形不純物イオンを直接注入することによつ
てP形シリコン基板の主面部に埋込み層を形成す
るのではなく、上述のように酸化膜8を通しての
拡散を容易にするためのものであるから、注入イ
オンはホウ素、アルゴンなどのイオンでもよく、
その注入量は1014個/cm3程度で十分であり、上記
不純物イオンの注入に要する時間は少なくてす
み、従つて従来容易に形成することができなかつ
たアンチモンの濃度の濃い埋込み層を容易に形成
することができる。 In this way, in the method for forming the buried layer 7b of this embodiment, the adhesion between the coating film 4 and the oxide film 8 is good, so that the coating film 4 is formed on the oxide film 8 in uniform contact with the oxide film 8.
, and the thickness of the buried layer 7b can be made uniform. Moreover, the oxide film 8
By implanting impurity ions into the silicon substrate 1, the N - type impurities contained in the coating film 4 are implanted into the main layer of the P-type silicon substrate 1 through the oxide film 8 at the stage of forming the N + type diffusion layer 5b in FIG. 3b. Since it becomes easier to diffuse to the surface, the sheet resistance of the buried layer 7b is approximately equal to the sheet resistance of the buried layer 7 shown in FIG. It can be made to the same extent. In addition, this ion implantation is not performed by directly implanting N-type impurity ions such as arsenic ions and antimony ions to form a buried layer on the main surface of the P-type silicon substrate, but by implanting them through the oxide film 8 as described above. The implanted ions may be ions of boron, argon, etc., since the purpose is to facilitate the diffusion of
The amount of implantation is about 10 14 ions/cm 3 , and the time required for implanting the impurity ions is short, making it easy to form a buried layer with a high concentration of antimony, which has been difficult to form in the past. can be formed into
なお上記実施例では、P形シリコン基板につい
て述べたが、この発明はN形シリコン基板につい
ても適用することができる。 In the above embodiments, a P-type silicon substrate has been described, but the present invention can also be applied to an N-type silicon substrate.
また、これまで、バイポーラ形集積回路装置の
埋込み層の形成方法について説明したが、この発
明はこれに限らず、その他の半導体装置の埋込み
層の形成方法にも適用することができる。 Further, although the method for forming a buried layer of a bipolar integrated circuit device has been described so far, the present invention is not limited to this, and can be applied to methods of forming a buried layer of other semiconductor devices.
以上、詳細に説明したように、この発明の方法
によれば、第1伝導形の半導体基板の主面上に形
成され不純物拡散用窓を有する絶縁膜の上記窓内
に露出する上記半導体基板の主面上に酸化膜を形
成し、この酸化膜にイオンを注入したのち、上記
酸化膜上を含み上記絶縁膜上に第2伝導形の不純
物を含有する塗布膜を成膜して、上記塗布膜に含
有されている不純物の上記酸化膜を通しての上記
半導体基板の主面部への熱拡散によつて埋込み層
を形成するようにしたので、上記塗布膜と上記酸
化膜との密着性がよいため、上記酸化膜上にこれ
と均一密着した上記塗布膜を形成することが可能
となり、上記埋込み層の層厚を均一にすることが
できるとともに、上記酸化膜にイオンを注入する
ことによつて、上記塗布膜に含有されている不純
物の上記酸化膜を通しての上記半導体基板の主面
部への熱拡散が容易になるので、上記埋込み層の
シート抵抗を低くすることができる。 As described above in detail, according to the method of the present invention, the semiconductor substrate exposed within the window of the insulating film formed on the main surface of the first conductivity type semiconductor substrate and having an impurity diffusion window. After forming an oxide film on the main surface and implanting ions into this oxide film, a coating film containing impurities of the second conductivity type is formed on the insulating film including on the oxide film, and Since the buried layer is formed by thermal diffusion of impurities contained in the film to the main surface of the semiconductor substrate through the oxide film, the adhesion between the coating film and the oxide film is good. By implanting ions into the oxide film, it is possible to form the coating film on the oxide film, which is in uniform contact with the oxide film, and to make the thickness of the buried layer uniform. Since thermal diffusion of impurities contained in the coating film to the main surface of the semiconductor substrate through the oxide film becomes easy, the sheet resistance of the buried layer can be lowered.
第1図a〜cは従来の埋込み層の形成方法につ
いてその各形成段階を示す断面図、第2図a〜c
は先行技術による埋込み層の形成方法についてそ
の各形成段階を示す断面図、第3図a〜cはこの
発明の一実施例の埋込み層の形成方法についてそ
の各形成段階を示す断面図である。
図において、1はP形(第1伝導形)シリコン
基板、2は絶縁膜、3は不純物拡散用窓、4は塗
布膜、5,5a,5bはそれぞれN形(第2伝導
形)拡散層、6はN形半導体層、7,7bはそれ
ぞれ埋込み層、8は酸化膜である。なお、図中同
一符号はそれぞれ同一もしくは相当部分を示す。
Figures 1a to 1c are cross-sectional views showing each formation step of a conventional method for forming a buried layer, and Figures 2a to 2c are
3A to 3C are cross-sectional views showing each formation step of a buried layer formation method according to the prior art, and FIGS. 3A to 3C are cross-sectional views showing each formation step of a buried layer formation method according to an embodiment of the present invention. In the figure, 1 is a P-type (first conductivity type) silicon substrate, 2 is an insulating film, 3 is an impurity diffusion window, 4 is a coating film, and 5, 5a, and 5b are N-type (second conductivity type) diffusion layers, respectively. , 6 are N-type semiconductor layers, 7 and 7b are buried layers, and 8 is an oxide film. Note that the same reference numerals in the figures indicate the same or corresponding parts.
Claims (1)
散用窓を有する絶縁膜を形成する第1の工程、上
記不純物拡散用窓内に露出する上記半導体基板の
主面上に酸化膜を形成する第2の工程、上記酸化
膜にイオンを注入したのち、上記酸化膜上を含み
上記絶縁膜上に第2伝導形の不純物を含有する塗
布膜を成膜する第3の工程、上記第3の工程終了
後上記半導体基板に高温の熱処理を施して上記窓
内の上記半導体基板の主面部に上記塗布膜に含有
されている不純物を上記酸化膜を通して拡散せし
め第2伝導形の拡散層を形成する第4の工程、並
びに上記半導体基板の主面上および上記拡散層上
からこれらの上記絶縁膜、上記塗布膜、および上
記酸化膜を除去して、上記半導体基板の主面上お
よび上記拡散層上に第2伝導形の半導体層を形成
する第5の工程を備えた半導体装置の埋込み層の
形成方法。1. A first step of forming an insulating film having an impurity diffusion window on the main surface of a semiconductor substrate of a first conductivity type, forming an oxide film on the main surface of the semiconductor substrate exposed in the impurity diffusion window. a second step of implanting ions into the oxide film, and a third step of forming a coating film containing an impurity of a second conductivity type on the insulating film including on the oxide film; After completing the process, the semiconductor substrate is subjected to high temperature heat treatment to diffuse impurities contained in the coating film through the oxide film to the main surface of the semiconductor substrate within the window to form a second conductivity type diffusion layer. a fourth step of removing the insulating film, the coating film, and the oxide film from the main surface of the semiconductor substrate and the diffusion layer; A method for forming a buried layer of a semiconductor device, comprising a fifth step of forming a second conductivity type semiconductor layer thereon.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11206578A JPS5538082A (en) | 1978-09-11 | 1978-09-11 | Formation for buried layer of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11206578A JPS5538082A (en) | 1978-09-11 | 1978-09-11 | Formation for buried layer of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5538082A JPS5538082A (en) | 1980-03-17 |
JPS6129538B2 true JPS6129538B2 (en) | 1986-07-07 |
Family
ID=14577164
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11206578A Granted JPS5538082A (en) | 1978-09-11 | 1978-09-11 | Formation for buried layer of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5538082A (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62162325A (en) * | 1986-01-13 | 1987-07-18 | Sanyo Electric Co Ltd | Manufacture of semiconductor device |
JPS62198120A (en) * | 1986-02-25 | 1987-09-01 | Sanyo Electric Co Ltd | Manufacture of semiconductor device |
KR100393962B1 (en) * | 1996-12-26 | 2003-11-17 | 주식회사 하이닉스반도체 | Method for manufacturing semiconductor device |
-
1978
- 1978-09-11 JP JP11206578A patent/JPS5538082A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5538082A (en) | 1980-03-17 |
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