JPS61198648A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To avoid the generation of defects at the time of ion implantation, and to enable the uniform formation of an impurity diffused layer in a fine vertical isolation groove, by a method wherein a P-type diffused layer is formed by ion implantation of boron into the semiconductor film, which film is then changed into an N-type diffused layer by ion implantation of arsenic; then, a P-type diffused layer is formed by removing the N-type diffused layer. CONSTITUTION:Isolation grooves 12 are formed by etching a semiconductor substrate 10. Next, a semiconductor film 13 is formed. After boron ion beams 14 are implanted into the semiconductor film 13, a P-type impurity diffused layer 15 is formed in the surface of the isolation groove 12 by heat treatment. Then, the boron concentration in the film 13 becomes constant, and the film 13 diffuses in the form of the solid-phase diffusion source, resulting in the formation of the P-type impurity diffused layer 15. After arsenic ion beams 16 are implanted into the film 13, it is formed into an N-type semiconductor film 13A by heat treatment. When the semiconductor film 13A is selectively etched, a P-type impurity diffused layer 15 serving as the channel stopper layer is uniformly formed to the bottom and side surfaces of the isolation groove 12.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming a channel stopper layer of a semiconductor device.

2. Description of the Related Art Conventionally, in the manufacture of semiconductor devices, a buried isolation method has been proposed in order to reduce the size of element isolation regions as the density increases. An example of this prior art will be explained with reference to FIG. 4. After forming an oxide film 2 on a p-type Si substrate 1, the entire oxide film 2 in the isolation region is removed by etching. Next, the 81 substrate 1 is etched to a desired depth using an anisotropic dry etching technique to form vertical separation grooves 3. Next, ion implantation is performed using a boron ion beam 4 to form a channel stopper layer 5.

Problems to be Solved by the Invention However, in this case, as shown in FIG. 4, boron ions are implanted only into the bottom surface of the S1-etched isolation trench 3.

Therefore, ions are not implanted into the side surfaces of the Si-etched isolation groove 3, and the boron ion concentration remains the same as the Si substrate concentration. Therefore, boron is sucked out during the oxidation process and the surface concentration decreases, resulting in a decrease in the concentration of 7 elements of the MO8 element at the channel edge.

For this reason, the sub-threshold current characteristic of the MOS transistor shown in FIG. 6 is affected by a hump-like phenomenon. In this way, when the channel stopper layer 6 is formed by ion implantation in the fine separation groove 3 having a nearly vertical shape, a hanging phenomenon occurs because the channel stopper layer 6 cannot be formed on the side surfaces thereof.

Therefore, the separation groove 3 has a fine and nearly vertical shape.
In order to eliminate the hanging phenomenon, it is necessary to form a channel layer 6 on the side surface of the separation groove 3 as well.

In view of these conventional problems, the present invention has been developed to uniformly introduce impurities into the side surfaces of isolation trenches having fine and vertical walls, thereby creating a channel stopper that does not cause a hang phenomenon in subthreshold current characteristics. It is an object of the present invention to provide a complete method for manufacturing a semiconductor device that can be formed completely.

Means for Solving the Problems In other words, unlike the method of directly implanting impurities into a semiconductor substrate to form an impurity diffusion layer, the present invention forms a semiconductor film on the semiconductor substrate and completely eliminates boron in the semiconductor film. After the ion implantation, boron in the semiconductor film is diffused throughout the semiconductor substrate by a first heat treatment to form a p-type diffusion layer. Thereafter, all arsenic ions are implanted into the semiconductor film, and a second heat treatment is performed to make the semiconductor film at least an fn type diffusion layer. This method is characterized by using a unique method of forming a p-type diffusion layer in the semiconductor substrate by selectively removing the n-type diffusion layer thereafter.

Conventionally, when a semiconductor film such as a polycrystalline silicon film was formed directly on a semiconductor substrate, there was a problem that when the entire polycrystalline silicon film was etched away later, the semiconductor substrate was also etched. It has been discovered that the n-type diffusion layer can be selectively removed by implanting arsenic ions into a silicon film and subjecting it to heat treatment to form a highly concentrated n-type diffusion layer (ie, an n-type polycrystalline silicon film). That is, the diffusion rate of impurities in a polycrystalline silicon film is more than 100 times faster than that in a single crystal semiconductor substrate. Therefore, high-concentration arsenic ions are implanted into the polycrystalline silicon film at a low temperature (70°C).
By heat treatment for a short time at 0~800''C), it is possible to form an in-type polycrystalline silicon film with almost no diffusion into the semiconductor substrate. When the entire n-type diffusion layer is etched using a liquid, it is more than 30 times faster than etching a single crystal semiconductor substrate, so the polycrystalline silicon film can be etched away without substantially etching the semiconductor substrate.

Therefore, after forming a semiconductor film on a semiconductor substrate, boron ions are implanted and heat treatment is performed at a high temperature (900 to 1100° C.) to form a p-type diffusion layer in the semiconductor substrate.

After that, arsenic is ion-implanted into the semiconductor film, heat-treated for a short time at low temperature to form a polycrystalline silicon film fn-type diffusion layer, and then all of the n-type diffusion layer is selectively removed. A diffusion layer remains. This greatly contributes to the formation of the p-type diffusion layer.

For example, when forming a single layer channel stopper in a concave isolation trench, there are steps of forming an isolation trench in a desired region of a p-type semiconductor substrate, forming a semiconductor film on the isolation trench, and adding boron to the semiconductor film. a step of performing a first heat treatment to diffuse boron in the semiconductor film to the surface of the isolation trench to form a p-type diffusion layer; and a step of implanting arsenic ions into the semiconductor film. a step of performing a second heat treatment to diffuse arsenic in the semiconductor film to make at least the semiconductor film 'Thn-type expanded n-type, and a step of selectively removing the entire n-type wave dispersion layer. The p-type wave diffusion layer, which serves as a channel stopper layer, may be formed on the entire bottom and side surfaces of the separation groove.

Operation The present invention has the above-described configuration. (1) Since the diffusion rate of impurities in a semiconductor film, such as a polycrystalline silicon film or an amorphous silicon film, is fast, the impurity concentration in the semiconductor film can be reduced by implanting all boron ions and performing high-temperature heat treatment. becomes constant, and further diffuses into the semiconductor substrate to form a p-type diffusion layer.

(2) All ions of arsenic are implanted into the semiconductor film at a high concentration,
If heat treatment is performed at a low temperature for a short time, the semiconductor film becomes an n-type diffusion layer, with a p-type diffusion layer underneath.

(3) The n-type diffusion layer can be selectively etched without etching the entire p-type diffusion layer.

Due to the above effects, even if the isolation trench is minute and has a vertical shape, the semiconductor film formed in the isolation trench can uniformly form a p-type diffused layer that becomes a channel stopper layer on the bottom and side surfaces of the isolation trench. Moreover, the semiconductor film can be selectively etched. Therefore, the p-type diffusion layer formed on the bottom and side surfaces of the isolation trench prevents the hang phenomenon in subthreshold current characteristics.

Example Hereinafter, the present invention will be explained in detail using examples.

FIG. 1 shows an embodiment of the present invention.

After forming a desired insulating film pattern 11 on a p-type semiconductor substrate 10, for example, a SiO2 film pattern having a thickness of 0.2 μm, the semiconductor substrate 10 is etched to a desired depth by anisotropic dry etching, for example. Depth O, S
The entire separation groove 12 in the form of a μm concave portion is formed. At this time, the bottom and side surfaces of the separation groove 12 have a perpendicular shape (first
Diagram a).

Next, the semiconductor film 13, for example, a polycrystalline silicon film, is coated with a thickness of 0.3 μm.
Form. Thereafter, the boron ion beam 14 is applied to the semiconductor film 13 at a dose of, for example, 1×1o1510 nS/
After CI & Neuion implantation, heat treatment for example 100
This is carried out at 0° C. for 10 minutes to form a p-type impurity diffusion layer 16 on the surface of the isolation trench 12.

At this time, the boron concentration in the semiconductor film 13 becomes constant in a short time due to the heat treatment, and this semiconductor film 13 becomes a solid-phase diffusion source and diffuses into the semiconductor substrate 10 to form a p-type impurity diffusion layer 15. (Figure 1b).

Next, the arsenic ion beam 16 is applied to the semiconductor film 13 at a dose of, for example, tk 1 x 10"1 ons/cTL.
After ion implantation, heat treatment is performed at 700°C for 3
The process is carried out for 0 minutes to form 13 n-type semiconductor films. At this time, since the heat treatment temperature is low, the semiconductor film 1 has a high diffusion rate.
Although the 3M becomes n-type, it hardly diffuses into the semiconductor substrate 10 (FIG. 1C).

Next, by selectively etching the 13 n-type semiconductor films, as shown in FIG. If etched, the etching rate is 30 times faster than that of the p-type impurity diffusion layer 16, so selective etching can be performed without substantially etching the p-type impurity diffusion layer 16 (FIG. 1d).

FIG. 2 shows the subthreshold current characteristics of a prototype MO5I transistor fabricated using the above process. As a result of FIG. 2, since the impurity diffusion layer 16, which is a channel stopper layer, is uniformly formed on the bottom and side surfaces of the isolation trench 12 as shown in FIG. 1, there is no electric field concentration at the shoulder of the isolation trench 12.
No 7-ump phenomenon was observed in the sun threshold current characteristics.
Good results were obtained.

Next, FIG. 3 shows the final shape of a MOS transistor formed using the present invention. FIG. 3(a) is a plan view.

FIG. 3(b) shows a sectional view taken along line I-1' in FIG. 3(a).

A p-type impurity diffusion layer 16 and a channel doped impurity diffusion layer 2o, which are formed by the method of the present invention and become a single layer of a channel stopper, are surrounded by a gate oxide film 18 and a buried oxide film 17, and a gate Electrode 19
There is. Note that 21° and 22 are source and drain regions.

In the above example, the semiconductor film was formed directly on the semiconductor substrate, but the same results could be obtained by forming the semiconductor film after forming a thin film on the semiconductor substrate and performing the above method. It will be done.

That is, a thin film of about 20 to 80 layers is formed on a semiconductor substrate using, for example, thermal oxidation or water or ammonia water.

After forming in a solution such as sulfuric acid or a mixture of sulfuric acid and hydrogen peroxide, a semiconductor film is formed. After that, boron ions are implanted into the semiconductor film, and heat treatment is performed for example at 1000'.
C for 30 minutes. At this time, boron in the semiconductor film is diffused into the thin film and further into the semiconductor substrate to uniformly form a p-type impurity diffusion layer. Next, arsenic ions are implanted into the semiconductor film, and heat treatment is performed at, for example, 700°C for 30 minutes.
Apply for minutes. At this time, the semiconductor film becomes n-type, and
The thin film prevents arsenic from diffusing into the semiconductor substrate. Thereafter, by etching the n-type semiconductor film using a selective etchant and removing the thin film, a structure similar to that shown in FIG. 1 ((1)) can be obtained.

However, in the above embodiment, the p-type impurity diffusion layer was formed by boron ion implantation using a non-doped semiconductor film, and the n-type impurity diffusion layer was formed by arsenic ion implantation.
After the p-type impurity diffusion layer is formed using a boron-doped semiconductor film, the n-type impurity diffusion layer may be formed by arsenic ion implantation.

Alternatively, after a p-type impurity diffusion layer is formed by implanting boron ions into a non-doped semiconductor film, an n-type impurity diffusion layer may be formed by coating MuS glass and performing heat treatment. Furthermore, after forming a p-type impurity diffusion layer using a boron-doped semiconductor film, an n-type impurity diffusion layer may be formed by applying MU glass and heat-treating the layer.

Effects of the Invention As described above, according to the present invention, (1) After forming a thin film and a semiconductor film on a semiconductor substrate,
Since ions are implanted into the semiconductor film, defects due to damage during ion implantation do not occur in the semiconductor substrate.

(2) The p-type impurity in the semiconductor film can be diffused into the semiconductor substrate, and a uniform p-type impurity diffusion layer can be obtained.

(3) In etching an n-type semiconductor film, it is possible to selectively remove the p-type impurity diffusion layer without etching it.

(4) In a fine vertical isolation trench, an impurity diffusion layer that becomes a channel stopper layer can be uniformly formed on the bottom and side surfaces, and Mo has good subthreshold current characteristics.
5) A transistor can be obtained.

As described above, the present invention greatly contributes to the manufacture of semiconductor devices.

[Brief explanation of the drawing]

1(2L) to (d) are cross-sectional views illustrating the process of forming a single layer of a channel stopper of a semiconductor device in an embodiment of the present invention, and FIG. 2 is a cross-sectional view of a Mo
A diagram showing subthreshold current characteristics of an S transistor,
FIG. 3 (IL) is a partial plan view of a MOS transistor manufactured using the present invention, FIG. 3 (b) is a cross-sectional view taken along the line I-I' in FIG. 3 (a), and FIG. 4 is a conventional channel A cross-sectional view for explaining the formation of one layer of stopper, FIG.
FIG. 3 is a diagram showing the subthreshold current characteristics of a Mo5) transistor fabricated using the isolation formed in the figure. 1o... Semiconductor substrate, 13... P-type polycrystalline silicon film, 13mu... N-type polycrystalline silicon film, 16... P-type impurity diffusion layer. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 4 Figure 5 Game-1 room reciprocal CV)

Claims (3)

[Claims] (1) A step of forming a semiconductor film on one main surface of a semiconductor substrate, a step of implanting boron ions into the semiconductor film, and a first heat treatment to transfer boron in the semiconductor film to the semiconductor substrate. a step of diffusing into the semiconductor film to form a p-type diffusion layer; and a step of implanting arsenic ions into the semiconductor film.
The step of performing a second heat treatment to diffuse arsenic in the semiconductor film to make at least the semiconductor film an n-type diffusion layer, and the step of selectively removing the n-type diffusion layer. A method for manufacturing a featured semiconductor device. (2) The method for manufacturing a semiconductor device according to claim 1, wherein a thin film is formed between the semiconductor substrate and the semiconductor film. (3) forming an isolation trench in a desired region of a p-type semiconductor substrate; forming a semiconductor film on the isolation trench; implanting boron ions into the semiconductor film;
a step of performing a heat treatment to diffuse boron in the semiconductor film to the surface of the isolation trench to form a p-type diffusion layer; a step of implanting arsenic ions into the semiconductor film; and a second heat treatment. A semiconductor device comprising the steps of: diffusing arsenic in the semiconductor film to make at least the semiconductor film an n-type diffusion layer; and selectively removing the n-type diffusion layer. Production method.