JPH04309226A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To restrain the decrease of effective area of an element, by selectively forming an oxidation resistant film on a semiconductor substrate, introducing impurities in the semiconductor substrate in an aperture of the oxidation resistant film, and forming a thermal oxidation film in the aperture. CONSTITUTION:After a silicon oxide film 2 and a silicon nitride film 3 are formed on a silicon substrate 1, a recessed part 5 is formed by etching both of the films 2, 3. An silicon oxide film 7 and a silicon nitride film are formed in the recessed part 5, and said silicon nitride film is etched back, thereby forming a silicon nitride film 6 on the side surface of the recessed part 5. At this time, the silicon oxide film on the bottom surface of the recessed part 5 is also etched. Next, for example, phosphorus is diffused, and a high concentration N-type impurity diffusion layer 8 is formed. An oxide film 9 is formed by using the silicon nitride films 3, 6 as masks, and an silicon oxide film 9 turning to a field oxide film is completed by etching the silicon nitride films 3, 6 and the silicon oxide film 2. Thereby the decrease of effective area of an element is restrained.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming element isolation regions by selective oxidation.

0002

2. Description of the Related Art A conventional method for forming element isolation regions by selective oxidation will be described with reference to FIGS. 3A to 3C and 4A to 4C.

First, as shown in FIG. 3(a), a thin silicon oxide film 2 is formed on a silicon substrate 1, and then a reduced pressure C
A silicon nitride film 3 is formed by the VD method. Using the resist 4 patterned thereon as a mask, the silicon nitride film 3 and the silicon oxide film 2 are etched.

Next, as shown in FIG. 3(b), the silicon substrate 1 is etched by anisotropic etching using the resist 4 as a mask.
A recess 5 is formed in.

Next, as shown in FIG. 3C, after removing the resist 4, a thin silicon oxide film 7 is formed in the recess 5, and then a silicon nitride film 11 is formed by low pressure CVD.

Next, as shown in FIG. 4A, the silicon nitride film 11 is etched back by anisotropic etching to leave side walls made of the silicon nitride film 11 on the sides of the recess 5. As shown in FIG.

Next, as shown in FIG. 4B, a silicon oxide film 9 to be a field oxide film is formed by LOCOS selective oxidation using the silicon nitride films 3 and 11 as masks.

Next, as shown in FIG. 4C, the silicon nitride films 3 and 11 and the silicon oxide film 2 are etched to complete a silicon oxide film 9 that will become a field oxide film.

[0009]

In the conventional selective oxidation method for forming element isolation regions, when performing selective oxidation, the same thickness is oxidized in the horizontal direction as in the vertical direction. Since the progress of oxidation in the lateral direction cannot be sufficiently suppressed,
There was a problem that the effective area of the element was reduced.

0010

[Means for Solving the Problems] A method for manufacturing a semiconductor device of the present invention includes a step of selectively forming an oxidation-resistant film on a semiconductor substrate, and a step of forming an oxidation-resistant film in an opening of the oxidation-resistant film in the semiconductor substrate. The method includes a step of introducing impurities and a step of forming a thermal oxide film in the opening.

[0011]

[Example] Regarding the first example of the present invention, FIG. 1(a)
-(c) and FIGS. 2(a)-(c).

First, as shown in FIG. 1A, a silicon oxide film 2 with a thickness of 500 Å is formed on a silicon substrate 1, and then a silicon nitride film 3 with a thickness of 1000 Å is formed by low pressure CVD. Using the resist 4 patterned thereon as a mask, the silicon nitride film 3 and the silicon oxide film 2 are etched.

Next, as shown in FIG. 1B, anisotropic etching is performed using the resist 4 as a mask to form a recess 5 in the silicon substrate 1.

Next, as shown in FIG. 1(c), after removing the resist 4, a silicon oxide film 7 with a thickness of 500 Å is formed in the recess 5, and then a silicon oxide film 7 with a thickness of 500 Å is deposited on the entire surface by low pressure CVD.
A silicon nitride film of 0A is formed. Next, silicon nitride film 6 is formed on the side surface of recess 5 by etching back by anisotropic etching. At this time, the silicon oxide film 7 on the bottom surface of the recess 5 is also etched at the same time.

Next, as shown in FIG. 2A, a high concentration N-type impurity diffusion layer 8 is formed by diffusing, for example, phosphorus.

Next, as shown in FIG. 2B, a silicon oxide film 9, which will become a field oxide film, is formed by LOCOS selective oxidation using the silicon nitride films 3 and 6 as masks.

Next, as shown in FIG. 2C, the silicon nitride films 3 and 6 and the silicon oxide film 2 are etched to complete a silicon oxide film 9 that will become a field oxide film.

The diffusion conditions and oxidation conditions will now be explained.

The impurity concentration of the impurity diffusion layer 8 formed in the silicon substrate 1 is preferably at least 1.times.10.sup.18 cm.sup.-3, preferably 1.times.10.sup.19 cm.sup.-3 or more. The impurity diffusion layer 8 of 1×10 20 cm −3 has an oxidation rate of 2 compared to a silicon substrate into which no impurity is introduced.
．． The inventor has confirmed that the amount increases by more than five times.

In this example, heat treatment was performed in a phosphorus atmosphere at 900° C. for 50 minutes to obtain an impurity concentration of 1×10 20 cm −3 . Subsequently, pressure oxidation was performed at 900° C. for 30 minutes at 5 atmospheres to form a silicon oxide film with a thickness of 1 μm. At this time, the horizontal oxide film without introducing impurities is approximately 4000A.
I was able to keep it down to

Next, a second embodiment of the present invention will be explained.

In this embodiment, the impurity diffusion layer 8 is formed by ion implantation instead of thermal diffusion. However, Figure 1 (b
), ion implantation is performed using the resist 4 as a mask.

The ion implantation conditions will now be explained.

For example, when phosphorus is used as an impurity, 1×1
To obtain a concentration of 019 cm-3 or more, acceleration energy was 200 keV and implantation dose was 1 x 1016 cm-2.
Implant ions. To increase the impurity concentration near the surface, the acceleration energy was 50 keV and the implantation amount (dose) was 1×10
Preferably, an additional 16 cm −2 ion implantation is performed.

By using ion implantation, the impurity diffusion layer 8 has a smaller lateral extent than when thermal diffusion is used. Therefore, the oxide film in the lateral direction can be further suppressed.

[0026]

[Effects of the Invention] The oxidation rate in the vertical direction is increased by introducing high concentration impurities in advance before forming a silicon oxide film using the LOCOS selective oxidation method. As a result, it was possible to relatively suppress oxidation in the lateral direction, thereby suppressing a decrease in the effective area of the device.

Conventionally, when attempting to form a field oxide film with a thickness of 1 μm, an oxide film of about 1 μm on one side and about 2 μm on both sides is formed laterally.

On the other hand, according to the present invention, the formation of the oxide film in the lateral direction can be reduced to about 0.4 μm on one side and about 0.8 μm on both sides, which is effective for miniaturization of semiconductor devices.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing the first half of an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing the latter half of the process in an embodiment of the present invention.

FIG. 3 is a cross-sectional view showing the first half of a method for forming an element isolation region according to the prior art.

FIG. 4 is a cross-sectional view showing the latter half of a method for forming an element isolation region according to the prior art.

[Explanation of symbols]

1 Silicon substrate 2 Silicon oxide film 3 Silicon nitride film 4 Resist 5 Recessed part 6 Silicon nitride film 7 Silicon oxide film 8 Impurity diffusion layer 9 Silicon oxide film

Claims (3)

[Claims] 1. A step of selectively forming an oxidation-resistant film on a semiconductor substrate, a step of selectively introducing an impurity into the semiconductor substrate at an opening of the oxidation-resistant film, and a step of selectively introducing an impurity into the opening of the oxidation-resistant film. A method for manufacturing a semiconductor device, including a step of forming a thermal oxide film. 2. A step of selectively forming an oxidation-resistant film on a semiconductor substrate, a step of etching the surface of the semiconductor substrate in an opening of the oxidation-resistant film to form a recess, and A method for manufacturing a semiconductor device, comprising the steps of selectively introducing impurities into a semiconductor substrate, and forming a thermal oxide film in the recess. 3. A step of selectively forming an oxidation-resistant film on a semiconductor substrate, a step of etching a surface of the semiconductor substrate at an opening of the oxidation-resistant film to form a recess, and a step of forming a recess on a side surface of the recess. A method for manufacturing a semiconductor device, comprising the steps of: forming a sidewall made of an oxidation-resistant film on the semiconductor substrate; selectively introducing impurities into the semiconductor substrate in the recess; and forming a thermal oxide film in the recess. .