JPH08330413A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE: To suppress the diffusion of the element isolation oxide film, which is formed by selective oxidation method (LOCOS method), to an element forming region, and to decrease the step formed between the element forming region and the element isolation oxide film. CONSTITUTION: A groove 1b is formed by selectively etching the surface of the element isolation region of a semiconductor substrate 1, an oxidation- resisting film 6 is formed on the side face of the groove, another groove 1b, which is deeper than the above-mentioned groove, is formed on the semiconductor substrate 1 using the oxidation-resisting film 6 as a mask, and an element isolation oxide film 7 is formed by selectively oxidizing the surface of the groove 1b. As a result, the element isolation oxide film 7 is grown on the surface lower than the oxidation-resisting film 6, the element isolation oxide film 7 is grown while the oxidation-resisting film 6 is being pushed up, and the end part of the element isolation oxide film 7 is prevented from expanding toward the element formation region. As a result, the size of plane surface is reduced, and the element isolation region, where the stepping on the surface of the semiconductor board is alleviated, can be formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to suppressing the expansion of an element isolation oxide film formed by a selective oxidation method (LOCOS method) into an element formation region and an element formation region and an element. The present invention relates to a method for manufacturing a semiconductor device in which a step difference from an isolation oxide film is reduced.

[0002]

2. Description of the Related Art In recent years, with the high integration of semiconductor devices, it is required not only to miniaturize each element but also to reduce the element isolation region. Further, as the miniaturization of the gate electrode progresses, the gate electrode is likely to be thinned in the step portion between the element formation region and the element isolation oxide film, and this thinning causes the MO
Since the breakdown voltage of the S transistor is lowered, it is also required to reduce this step. Generally, a selective oxidation method (LOCOS method) is used for forming the element isolation region.
Since this method is a method of selectively forming an oxidation resistant film on the surface of a silicon substrate and selectively oxidizing the surface of the silicon substrate using this oxidation resistant film as a mask, the element isolation oxide film formed is a silicon substrate. Is formed so as to project from the surface of the silicon substrate, and the difference in height between the surface and the surface of the silicon substrate, that is, the surface step difference becomes large.

Since such a step causes the thinning of the gate electrode as described above, a manufacturing method for reducing the step and reducing the step is required. As a method that meets this demand, there is a method disclosed in Japanese Patent Laid-Open No. 4-127433. This method will be described with reference to FIG.

First, as shown in FIG. 3A, the surface of a silicon substrate 11 is thinly oxidized to form a first silicon oxide film 12, and a first silicon oxide film 12 is formed thereon by a vapor phase growth method (CVD method). The first silicon nitride film 13 is deposited. Then, the photoresist pattern 14 is formed only in the element formation region by using the photolithography technique. Next, FIG.
As shown in (b), using the photoresist pattern 14 as an etching mask, reactive ion etching (RI
The first silicon nitride film 13 in the opening 15 is etched by the method E). Then, the photoresist pattern 14
Is removed. Further, the first silicon oxide film 12 exposed in the opening 15 is removed using a thin hydrofluoric acid solution.

Next, as shown in FIG. 3C, the opening 1
The surface of the silicon substrate 11 exposed at 5 is thinly oxidized to form the second silicon oxide film 16, and the second silicon nitride film 17 is deposited on the entire surface by the CVD method. Next, as shown in FIG. 3D, after etching the second silicon nitride film 17 by RIE until the second silicon oxide film 16 is exposed in the opening 15, the exposed silicon oxide film 16 is removed. It is removed using a thin hydrofluoric acid solution, and the second silicon nitride film 17 is left only on the step side wall portion of the first silicon nitride film 13.

Next, as shown in FIG. 4A, the silicon substrate is formed by using the first silicon nitride film 13 and the second silicon nitride film 17 left on the step side wall of the opening 15 as an etching mask. A shallow groove 18 is formed in 11. next,
As shown in FIG. 4B, the groove 1 is oxidized by the thermal oxidation method.
A silicon oxide film 19 for element isolation is grown in the device 8. After that, the first and second silicon nitride films 13 and 17 are removed by using hot phosphoric acid, and the first silicon oxide film 12 is removed by a thin hydrofluoric acid solution, so that the device as shown in FIG. A separation area is formed.

[0007]

In this manufacturing method, the groove 18 is formed in the silicon substrate 11, and the side wall portion 17 of the second silicon nitride film is formed at the end of the groove 18, It is possible to prevent the element isolation oxide film 19 from growing above the surface of the silicon substrate 11 at the end portion, which is effective in reducing the size and mitigating the step. However, even in this method, since the sidewall portion 17 of the silicon nitride film is located above the surface of the silicon substrate 11,
In the step of FIG. 4B, the silicon oxide film 19 for element isolation is grown by pushing up the side wall portion 17 of the silicon nitride film, and its end portion is formed in a protruding shape. Therefore, the end portion of the element isolation oxide film 19 is formed in a state of protruding above the surface of the silicon substrate 11 to the first silicon oxide film 12,
50-60 between the element formation region and the element isolation oxide film 19.
It is inevitable that a step difference of about nm is generated. Further, it is difficult to completely suppress the expansion of the element isolation oxide film into the element formation region.

[0008]

An object of the present invention is to provide a method of manufacturing a semiconductor device in which expansion of an element isolation oxide film into an element formation region is suppressed and a step difference between the element formation region and the element isolation oxide film is reduced. To provide.

[0009]

According to a manufacturing method of the present invention, a step of selectively etching a surface of an element isolation region of a semiconductor substrate to form a groove and a step of forming an oxidation resistant film on a side surface of the groove. And a step of forming a deeper groove in the semiconductor substrate using the oxidation resistant film as a mask, and a step of selectively oxidizing the groove portion to form an element isolation oxide film.

As a preferred manufacturing method of the present invention, a step of forming a first silicon oxide film on a semiconductor substrate, a step of depositing a first silicon nitride film on the first silicon oxide film, A step of forming a patterned photoresist on the first silicon nitride film, and using the photoresist as a mask, the first silicon nitride film, the first silicon oxide film, and the semiconductor substrate in a portion to be an element isolation region are formed. A step of selectively etching to form a groove, a step of oxidizing the surface of the semiconductor substrate having the groove to form a second silicon oxide film, and a step of depositing a second silicon nitride film on the entire surface. The second silicon nitride film is removed by etching until the second silicon oxide film in the element isolation region is exposed, and only the sidewall of the element isolation region is removed. Second silicon nitride film is left, the second silicon oxide film in the element isolation region is removed by using the first silicon nitride film and the remaining second silicon nitride film as an etching mask, and the semiconductor is further removed. It includes a step of forming a deep groove by etching the substrate and a step of selectively oxidizing the groove portion to form a silicon oxide film in the element isolation region.

The method also includes the step of removing the second silicon nitride film, the first silicon nitride film, and the first silicon oxide film after forming the silicon oxide film in the element isolation region.

[0012]

[Function] An oxide resistant film is formed on the side surface of a groove formed in a semiconductor substrate, a groove is formed deeper than this oxide resistant film, and an element isolation oxide film is grown in this groove portion. In, the element isolation oxide film is grown, the element isolation oxide film is suppressed from growing while pushing up the oxidation resistant film, it is suppressed that the end portion is expanded toward the element formation region, Moreover, it is possible to suppress the growth toward the surface of the semiconductor substrate, and it is possible to form the element isolation region in which the reduced step is reduced.

[0013]

Next, an embodiment of the present invention will be described with reference to the drawings. 1 and 2 are sectional views showing an embodiment of the present invention in the order of manufacturing steps. First, as shown in FIG. 1A, the surface of the silicon substrate 1 is thinly oxidized to a film thickness of 20 to 50 n.
m first silicon oxide film 2 is formed, and CVD is performed on the first silicon oxide film 2.
Of the first silicon nitride film 3 by the method of 100 to 200 nm
accumulate. Then, using photolithography technology,
The photoresist pattern 4 is formed only in the element formation region.

Next, as shown in FIG. 1B, the first silicon nitride film 3, the first silicon oxide film 2, and the first silicon oxide film 2 are formed by reactive ion etching (RIE) using the photoresist pattern 4 as an etching mask. The silicon substrate 1 is sequentially etched so that the silicon substrate 1 has a thickness of 30 to 100 nm.
To form the groove 1a. Then, the photoresist pattern 4 is removed.

Next, as shown in FIG. 1 (c), the surface of the silicon substrate 1 in which the groove 1a is formed is thinly oxidized,
A second silicon oxide film 5 having a film thickness of about 10 nm is formed. Further, a second silicon nitride film 6 having a thickness of 50 to 100 nm is deposited on the entire surface by the CVD method. And FIG.
As shown in (d), the groove portion 1 formed in the silicon substrate 1
In a, the second silicon nitride film 6 is etched by RIE until the second silicon oxide film 5 is exposed, and the second silicon nitride film 6 is left only on the sidewall of the element isolation region.

Next, as shown in FIG. 2A, the first silicon nitride film 3 and the second silicon nitride film 6 left on the side wall of the element isolation region are used as an etching mask.
After etching the second silicon oxide film 5 by the RIE method, the silicon substrate 1 is further etched by 30 to 100 nm to deepen the groove 1b. Then, as shown in FIG. 2B, oxidation is performed by, for example, a thermal oxidation method at 1100 ° C. to form a silicon oxide film 7 for element isolation of about 500 nm. Next, the first and second silicon nitride films 3 and 6 are removed with hot phosphoric acid, and the first silicon oxide film 2 is removed with a dilute hydrofluoric acid solution, as shown in FIG. The element isolation oxide film 7 is formed.

Therefore, in this embodiment, the rise of the bird's head portion of the element isolation oxide film 7 is the second
The height can be adjusted by the height of the bottom surface of the side wall portion of the silicon nitride film 6. Then, in the step of FIG. 1B, since the silicon substrate 1 is etched to form the groove and the side wall portion of the second silicon nitride film 6 is formed, the side wall portion is formed from the surface of the silicon substrate to the inside. The step difference between the element formation region adjusted by the height of the bottom surface and the element isolation oxide film 7 can be reduced by about 20 to 30 nm, and the step difference can be set to about 30 to 40 nm. You can Further, as a result, the expansion of the element isolation oxide film 7 into the element formation region can be made very small as compared with the conventional element isolation oxide film formation method.

Usually, in such a step portion, a difference in the film thickness of the photoresist formed thereon is likely to occur, and when the difference in the film thickness of the photoresist occurs, the optimum exposure amount also changes due to the standing wave effect of the photoresist. The size of the patterned photoresist also changes. Therefore, since the step difference between the element formation region and the element isolation oxide film can be reduced to about 30 to 40 nm, when a gate electrode of about 0.35 μm is formed, the step portion between the element formation area and the element isolation oxide film is formed by the conventional method. Of the gate electrode at 0.04μ
What was about m can be reduced to about 0.01 μm.

Further, in the step of forming the element isolation region,
Only one step is added to the conventional forming step, and the manufacturing cost hardly increases.

[0020]

As described above, according to the present invention, the surface of the element isolation region of the semiconductor substrate is selectively etched to form a groove, and an oxidation resistant film is formed on the side surface of the groove. A deeper groove is formed in the semiconductor substrate by using the film as a mask, and then the groove is selectively oxidized to form the element isolation oxide film. Therefore, the element isolation oxide film is formed on the surface lower than the oxidation resistant film. Therefore, the element isolation oxide film is suppressed from growing while pushing up the oxidation resistant film, and the end portion thereof is suppressed from expanding toward the element formation region. This reduces the planar area,
Moreover, the steps on the surface of the semiconductor substrate are alleviated, and it is possible to realize the manufacture of the element isolation region suitable for high integration of the semiconductor device.

[Brief description of drawings]

FIG. 1 is a first sectional view showing the manufacturing method of the present invention in the order of steps.

FIG. 2 is a second sectional view showing the manufacturing method of the present invention in the order of steps.

FIG. 3 is a first sectional view showing an example of the conventional manufacturing method in the order of steps.

FIG. 4 is a second sectional view showing an example of the conventional manufacturing method in the order of steps.

[Explanation of symbols]

 1 Silicon Substrate 2 First Silicon Oxide Film 3 First Silicon Nitride Film 4 Photoresist 5 Second Silicon Oxide Film 6 Second Silicon Nitride Film 7 Element Isolation Oxide Film

Claims (3)

[Claims] 1. A step of selectively etching a surface of an element isolation region of a semiconductor substrate to form a groove, a step of forming an oxidation resistant film on a side surface of the groove, and using the oxidation resistant film as a mask, A method of manufacturing a semiconductor device, comprising: a step of forming a deeper groove in a semiconductor substrate; and a step of selectively oxidizing the groove portion to form an element isolation oxide film. 2. A step of forming a first silicon oxide film on a semiconductor substrate, a step of depositing a first silicon nitride film on the first silicon oxide film, and a step of depositing a first silicon nitride film on the first silicon nitride film. A step of forming a patterned photoresist, and using the photoresist as a mask to selectively etch the first silicon nitride film, the first silicon oxide film and the semiconductor substrate in the portion to be the element isolation region A step of forming a second silicon oxide film by oxidizing the surface of the semiconductor substrate having the groove formed therein, a step of depositing a second silicon nitride film over the entire surface, and a step of depositing the second silicon nitride film. Removing the film by etching until the second silicon oxide film in the element isolation region is exposed, and leaving the second silicon nitride film only on the sidewall of the element isolation region; A step of removing the second silicon oxide film in the element isolation region by using the first silicon nitride film and the remaining second silicon nitride film as an etching mask, and further etching the semiconductor substrate to form a deep groove; And a step of selectively oxidizing the groove to form a silicon oxide film in the element isolation region. 3. A second silicon nitride film, a first silicon nitride film, after forming a silicon oxide film in the element isolation region,
2. The method of manufacturing a semiconductor device according to claim 1, including a step of removing the first silicon oxide film.