JPH02307227A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent a leakage current between an emitter and a collector and to improve reliability of a transistor by diffusing P-type impurity in a first polycrystalline silicon film in an element forming region to form an active base region, implanting N-type impurity to a first polycrystalline silicon film, and then removing the first silicon film. CONSTITUTION:An N-type epitaxial layer 2, a field oxide film 3 and an oxide film 4 are formed on a P-type semiconductor substrate 1, P-type impurity 6 is ion implanted to an element forming region to form a graft base region 7. Then, an oxide film 4 is removed, a first polycrystalline silicon film 8 containing the p-type impurity is formed, the P-type impurity of the film 8 is diffused in the element forming region by heat treating to form an active base region 10. Then, N-type impurity 11 is implanted to the film 8 to convert it to N<-> type, the film 8 is then removed, a second polycrystalline silicon film 12 containing N-type impurity is formed, and the N-type impurity of the film 12 is diffused in the active base region by heat treating to form an emitter region 14.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Conventional technology]

In conventional semiconductor devices, an active base region is formed by ion implantation through a 5102 film, polycrystalline silicon is grown by dry etching the SiO□ film, and an emitter region is formed by thermal diffusion after ion implantation. The focus was on methods.

FIGS. 3(a) to 3(e) are cross-sectional views of a semiconductor chip shown in order of steps for explaining a conventional method of manufacturing a semiconductor device.

First, as shown in FIG. 3(a), a P-type silicon substrate 1
An epitaxial layer 3 is formed thereon, and the surface of the epitaxial layer 3 is selectively oxidized to form a field oxide film 3 with a thickness of 1 μm to define an element formation region. Next, a layer of 0.25 μm is applied to the surface of the element forming region.

Next, as shown in FIG. 3(b), a polycrystalline silicon film 5 with a thickness of 0.35 μm is deposited by low pressure CVD, and the polycrystalline silicon film 5 on the graft base forming region is dry etched using CF4 or the like. Then, ions are selectively implanted in the etch 6 at an acceleration energy of 70 keV to selectively provide a craft base region 8.

Next, as shown in FIG. 3(C), a polycrystalline silicon film 5
The silicon oxide film 4 in the emitter formation region is then dry etched using CF or the like using the photoresist film 6 as a mask.

Next, as shown in FIG. 3(d), the photoresist film 16
is removed, and the polycrystalline silicon film 12 is reduced to zero by low pressure CVD.
．． Arsenic ions 11 are deposited to a thickness of 25 μm, and arsenic ions 11 are implanted into the polycrystalline silicon film 12 at an acceleration energy of 70 keV.

Next, as shown in FIG. 3(e), arsenic is doped into the active base region 10 from the polycrystalline silicon film 12 by heat treatment to form an emitter region 14.

[Problem to be solved by the invention]

In the conventional semiconductor device manufacturing method described above, since the active base region is formed in alignment with the field oxide film in the element formation region, the depth of the base region becomes shallow at the edge of the field oxide film, and Because it will be dry etched later,
Furthermore, the width of the base region is narrowed, and there is a drawback that leakage is likely to occur between the emitter and the collector.

[Means to solve the problem]

The method for manufacturing a semiconductor device of the present invention includes: (A) forming an N-type epitaxial layer on a P-type semiconductor substrate, and selectively providing a field oxide film on the surface of the epitaxial layer to define an element formation region; forming an oxide film on the surface of the element formation region; (8) selectively ion-implanting P-type impurities into the element formation region to form a graft base region; (C) removing the oxide film; , a first polycrystalline silicon film containing P-type impurities is formed on the surface including the element formation region, and P in the first polycrystalline silicon film is removed by heat treatment.
(D) forming an active base region by diffusing type impurities into the element forming region; (D) introducing an N-type impurity into the first polycrystalline silicon film to make it N- type;
(B) forming a second polycrystalline silicon film containing N-type impurities on the surface including the element formation region and removing N in the second polycrystalline silicon film by heat treatment; Diffusing type impurities into the active base region to form an emitter region.

A method for manufacturing a semiconductor device, comprising:

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1A to 1F are cross-sectional views of a semiconductor chip shown in order of steps for explaining a first embodiment of the present invention.

Next, the surface of the N-type epitaxial layer 2 is selectively oxidized to form a field oxide film 3 with a thickness of 1 μm to define an element formation region. Next, a 0.25 μm thick film was applied to the surface of the element formation region.
A silicon oxide film 4 having a thickness of .

Next, as shown in FIG. 1 et al., a polycrystalline silicon film 5 is deposited on the entire surface by low pressure CVD to a thickness of 0.35 μm, and the polycrystalline silicon film 5 on the graft base formation region is coated with CF.
Then, using the polycrystalline silicon film 5 as a mask, boron ions 6 are implanted through the 8102 film at an acceleration energy of 70 keV to form a craft base region 7.

Next, as shown in FIG. 1(C), a polycrystalline silicon film 5
is removed by wet etching using hydrofluoric acid or the like, and the silicon oxide film 4 is removed by wet etching using hydrofluoric acid or the like to expose the surface of the element formation region. Next, a polycrystalline silicon film 8 is deposited on the entire surface to a thickness of about 0.25 μm, and the inside of the polycrystalline silicon peritoneum 8 is doped by implanting boron ions 9 at an acceleration energy of 4 QkeV.

Next, as shown in FIG. 1(d), impurities are diffused from the polycrystalline silicon film 8 by thermal diffusion to form an active base region 10 on the surface of the element formation region. Next, arsenic ions 11 are implanted into the polycrystalline silicon film 8 at 50 keV to make the polycrystalline silicon film 8 N-type.

Next, as shown in FIG. 1(e), the N-type polycrystalline silicon film 8 is removed by hydrazine etching.

Here, N-
The etching rate of type polycrystalline silicon film is approximately Q, l
μm/rnin, the etching rate of P” and P-type polycrystalline silicon film is = (171m/ll1ln<l
Since the etching rate of the plane P-type single crystal silicon film is = Onm/min, selective etching of the N-type polycrystalline silicon film is possible, and the width of the edge region of the field oxide film 3 can be reduced. The arsenic ions 13 are deposited to a thickness of 0.25 .mu.m from the emitter collector while suppressing the amount of ions, and arsenic ions 13 are implanted at an acceleration energy of 70 keV.

Next, as shown in FIG. 1(f), arsenic is diffused from the polycrystalline silicon film 12 into the active base region 10 by heat treatment to form an emitter region 14.

FIGS. 2(a) to 2(f) are cross-sectional views of a semiconductor chip shown in order of steps for explaining a second embodiment of the present invention.

As shown in FIG. 2(a), an N-type epitaxial layer 2 is formed on a P-type silicon substrate 1.
A field oxide film 3 having a thickness of 1 μm is formed by selectively oxidizing the surface of the field oxide film 3 to define an element formation region. Next, after forming a silicon oxide film with a thickness of 0.2 μm on the surface of the element formation region, the silicon oxide film with a thickness of 0.25 μm is removed by wet etching using hydrofluoric acid or the like.

Next, as shown in FIG. 2(b), a polycrystalline silicon film 5
is deposited to a thickness of 0.25 μm by low pressure CVD, and boron ions 6 are implanted at an acceleration energy of 40 keV to dope the inside of the polycrystalline silicon film 5.

Next, as shown in FIG. 2(C), a silicon oxide film 15 is deposited to a thickness of 0.5 μm on the entire surface by CVD and selectively etched to open a graft base forming region.
Boron ions 9 are implanted at an acceleration energy of 40 keV to partially dope the inside of the polycrystalline silicon film 5.

Next, as shown in FIG. 2(d), the polycrystalline silicon film 5
Then, the impurities are simultaneously heat-treated to form the active base region 10 and the graft base region 7.

Next, as shown in FIG. 2(e), the silicon oxide film 13
After removing the polycrystalline silicon film 5, arsenic ions are implanted into the polycrystalline silicon film 5 at an acceleration energy of 5 QkeV to turn it into an N-type polycrystalline silicon film, which is then removed by hydrazine etching.

Next, as shown in FIG. 2(f), the polycrystalline/recon film 1
1 is formed to a thickness of 0.25 μm by low pressure CVD, arsenic ions are implanted at an acceleration energy of about 70 keV, and an emitter region 14 is formed by thermal diffusion.

In this embodiment, the graft base region 7 and the active base region 10 are formed by thermal diffusion from the same polycrystalline silicon film 5, which simplifies the process and reduces damage caused by ion implantation into single crystal silicon. It has the advantage of being possible.

〔Effect of the invention〕

As explained above, the present invention reduces the difference between the base width at the end of the affected film and the base width at the center of the active base, and also implants N-type impurities into the polycrystalline silicon film. By removing the polycrystalline silicon layer by hydrazine etching after converting it to N-type, excessive etching at the edge of the field oxide film is prevented, leakage current between the emitter and collector is prevented, and the reliability of the transistor is improved. It has the effect of causing

2(a) to 2(f) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining the embodiment of the present crystal 2, and FIG.
1A to 1E are cross-sectional views of a semiconductor chip shown in the order of steps for explaining a conventional method for manufacturing a semiconductor device.

1... P-type silicon substrate, 2... N-type epitaxial layer, 3... field oxide film,
4... Silicon oxide film, 5... Polycrystalline silicon film, 6... Boron ion, 7...
... Graft base region, 8 ... Polycrystalline silicon film, 9 ... Boron ion, 10 ...
Active base region, 11... Arsenic ion, 12.
...Polycrystalline silicon film, 13...Arsenic ion, 14...Emitter region, 15...
- Silicon oxide film, 16... photoresist film.

Agent Patent Attorney Susumu Uchihara Man 7 figure Figure 1 Figure 3 Figure 3

Claims (1)

Scope of Claims: (A) An N-type epitaxial layer is formed on a P-type semiconductor substrate, a field oxide film is selectively provided on the surface of the epitaxial layer to define an element formation region, and the element formation region is (B) forming a graft base region by selectively ion-implanting P-type impurities into the element formation region; (C) removing the oxide film and forming the element formation region; A first polycrystalline silicon film containing P-type impurities is formed on the surface including the region, and the P-type impurities in the first polycrystalline silicon film are diffused into the element formation region by heat treatment to form an active base region. (D) removing the first polycrystalline silicon film after introducing an N-type impurity into the first polycrystalline silicon film to make it N^-type; (E) removing the first polycrystalline silicon film; (E) removing the first polycrystalline silicon film; forming a second polycrystalline silicon film containing N-type impurities on a surface containing the active base region, and diffusing the N-type impurities in the second polycrystalline silicon film into the active base region by heat treatment to form an emitter region; A method for manufacturing a semiconductor device, comprising the steps of: