JPH0766278A - Manufacture of semiconductor element - Google Patents

Abstract

PURPOSE:To manufacture an excellent semiconductor element which is restrained from increasing in junction leakage current by a method wherein the impurity diffusion layer of an element region is provided apart from a field oxide film. CONSTITUTION:In a semiconductor element manufacturing method wherein element isolation is carried out through a LOCOS method, a first process wherein a field oxide film 4 is formed, a silicon oxide film and a pad oxide film are removed, and then an NSG film 6 is formed, a second process wherein impurity ions are implanted, and annealing is executed, and a third process wherein the NSG film 6 is subjected to photolithographic etching for the formation of an element region 8 are provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for separating the device.

[0002]

2. Description of the Related Art Conventionally, as a typical device isolation method in LSI, a LOCOS is used in which a silicon oxide film is covered with a silicon nitride film in a device region for selective oxidation to form a thick oxide film (field oxide film) for device isolation. (Loca
1 Oxidation Of Silicon) method is widely used.

[0003]

However, the above-mentioned conventional method has a problem as shown in FIG.
That is, as shown in FIG. 3A, stress is generated in the silicon substrate 101 during field oxidation, and carrier generation / recombination centers 10 are formed below the field oxide film 103.
4 occurs.

Therefore, the silicon nitride film 102 and the thin oxide film (pad oxide film) 105 thereunder are removed to form an element region, and the impurity diffusion layer 10 is formed by ion implantation or the like.
3B, the depletion layer 107 extending to the junction between the impurity diffusion layer 106 and the silicon substrate 101 has a carrier generation / recombination center distribution 10 as shown in FIG. 3B.
4 and there is a problem that the junction leak current increases when a reverse bias is applied to the junction.

The present invention eliminates the problem that the junction leak current in the peripheral portion of the element region increases when the LOCOS method is used, and the impurity diffusion layer in the element region is separated from the field oxide film. It is an object of the present invention to provide an excellent method for manufacturing a semiconductor element in which the junction leakage current is suppressed from increasing.

[0006]

In order to achieve the above object, the present invention provides a method of manufacturing a semiconductor device in which device isolation is performed by using a LOCOS method, in which a field oxide film is formed and a silicon nitride film and a pad oxide film are formed. After removing the film, a step of forming an insulating film, a step of performing ion implantation of impurities, and an annealing step, and a step of performing photolitho etching of the insulating film to form an element region are performed in order. It is a thing.

Further, a step of forming a field oxide film, removing the silicon nitride film and the pad oxide film, and then forming an insulating film, and anisotropic etching are performed to remove the insulating film from the insulating film at the end portion of the field oxide film. The step of forming the side wall and the step of performing ion implantation of impurities and annealing are sequentially performed. Further, a step of forming a field oxide film, removing the silicon nitride film and the pad oxide film, and then forming a polycrystalline silicon film, and using anisotropic etching to form polycrystalline silicon at the end of the field oxide film. A step of forming a sidewall, a step of performing a heat treatment in an oxygen atmosphere to oxidize the sidewall made of the polycrystalline silicon, an ion implantation of impurities,
And the step of performing annealing are sequentially performed.

[0008]

According to the present invention, in the method of manufacturing a semiconductor device for element isolation using the LOCOS method described above, a depletion layer of a junction between an impurity diffusion layer and a silicon substrate is spread below a field oxide film. To prevent this, when forming the impurity diffusion layer, a material serving as a mask for forming the impurity diffusion layer is previously formed at the boundary between the field oxide film and the element region.

Therefore, the impurity diffusion layer in the element region is
Since it is formed apart from the field oxide film, it is possible to suppress an increase in junction leak current when a reverse bias is applied to the junction.

[0010]

Embodiments of the present invention will be described in detail below with reference to the drawings. 1 is a sectional view (No. 1) of a manufacturing process of a semiconductor device showing an embodiment of the present invention, and FIG. 2 is a sectional view (No. 2) of a manufacturing process of the semiconductor device. (1) First, as shown in FIG. 1A, the P-type silicon substrate 1 is heat-treated in an oxygen atmosphere at 950 ° C. for 60 minutes to form a pad oxide film 2 of 300 Å.

(2) Next, as shown in FIG.
The silicon nitride film 3 is formed into a film having a thickness of 1500 Å by the PCVD method. (3) Next, as shown in FIG. 1C, photolithography etching is performed to pattern the silicon nitride film 3 and the pad oxide film 2. (4) Next, the boron (B) ion is 2 × at 30 KeV.
^Implant 10 ¹³ cm ^-2 ions. Next, as shown in FIG. 1D, wet O ₂ oxidation is performed at 1000 ° C. for 130 minutes to form a field oxide film 4 having a thickness of 6000Å. At this time, the previously ion-implanted boron (B) is diffused and activated, and the channel stop diffusion layer 5 is formed.

(5) Next, as shown in FIG. 2A, the wafer is dipped in a hot phosphoric acid solution and a hydrofluoric acid solution to remove the silicon nitride film 3 and the pad oxide film 2, and the P-type silicon substrate 1 Expose. (6) Next, as shown in FIG. 2B, an NSG (non-doped silicate glass) film 6 is formed by 1000 Å by the CVD method.

(7) Next, as shown in FIG.
Arsenic (As) ions at 150 KeV, 5 × 10 ¹⁵ cm
^-2 Ion implantation. Then, heat treatment is performed at 850 ° C. for 30 minutes in an N ₂ atmosphere to form the N type diffusion layer 7. (8) Finally, as shown in FIG. 2D, photolithography etching is performed to form a new element region 8.

With this structure, the N-type diffusion layer 7 is formed apart from the field oxide film 4, so that even if a reverse bias is applied to the junction between the N-type diffusion layer 7 and the P-type silicon substrate 1. Since the depletion layer does not spread under the field oxide film 4, it is possible to prevent an increase in junction leak current. Next, a second embodiment of the present invention will be described.

FIG. 4 is a sectional view of a semiconductor device manufacturing process showing the second embodiment of the present invention. (1) First, as shown in FIG.
Similar to (b), on the P-type silicon substrate 1 on which the field oxide film 4 and the channel stop diffusion layer 5 are formed,
An NSG film 6 of 1000 Å is formed by a CVD method. (2) Next, when reactive ion etching is performed, since the reactive ion etching has a strong anisotropy, as shown in FIG. 4B, the sidewall 11 made of NSG is formed on the end of the field oxide film 4. It is formed.

(3) Thereafter, arsenic (As) ions are added to 30
KeV 5 × 10 ¹⁵ cm ^-2 ion implantation, 850 ° C.
By performing heat treatment for 30 minutes, the N-type diffusion layer 12 is formed and a new element region 13 is formed, as shown in FIG.
Can be formed, and an increase in junction leakage current can be prevented for the same reason as in the first embodiment. In the first embodiment, a photolithography etching step was required to form the new element region 8. However, in the second embodiment, the new element region 13 is the same as the original element region. Since it is formed in a self-aligned manner, it has an advantage that no new photolithography etching step is required.

Next, a third embodiment of the present invention will be described. FIG. 5 is a sectional view of a semiconductor device manufacturing process showing the third embodiment of the present invention. In this embodiment, N of the second embodiment is used.
A polycrystalline silicon film is used instead of the SG film 6. (1) First, as shown in FIG.
Similar to (a), the polycrystalline silicon film 21 is formed on the P-type silicon substrate 1 on which the field oxide film 4 and the channel stop diffusion layer 5 are formed by the CVD method at 1000Å.

(2) Next, when reactive ion etching is performed, since the reactive ion etching has a strong anisotropy, as shown in FIG. 5B, the side wall 22 made of the polycrystalline silicon film 21 is removed. It is formed. (3) Next, when heat treatment is performed at 900 ° C. for 60 minutes in an oxygen atmosphere, the surface of the P-type silicon substrate 1 is thinly oxidized, and an oxide film 23 is formed as shown in FIG. 5C. At the same time, the sidewall 22 made of the polycrystalline silicon film 21 is formed.
Is also oxidized. When the polycrystalline silicon film 21 is oxidized, the volume thereof is approximately doubled.
4 is larger than the side wall 22 before oxidation.

(4) Thereafter, arsenic (As) ions are added to 40
KeV, 5 × 10 ¹⁵ cm ⁻² ion implantation, and 850 ° C.
By performing heat treatment for 30 minutes and immersing in a hydrofluoric acid solution for a short time, an N-type diffusion layer 25 and a new element region 26 are formed as shown in FIG. 5D. With this structure, the area of the new element region 26 is smaller than that of the second embodiment, but the N-type diffusion layer 25 can be further separated from the field oxide film 4 as compared with the second embodiment. it can.

The present invention is not limited to the above embodiments, and various modifications can be made within the spirit of the present invention, which are not excluded from the scope of the present invention.

[0021]

As described above in detail, according to the present invention, in the method of manufacturing a semiconductor element for element isolation using the LOCOS method, an impurity diffusion layer and a silicon substrate are formed below the field oxide film. In order to prevent the depletion layer of the junction from spreading, when forming the impurity diffusion layer, a substance that serves as a mask for forming the impurity diffusion layer was previously formed at the boundary between the field oxide film and the element region, so that the impurity diffusion Since the layer is formed apart from the field oxide film, it is possible to suppress an increase in junction leakage current when a reverse bias is applied to the junction.

[Brief description of drawings]

FIG. 1 is a manufacturing process sectional view (1) of a semiconductor device showing an embodiment of the present invention.

FIG. 2 is a cross-sectional view (No. 2) of a manufacturing process of a semiconductor element showing an embodiment of the present invention.

FIG. 3 is a diagram illustrating a problem of the conventional technique.

FIG. 4 is a sectional view of a semiconductor device in the manufacturing process showing the second embodiment of the present invention.

FIG. 5 is a sectional view of a semiconductor device in the manufacturing process showing the third embodiment of the present invention.

[Explanation of symbols]

 1 P-type silicon substrate 2 Pad oxide film 3 Silicon nitride film 4 Field oxide film 5 Channel stop diffusion layer 6 NSG film 7, 12, 25 N-type diffusion layer 8, 13, 26 Element region 11 Side wall (NSG) 21 Polycrystal Silicon film 22,24 Side wall (polycrystalline silicon film) 23 Oxide film

Claims (3)

[Claims] 1. A method of manufacturing a semiconductor device for device isolation using a LOCOS method, comprising: (a) forming a field oxide film, removing a silicon nitride film and a pad oxide film, and then forming an insulating film. And (b) ion implantation of impurities and annealing, and (c) photolithographic etching of the insulating film to form an element region in this order. . 2. A method of manufacturing a semiconductor device for device isolation using a LOCOS method, which comprises: (a) forming a field oxide film, removing a silicon nitride film and a pad oxide film, and then forming an insulating film. And (b) a step of forming a sidewall made of the insulating film at the end of the field oxide film by anisotropic etching, and (c) ion implantation of impurities and annealing. A method for manufacturing a characteristic semiconductor device. 3. A method for manufacturing a semiconductor device for device isolation using a LOCOS method, comprising: (a) forming a field oxide film, removing a silicon nitride film and a pad oxide film, and then forming a polycrystalline silicon film. And (b) forming a sidewall made of polycrystalline silicon at the end of the field oxide film by anisotropic etching, and (c) performing a heat treatment in an oxygen atmosphere to form the polycrystalline silicon. A method of manufacturing a semiconductor element, which comprises sequentially performing a step of oxidizing a sidewall and (d) a step of implanting an impurity ion and an annealing step.