JPS61294896A - Manufacture of multilayer printed circuit board - Google Patents

Manufacture of multilayer printed circuit board

Info

Publication number
JPS61294896A
JPS61294896A JP13600685A JP13600685A JPS61294896A JP S61294896 A JPS61294896 A JP S61294896A JP 13600685 A JP13600685 A JP 13600685A JP 13600685 A JP13600685 A JP 13600685A JP S61294896 A JPS61294896 A JP S61294896A
Authority
JP
Japan
Prior art keywords
hole
printed circuit
circuit board
multilayer printed
holes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13600685A
Other languages
Japanese (ja)
Inventor
大幸 洋一
鳥羽 律司
大木 伸昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13600685A priority Critical patent/JPS61294896A/en
Publication of JPS61294896A publication Critical patent/JPS61294896A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は印刷回路板に係り、特に高密度が要求される電
子機器に好適な多層印刷回路板の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a printed circuit board, and particularly to a method for manufacturing a multilayer printed circuit board suitable for electronic equipment requiring high density.

〔発明の背景〕[Background of the invention]

従来の多層印刷回路板の製造方法は、例えば(株)東芝
回路基板部編(応用技術出版刊)「プリント基板技術と
その品質保証J第278〜280頁に記載のように、積
層板または銅張積層板に回路パターンを形成した内層材
を2枚以上ガラスクロスに樹脂を含浸し半硬化状態とし
た接着材ノーを間にはさんで積層し、加圧加熱して一体
化した後に多層印刷回路板全体を貫通する穴をあけ、こ
の穴に銅めつきを施して外層パターンと内層パターンあ
るいは内層パターン同志の接続を行っていた。
Conventional methods for manufacturing multilayer printed circuit boards include, for example, printed circuit board technology and its quality assurance J, pp. 278-280, edited by Toshiba Corporation's Circuit Board Department (published by Applied Technology Publishing). Two or more inner layer materials with a circuit pattern formed on a stretched laminate are laminated with a semi-cured adhesive material made of resin-impregnated glass cloth sandwiched between them, and then integrated by pressure and heating, followed by multilayer printing. Holes were drilled through the entire circuit board, and these holes were plated with copper to connect the outer layer patterns to the inner layer patterns, or to connect the inner layer patterns to each other.

一方、最近の半導体素子の高密度化および高速化に伴っ
て多層印刷回路板も一層の高密度化が求められており、
このため板厚が厚くかつ穴径が小さくなる傾向にある。
On the other hand, with the recent increase in the density and speed of semiconductor devices, there is a need for even higher density multilayer printed circuit boards.
For this reason, the plate thickness tends to be large and the hole diameter tends to be small.

その結果、従来の方法を適用すると細く深い穴に対して
穴あけと銅めっきが必要となり、穴あけ工程ではドリル
折れ、銅めつき工程では穴にめっき液が侵透しK<<信
頼性が問題となってきている。
As a result, when conventional methods are applied, drilling and copper plating are required for narrow and deep holes, the drill breaks during the drilling process, and the plating solution penetrates into the hole during the copper plating process, causing problems with reliability. It has become to.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、従来の方法で問題となっているドリル
による貫通穴あけと貫通穴めっきを行わない多層印刷回
路板の製造方法を提供することにある。
An object of the present invention is to provide a method for manufacturing a multilayer printed circuit board that does not require through-hole drilling and through-hole plating, which are problems in conventional methods.

〔発明の概要〕[Summary of the invention]

発明者らは多層印刷回路板に対してドリルによる貫通穴
あけと貫通穴めっきを行う代りに、すなわち本発明は、
両面に銅箔を張った積層板に穴をあけ、少なくとも1つ
の最外層を除いて回路パターンを形成した後、複数枚の
積層板を間に接着剤を介して加熱圧着して基板を形成し
、その後積み重ねられた穴にレーザを照射してこれら穴
を基板の貫通孔として貫通させた後各層間の導通をはか
るべく最外層からこの貫通孔に導電、性液着剤を供給す
る多層印刷回路板の製造方法を特徴とする。
Instead of drilling through holes and plating through holes in a multilayer printed circuit board, the present invention
Holes are made in a laminate with copper foil on both sides, a circuit pattern is formed except for at least one outermost layer, and then multiple laminates are bonded under heat and pressure with an adhesive between them to form a board. After that, the stacked holes are irradiated with a laser to penetrate these holes as through holes in the substrate, and then a conductive liquid adhesive is supplied from the outermost layer to the through holes to establish continuity between each layer.A multilayer printed circuit is created. It is characterized by the method of manufacturing the board.

〔発明の実施例〕[Embodiments of the invention]

以下本発明の一実施例について図面を用いて説明する。 An embodiment of the present invention will be described below with reference to the drawings.

第1図は積層板1から多層印刷回路板が製造される過程
を断面図で示すものである。両面に銅が張られた積層板
1に穴2をあけ、積層板1の上面と下面を接続するよう
に銅めっき3を施す。その後(di 、 、tel 、
げ)に示すように、よく知られた方法により回路パター
ンを形成する。ただし一番外側の最外層6と下側の最外
層6には回路パターンを形成しない。なお最外層6と最
外層6との間で立体的な回路接続を行いたい穴2につい
ては、バッド4を設ける。次に最外層6.6が外表面と
なるように間に接着剤7をはさんでこれら積層板1を積
層し、加圧加熱して一体化すると第1図(F)に示す基
板ができあがる。
FIG. 1 is a sectional view showing the process of manufacturing a multilayer printed circuit board from a laminate 1. As shown in FIG. A hole 2 is made in a laminate plate 1 with copper coated on both sides, and copper plating 3 is applied so as to connect the upper and lower surfaces of the laminate plate 1. Then (di, ,tel,
A circuit pattern is formed by a well-known method, as shown in Fig. However, no circuit pattern is formed on the outermost layer 6 and the lower outermost layer 6. Note that a pad 4 is provided for each hole 2 where it is desired to make a three-dimensional circuit connection between the outermost layers 6. Next, these laminate plates 1 are laminated with adhesive 7 in between so that the outermost layer 6.6 becomes the outer surface, and the substrate shown in FIG. 1 (F) is completed by pressurizing and heating to integrate. .

このとき穴2は接着剤7によって埋められるので、この
基板上を炭酸ガスレーザ8により走査し、穴2内の接着
剤7を蒸発させて除去することにより貫通穴9を形成す
る。なお積層板1を加圧加熱して積層一体化するとき、
それぞれの積層板1が互いに位置ずれを起こし、穴2の
位置が多少ずれることがあり得る。しかし穴2に照射さ
れた炭酸ガスレーザ8は鋼めっき3上で反射され、これ
によって銅めっき3および銅箔が加熱されその周辺の接
着剤7を加熱し蒸発させる。穴2への炭酸ガスレーザ8
の照射により穴2内の接着剤7の多くは蒸発飛散するが
、穴2内に溶融した樹脂のカスが多少残る。このよ除去
することができる。
At this time, the hole 2 is filled with the adhesive 7, so the carbon dioxide laser 8 scans the substrate, and the adhesive 7 in the hole 2 is evaporated and removed, thereby forming the through hole 9. Note that when the laminate plate 1 is heated under pressure to integrate the laminate,
The respective laminated plates 1 may be misaligned with each other, and the positions of the holes 2 may be slightly misaligned. However, the carbon dioxide laser 8 irradiated into the hole 2 is reflected on the steel plating 3, thereby heating the copper plating 3 and the copper foil, thereby heating and vaporizing the adhesive 7 around the copper plating 3. Carbon dioxide laser 8 to hole 2
Although most of the adhesive 7 in the hole 2 evaporates and scatters due to the irradiation, some molten resin residue remains in the hole 2. This can be removed.

次に第1図(i)に示すように、ペースト印刷の手法に
より、最外層6上について導電性接着剤10をスキージ
11によって掃引すると1貫通穴9内部に導電性接着剤
10が充てんするので、このままの状態で導電性接着剤
10を硬化させる。
Next, as shown in FIG. 1(i), when the conductive adhesive 10 is swept over the outermost layer 6 with a squeegee 11 using a paste printing method, the inside of the first through hole 9 is filled with the conductive adhesive 10. Then, the conductive adhesive 10 is cured in this state.

このとき導電性接着剤10の熱膨張係数を基板の垂直方
向の熱膨張係数に等しくしておけば、温度サイクルによ
り基板が伸び縮みしても導電性接着剤10と貫通穴9周
辺の銅めっき3との間にはひずみが生じないので、導電
性接着剤1oと銅めつき3との密着不良あるいは導電性
接着剤1゜内部にクラックなどが発生しない。基板の垂
直方向の熱膨張係数とは、銅めつき6あるいは銅箔の熱
膨張係数と後着剤7あるいは基材を構成する樹脂の熱膨
張係数とを荷重平均したものと考えられる。樹脂に銅等
金属の粉末を混ぜ合わせたものKよって導電性接着剤1
0を構成することにより、導電性接着剤10の熱膨張係
数を基板の垂直方向の熱膨張係数にほぼ合わせることが
可能である。
At this time, if the coefficient of thermal expansion of the conductive adhesive 10 is made equal to the coefficient of thermal expansion in the vertical direction of the board, even if the board expands and contracts due to temperature cycles, the conductive adhesive 10 and the copper plating around the through hole 9 will remain intact. Since no strain occurs between the conductive adhesive 1o and the copper plating 3, poor adhesion between the conductive adhesive 1o and the copper plating 3 or cracks do not occur inside the conductive adhesive 1o. The vertical thermal expansion coefficient of the substrate is considered to be the weighted average of the thermal expansion coefficient of the copper plating 6 or copper foil and the thermal expansion coefficient of the post-adhesive 7 or the resin constituting the base material. Conductive adhesive 1 made by mixing resin with metal powder such as copper
By configuring 0, the thermal expansion coefficient of the conductive adhesive 10 can be approximately matched to the vertical thermal expansion coefficient of the substrate.

次に基板表面に付着した導電性接着剤10を除去した後
、最外層6および6の外層パターンを形成すると、第1
図(J)に示すように導電性接着剤10によって各層回
路パターン間の接続が行われた多層印刷回路板ができあ
がる。
Next, after removing the conductive adhesive 10 attached to the substrate surface, the outermost layer 6 and the outer layer pattern of 6 are formed.
As shown in Figure (J), a multilayer printed circuit board is completed in which the circuit patterns of each layer are connected by the conductive adhesive 10.

なお上記実施例では、穴2内の接着剤7を溶融蒸発させ
るために炭酸ガスレーザを用いているが、樹脂を浴融蒸
発させるレーザならば、アルゴンレーザなど他のレーザ
を用いてもよい。
In the above embodiment, a carbon dioxide laser is used to melt and evaporate the adhesive 7 in the hole 2, but other lasers such as an argon laser may be used as long as the laser melts and evaporates the resin in a bath.

また最外層6は最外1−6とともに後から回路パターン
を形成しているが、最外層6についてあらかじめ回路パ
ターンを形成しておいてもよい。
Furthermore, although the circuit pattern is formed on the outermost layer 6 together with the outermost layer 1-6 later, the circuit pattern may be formed on the outermost layer 6 in advance.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、多層印刷回路板を製造する際ドリルに
よる貫通穴あけと銅めつき工程を省くことができる。こ
のため従来問題となっていたドリル折れと銅めつきの信
頼性も考える必要がない。また、工程上も長時間を要す
る工程が省けることから原価低減が可能となる。
According to the present invention, it is possible to omit through-hole drilling and copper plating steps when manufacturing a multilayer printed circuit board. Therefore, there is no need to consider the reliability of drill breakage and copper plating, which were problems in the past. Furthermore, since processes that require a long time can be omitted, costs can be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の工程を示す積層板および基
板の断面図である。 1・・・積層板       2・・・穴6・・・銅め
つき      4・・・パッド6.6・・・最外層 
    7・・・接着剤8・・・炭酸ガスレーザ 9・・・貫通穴       10・・・導電性接着剤
11・・・スキージ。
FIG. 1 is a sectional view of a laminate and a substrate showing the steps of an embodiment of the present invention. 1... Laminated board 2... Hole 6... Copper plating 4... Pad 6. 6... Outermost layer
7... Adhesive 8... Carbon dioxide laser 9... Through hole 10... Conductive adhesive 11... Squeegee.

Claims (1)

【特許請求の範囲】[Claims]  両面に銅箔を張つた積層板に穴をあけ、少なくとも1
つの最外層を除いて回路パターンを形成した後、複数枚
の前記積層板を間に接着剤を介して加熱圧着して基板を
形成し、その後積み重ねられた前記穴にレーザを照射し
てこれら穴を基板の貫通孔として貫通させた後、各層間
の導通をはかるべく前記最外層から前記貫通孔に導電性
接着剤を供給することを特徴とする多層印刷回路板の製
造方法。
Drill holes in a laminate with copper foil on both sides, and make at least 1 hole.
After forming a circuit pattern except for the outermost layer, a plurality of laminates are heat-pressed with an adhesive between them to form a substrate, and then the stacked holes are irradiated with a laser to form the holes. A method for manufacturing a multilayer printed circuit board, comprising: passing through the substrate as a through hole, and then supplying a conductive adhesive from the outermost layer to the through hole in order to establish electrical conduction between each layer.
JP13600685A 1985-06-24 1985-06-24 Manufacture of multilayer printed circuit board Pending JPS61294896A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13600685A JPS61294896A (en) 1985-06-24 1985-06-24 Manufacture of multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13600685A JPS61294896A (en) 1985-06-24 1985-06-24 Manufacture of multilayer printed circuit board

Publications (1)

Publication Number Publication Date
JPS61294896A true JPS61294896A (en) 1986-12-25

Family

ID=15164984

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13600685A Pending JPS61294896A (en) 1985-06-24 1985-06-24 Manufacture of multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JPS61294896A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5864097A (en) * 1981-10-14 1983-04-16 株式会社日立製作所 Method of producing multilayer printed circuit board
JPS58121699A (en) * 1982-01-13 1983-07-20 富士通株式会社 Method of forming multilayer wiring for hybrid integrated circuit board
JPS61288495A (en) * 1985-06-17 1986-12-18 古河電気工業株式会社 Manufacture of multilayer circuit board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5864097A (en) * 1981-10-14 1983-04-16 株式会社日立製作所 Method of producing multilayer printed circuit board
JPS58121699A (en) * 1982-01-13 1983-07-20 富士通株式会社 Method of forming multilayer wiring for hybrid integrated circuit board
JPS61288495A (en) * 1985-06-17 1986-12-18 古河電気工業株式会社 Manufacture of multilayer circuit board

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