JPH11112149A - Multilayered printed wiring board - Google Patents

Multilayered printed wiring board

Info

Publication number
JPH11112149A
JPH11112149A JP28123297A JP28123297A JPH11112149A JP H11112149 A JPH11112149 A JP H11112149A JP 28123297 A JP28123297 A JP 28123297A JP 28123297 A JP28123297 A JP 28123297A JP H11112149 A JPH11112149 A JP H11112149A
Authority
JP
Japan
Prior art keywords
prepreg
base material
wiring board
printed wiring
foil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28123297A
Other languages
Japanese (ja)
Inventor
Masakazu Iino
正和 飯野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Elna Co Ltd
Original Assignee
Elna Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elna Co Ltd filed Critical Elna Co Ltd
Priority to JP28123297A priority Critical patent/JPH11112149A/en
Publication of JPH11112149A publication Critical patent/JPH11112149A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a highly reliable multilayered printed wiring board which can be manufactured easily and in which layers are surely connected to each other. SOLUTION: A multilayered printed wiring board is formed by laminating a first substrate composed of conductor foil, or an insulating substrate 11 laminating conductor foil 12 on at least one surface, and having conductive bumps 13 formed on the foil 12, and a second substrate 16 composed of a prepreg 14 which has through holes 15 formed through the prepreg 14 with a laser beam at the positions corresponding to the bumps 13, and press forming the laminated body.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は多層プリント配線板
に関する。
The present invention relates to a multilayer printed wiring board.

【0002】[0002]

【従来の技術】多層プリント配線板において層間接続
は、例えばスル−ホ−ルめっきにより行われている。こ
れは絶縁性基材の両面に銅箔を熱圧着し、穴あけ後銅メ
ッキを施し、その後レジストを形成してからハンダメッ
キを施した後、レジストを剥離し、剥離箇所をエッチン
グしてからハンダメッキを剥離するようにして製造され
る。しかしながら、このような方法は、NCドリルマシ
ンでの穴あけ加工、銅メッキ、ハンダメッキ及びハンダ
メッキの剥離などの工程が必要でコストが高くなるとい
う欠点があった。
2. Description of the Related Art In a multilayer printed wiring board, interlayer connection is performed by, for example, through-hole plating. This is done by thermocompression bonding copper foil on both sides of the insulating substrate, drilling copper plating, then forming a resist, then solder plating, peeling off the resist, etching the peeled area, and then soldering. It is manufactured by peeling the plating. However, such a method has a drawback in that it requires steps such as drilling with an NC drill machine, copper plating, solder plating, and peeling of the solder plating, resulting in high costs.

【0003】そこで最近では、導電性ペ−ストからなる
バンプにより銅導体層間の接続を行う方法が提案されて
いる。この方法は図2aのように絶縁性基材Pの表面に
形成された銅箔1上に銀ペ−ストなどにより、先端の尖
った円錐形状のバンプ2を形成し、銅箔のバンプが形成
された面側に、強度を得るためガラスクロスが入った絶
縁性の樹脂シ−トからなるプリプレグ3を配置し(図2
b)、さらにその上に別の銅箔5を配置した後(図2
d)、これらを加熱しながら積層成形プレスして接着す
るもので(図2e)、導電性ペ−ストからなるバンプが
プリプレグを貫通して他方の銅箔に接合して層間接続を
確保するものである。この方法では穴あけ加工やメッキ
工程及びその剥離工程が不要となる。
Therefore, recently, a method of connecting between copper conductor layers by using bumps made of conductive paste has been proposed. In this method, as shown in FIG. 2A, a conical bump 2 having a sharp tip is formed on a copper foil 1 formed on the surface of an insulating base material P by silver paste or the like, and a bump of the copper foil is formed. A prepreg 3 made of an insulating resin sheet containing a glass cloth for obtaining strength is arranged on the side of the surface (FIG. 2).
b) After further arranging another copper foil 5 thereon (FIG. 2)
d), these are laminated by pressing while heating and bonded (FIG. 2e), and bumps made of conductive paste penetrate through the prepreg and are joined to the other copper foil to ensure interlayer connection. It is. This method eliminates the need for drilling, plating, and stripping.

【0004】[0004]

【発明が解決しようとする課題】しかしこの導電性ペ−
ストからなるバンプと絶縁性のプリプレグを用いる方法
では、バンプがプリプレグを貫通しない箇所ができ銅箔
とバンプとの間に絶縁物質が残って接続不良になる可能
性があった。そのためバンプの形状の管理を強化した
り、バンプが確実にプリプレグを貫通するよう多層成形
プレスに先立って、図2cのようなバンプ通し工程を行
っていた。すなわち多層成形プレスに先立って、あらか
じめ予備加熱を施した後に図2cのようにホットロ−ル
4間を通すことにより、バンプ2を確実にプリプレグ3
に貫通させるものである。しかしバンプ通し工程の際
に、プリプレグを加熱しすぎるとプリプレグの初期特性
(絶縁性など)が劣化するおそれがあった。
However, this conductive paper
In the method using a bump made of a strike and an insulating prepreg, there is a possibility that a portion where the bump does not penetrate the prepreg is formed, an insulating material remains between the copper foil and the bump, and connection failure occurs. Therefore, prior to the multi-layer forming press, a bump passing step as shown in FIG. 2C was performed to enhance the management of the shape of the bump and to ensure that the bump penetrates the prepreg. That is, prior to the multi-layer forming press, the pre-heating is performed in advance, and then the hot rolls 4 are passed between the hot rolls 4 as shown in FIG.
Through. However, if the prepreg is heated too much during the bump passing step, the initial properties (such as insulating properties) of the prepreg may be deteriorated.

【0005】さらにこの方法はバンプがプリプレグを貫
通する際に塵(コンタミ)が発生しやすく、これらが銅
箔面上に付着して平滑性を阻害し接着不良などの原因と
なっていた。
Further, in this method, dust (contamination) is apt to be generated when the bump penetrates the prepreg, and these adhere to the copper foil surface, impairing the smoothness and causing poor adhesion.

【0006】本発明は、簡略に製造でき、しかも層間接
続が確実な信頼性の高い多層プリント配線板を提供する
ことを目的としている。
SUMMARY OF THE INVENTION An object of the present invention is to provide a highly reliable multilayer printed wiring board which can be manufactured simply and has a reliable interlayer connection.

【0007】[0007]

【課題を解決するための手段】本発明の多層プリント配
線板は、導電体箔または少なくとも片面に導電体箔が積
層された絶縁性基材からなり導電体箔上に導電性のバン
プが形成されてなる第一の基材と、このバンプに相応す
る箇所にレ−ザにより貫通孔があけられている、第一の
基材上に配置されたプリプレグと、プリプレグの上に配
置される導電体箔からなる第二の基材とを積層して多層
成形プレスしてなることを特徴とする。
A multilayer printed wiring board according to the present invention comprises a conductive foil or an insulating base material having a conductive foil laminated on at least one side, and a conductive bump is formed on the conductive foil. A first base material, a prepreg disposed on the first base material, and a conductor disposed on the prepreg, wherein a through hole is formed by a laser at a location corresponding to the bump. It is characterized in that it is laminated with a second base material made of foil and pressed by multi-layer molding.

【0008】第一の基材は、銅箔などの導電体箔や、あ
るいは絶縁性基材の片面または両面に銅箔が積層された
銅張積層板などの導電体箔張積層体であることができ
る。銅箔の場合厚さは例えば0.012mm〜0.01
8mmであることができる。また絶縁性基材の場合は、
紙基材フェノ−ル樹脂基板やガラス布基材エポキシ樹脂
基板などからなり、その厚さは例えば0.06〜1.1
mmである。またその上に形成された銅箔などの導電体
箔の厚さは例えば0.012〜0.035mmである。
The first substrate is a conductor foil such as a copper foil or a conductor foil-clad laminate such as a copper-clad laminate in which a copper foil is laminated on one or both sides of an insulating substrate. Can be. In the case of copper foil, the thickness is, for example, 0.012 mm to 0.01.
It can be 8 mm. In the case of an insulating substrate,
It is made of a paper-based phenol resin substrate or a glass cloth-based epoxy resin substrate, and has a thickness of, for example, 0.06 to 1.1.
mm. The thickness of the conductor foil such as a copper foil formed thereon is, for example, 0.012 to 0.035 mm.

【0009】導電性のバンプは、銀ペ−スト、金ペ−ス
ト、銅ペ−ストなどの導電性のペ−ストを用いて形成さ
れるのが好ましく、その形成には例えば印刷法などが用
いられる。バンプの形状は自由であるが、少なくとも先
端はプリプレグに設けられた貫通孔に入り易いように形
成されるのが好ましい。
The conductive bump is preferably formed using a conductive paste such as a silver paste, a gold paste, or a copper paste. Used. Although the shape of the bump is free, it is preferable that at least the tip is formed so as to easily enter a through hole provided in the prepreg.

【0010】プリプレグとしては、ガラスクロス入りの
またはガラスクロスが入っていない絶縁性樹脂からなる
シ−トや、フィルム、板材などであることができる。絶
縁性樹脂としては例えばエポキシ樹脂やフッ素樹脂が使
用できる。プリプレグの厚さは絶縁性が得られる厚さで
あればよいが例えば0.04〜0.2mmぐらいになさ
れる。
The prepreg may be a sheet made of an insulating resin containing glass cloth or not containing glass cloth, a film, a plate material or the like. For example, an epoxy resin or a fluorine resin can be used as the insulating resin. The thickness of the prepreg may be any thickness as long as the insulating property can be obtained, and is, for example, about 0.04 to 0.2 mm.

【0011】プリプレグには第一の基材のバンプに相応
する箇所にレ−ザにより貫通孔があけられ、貫通孔に入
った第一の基材のバンプが第二の基材の導電体箔に接合
できるようになされる。レ−ザとしては短パルスCO2
レ−ザや、エキシマレ−ザ、YAGレ−ザなどを用いる
ことができる。貫通孔の大きさはそれに入り込むバンプ
の大きさによるが、多層成形プレスがなされた段階で、
貫通孔がバンプで完全に充満されるような大きさが好ま
しい。
A through hole is formed in the prepreg by a laser at a position corresponding to the bump of the first base material. It is made to be able to join. As a laser, short pulse CO 2
A laser, an excimer laser, a YAG laser, or the like can be used. The size of the through hole depends on the size of the bump that enters it, but at the stage when the multilayer forming press was made,
The size is preferably such that the through holes are completely filled with the bumps.

【0012】第二の基材を構成する導電体箔としては銅
箔などが使用でき、その厚さは用途により異なるが、例
えば0.012mm〜0.018mmであることができ
る。
As the conductive foil constituting the second base material, a copper foil or the like can be used, and the thickness thereof varies depending on the use, but can be, for example, 0.012 mm to 0.018 mm.

【0013】多層成形プレスは、例えば真空ホットプレ
スにより行われ、プレス条件は使用する材料により異な
るが、プリプレグがエポキシ系樹脂の場合、例えば温度
160〜180℃、圧力15〜35kg/cm2 、時間
15〜40分で行われる。
[0013] multilayer molding press is performed, for example by vacuum hot pressing varies depending material pressing conditions used, if the prepreg is an epoxy-based resin, for example, a temperature 160 to 180 ° C., a pressure 15~35kg / cm 2, time It takes 15 to 40 minutes.

【0014】[0014]

【実施例】図1eのように第一の基材10は、厚さ1.
0mmのガラス布基材エポキシ樹脂からなる絶縁性基材
11上に銅箔(厚さ0.02mm)12により回路パタ
−ンが形成され、回路パタ−ン上に銀ペ−ストにより先
端の尖ったバンプ13を形成されている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As shown in FIG.
A circuit pattern is formed by a copper foil (thickness: 0.02 mm) 12 on an insulating substrate 11 made of a 0 mm glass cloth base epoxy resin, and the tip of the circuit pattern is sharpened by silver paste. Bump 13 is formed.

【0015】プリプレグ14は、ガラスクロスにエポキ
シ系樹脂を含浸させたもので、厚さは0.1mmであ
る。プリプレグ14には上記第一の基材10のバンプ1
3に相応する箇所に短パルスCO2 レ−ザにより貫通孔
15が設けられる。
The prepreg 14 is made of glass cloth impregnated with an epoxy resin, and has a thickness of 0.1 mm. The prepreg 14 has bumps 1 on the first base material 10.
A through-hole 15 is provided at a position corresponding to 3 by a short pulse CO 2 laser.

【0016】プリプレグ14が第一の基材10上に配置
され、貫通孔15とバンプ13が一致するよう位置合わ
せがなされた後、プリプレグ14の上に厚さ0.016
mmの銅箔からなる第二の基材16が配置され、真空ホ
ットプレスにより温度170℃、圧力20kg/cm2
で20分間、多層成形プレスされた(図1d)。その結
果、第一の基材10と第二の基材16は接着し、第一の
基材10のバンプ13が第二の基材16に完全に接合し
た積層体17ができる。この積層体17の第二の基材1
6上にエッチング法などにより回路パタ−ンが形成され
多層プリント配線板とされる。
After the prepreg 14 is placed on the first base material 10 and is aligned so that the through holes 15 and the bumps 13 are aligned, a thickness of 0.016
The second base material 16 made of a copper foil having a thickness of 1 mm is placed, and the temperature is 170 ° C. and the pressure is 20 kg / cm 2 by vacuum hot pressing.
For 20 minutes (Figure 1d). As a result, the first base material 10 and the second base material 16 adhere to each other, and a laminate 17 in which the bumps 13 of the first base material 10 are completely bonded to the second base material 16 is formed. The second substrate 1 of the laminate 17
A circuit pattern is formed on the substrate 6 by an etching method or the like to form a multilayer printed wiring board.

【0017】[0017]

【発明の効果】プリプレグに予めレ−ザにより第一の基
材のバンプが入る貫通孔が設けられているので、多層成
形プレスにより第一の基材のバンプは導電材からなる第
二の基材と確実に接触接合し、従来のようにバンプがプ
リプレグを貫通せずに接続不良の箇所が出てくるような
ことがなく、信頼性ある層間接続がなされる。
According to the present invention, since the prepreg is previously provided with a through hole into which the bumps of the first base material are inserted by a laser, the bumps of the first base material are formed by a multilayer molding press. Contact is reliably made with the material, and there is no possibility that bumps do not penetrate through the prepreg and a defective connection does not appear as in the prior art, and a reliable interlayer connection is achieved.

【0018】貫通孔はレ−ザによりあけられるので、バ
ンプの大きさや配置に応じて精密にして簡単且つ短時間
に完全に貫通した孔があけられる。
Since the through hole is formed by a laser, the hole can be completely formed in a precise, simple and short time in accordance with the size and arrangement of the bumps.

【0019】またガラスクロス入りのプリプレグのよう
にバンプ自身では貫通しにくいプリプレグでも使用で
き、さらに厚さのかなりあるプリプレグの使用も可能で
ある。しかもホットロ−ルによるバンプ通し工程がない
ため、プリプレグに過剰の熱が加わらずプリプレグの特
性が劣化することがない。またバンプがプリプレグを貫
通する際のプリプレグからの発塵がなく、接着不良など
の製品の不良率を低下させることができる。
It is also possible to use a prepreg, such as a prepreg containing a glass cloth, which is difficult to penetrate by itself, and it is also possible to use a prepreg having a considerably large thickness. In addition, since there is no step of passing a bump by a hot roll, excessive heat is not applied to the prepreg, so that the characteristics of the prepreg do not deteriorate. In addition, there is no generation of dust from the prepreg when the bump penetrates the prepreg, so that it is possible to reduce a defective rate of a product such as defective bonding.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明による多層プリント配線板の製造工程を
示す図。
FIG. 1 is a diagram showing a manufacturing process of a multilayer printed wiring board according to the present invention.

【図2】従来方法による多層プリント配線板の製造工程
を示す図。
FIG. 2 is a view showing a manufacturing process of a multilayer printed wiring board according to a conventional method.

【符号の説明】[Explanation of symbols]

10 第一の基材 11 絶縁性基材 12 銅箔(導電体箔) 13 バンプ 14 プリプレグ 15 貫通孔 16 第二の基材 17 積層体(多層プリント配線板) DESCRIPTION OF SYMBOLS 10 First base material 11 Insulating base material 12 Copper foil (conductor foil) 13 Bump 14 Prepreg 15 Through hole 16 Second base material 17 Laminate (multilayer printed wiring board)

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】導電体箔または少なくとも片面に導電体箔
が積層された絶縁性基材からなり、導電体箔上に導電性
のバンプが形成されてなる第一の基材と、このバンプに
相応する箇所にレ−ザにより貫通孔があけられている、
第一の基材上に配置されたプリプレグと、プリプレグの
上に配置される導電体箔からなる第二の基材とを積層し
て多層成形プレスしてなる多層プリント配線板。
1. A first base material comprising a conductive foil or an insulating base material having a conductive foil laminated on at least one surface thereof, wherein a first base material having a conductive bump formed on the conductive foil is provided. The laser has a through hole at the corresponding location,
A multilayer printed wiring board formed by laminating a prepreg arranged on a first base material and a second base material made of a conductive foil arranged on the prepreg and performing multilayer forming press.
【請求項2】絶縁性基板の少なくとも片面に銅箔が積層
された銅張積層体からなり銅箔上に導電性のバンプが形
成されてなる第一の基材と、このバンプに相応する箇所
にレ−ザにより貫通孔があけられている、第一の基材上
に配置されるプリプレグと、プリプレグの上に配置され
る銅箔からなる第二の基材とを積層して多層成形プレス
してなる多層プリント配線板。
2. A first base material comprising a copper-clad laminate in which a copper foil is laminated on at least one surface of an insulating substrate and having a conductive bump formed on the copper foil, and a portion corresponding to the bump. A prepreg disposed on a first substrate, which is provided with a through-hole by a laser, and a second substrate made of a copper foil disposed on the prepreg are laminated to form a multilayer forming press. Multi-layer printed wiring board.
【請求項3】銅箔上に導電性のバンプが形成されてなる
第一の基材と、このバンプに相応する箇所にレ−ザによ
り貫通孔があけられている、第一の基材上に配置される
プリプレグと、プリプレグの上に配置される銅箔からな
る第二の基材とを積層して多層成形プレスしてなる多層
プリント配線板。
3. A first base material having a conductive bump formed on a copper foil and a first base material having a through hole formed by a laser at a position corresponding to the bump. A multilayer printed wiring board obtained by laminating a prepreg disposed on a prepreg and a second base material made of copper foil disposed on the prepreg and performing multi-layer forming press.
JP28123297A 1997-09-30 1997-09-30 Multilayered printed wiring board Pending JPH11112149A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28123297A JPH11112149A (en) 1997-09-30 1997-09-30 Multilayered printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28123297A JPH11112149A (en) 1997-09-30 1997-09-30 Multilayered printed wiring board

Publications (1)

Publication Number Publication Date
JPH11112149A true JPH11112149A (en) 1999-04-23

Family

ID=17636215

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28123297A Pending JPH11112149A (en) 1997-09-30 1997-09-30 Multilayered printed wiring board

Country Status (1)

Country Link
JP (1) JPH11112149A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002151844A (en) * 2000-11-09 2002-05-24 Nippon Pillar Packing Co Ltd Multilayer circuit substrate and method of manufacturing the same
EP1377145A1 (en) * 2001-03-28 2004-01-02 North Corporation Multilayer wiring board, method for producing multilayer wiring board, polisher for multilayer wiring board, and metal sheet for producing wiring board
KR100693146B1 (en) 2005-07-26 2007-03-13 엘지전자 주식회사 Multi-layer printed circuit board making method
KR100722739B1 (en) 2005-11-29 2007-05-30 삼성전기주식회사 Core substrate and multiplayer printed circuit board using paste bump and method of manufacturing thereof
KR100728755B1 (en) * 2005-06-24 2007-06-19 삼성전기주식회사 Printed circuit board using bump and manufacturing method thereof
JP2010258080A (en) * 2009-04-22 2010-11-11 Meiko:Kk Method for manufacturing printed board
CN102083269A (en) * 2011-01-22 2011-06-01 苏州达方电子有限公司 Ceramic circuit substrate and manufacturing method thereof

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002151844A (en) * 2000-11-09 2002-05-24 Nippon Pillar Packing Co Ltd Multilayer circuit substrate and method of manufacturing the same
EP1377145A1 (en) * 2001-03-28 2004-01-02 North Corporation Multilayer wiring board, method for producing multilayer wiring board, polisher for multilayer wiring board, and metal sheet for producing wiring board
EP1377145A4 (en) * 2001-03-28 2008-07-30 Tessera Interconnect Materials Multilayer wiring board, method for producing multilayer wiring board, polisher for multilayer wiring board, and metal sheet for producing wiring board
KR100728755B1 (en) * 2005-06-24 2007-06-19 삼성전기주식회사 Printed circuit board using bump and manufacturing method thereof
KR100693146B1 (en) 2005-07-26 2007-03-13 엘지전자 주식회사 Multi-layer printed circuit board making method
KR100722739B1 (en) 2005-11-29 2007-05-30 삼성전기주식회사 Core substrate and multiplayer printed circuit board using paste bump and method of manufacturing thereof
JP2010258080A (en) * 2009-04-22 2010-11-11 Meiko:Kk Method for manufacturing printed board
CN102083269A (en) * 2011-01-22 2011-06-01 苏州达方电子有限公司 Ceramic circuit substrate and manufacturing method thereof

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