JPS5864097A - Method of producing multilayer printed circuit board - Google Patents

Method of producing multilayer printed circuit board

Info

Publication number
JPS5864097A
JPS5864097A JP56162861A JP16286181A JPS5864097A JP S5864097 A JPS5864097 A JP S5864097A JP 56162861 A JP56162861 A JP 56162861A JP 16286181 A JP16286181 A JP 16286181A JP S5864097 A JPS5864097 A JP S5864097A
Authority
JP
Japan
Prior art keywords
laser
multilayer printed
printed circuit
circuit board
conductor pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56162861A
Other languages
Japanese (ja)
Other versions
JPH043676B2 (en
Inventor
大幸 洋一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56162861A priority Critical patent/JPS5864097A/en
Publication of JPS5864097A publication Critical patent/JPS5864097A/en
Publication of JPH043676B2 publication Critical patent/JPH043676B2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は多層印刷回路板の製造方法に関し、I&・に高
密度多層印刷回路板の孔明は工程を合理イヒした多層印
刷回路板の製造方法に関するO従来、多層印刷回路板(
以下、「多層プリンF。
Detailed Description of the Invention The present invention relates to a method for manufacturing a multilayer printed circuit board, and the present invention relates to a method for manufacturing a multilayer printed circuit board with a streamlined process. Board (
Below, “Multilayer Pudding F.

板」とし1う。)においては、内部の導体ノぐターン層
間および外部と内部の導体パターン層間を電気的にi続
する場合、第1WJに示す如く、前記導体パタ−ン層を
接続したい位置に端子1を設置すておき、ドリルにより
孔2を明け、該孔2内にめっき・會施すようkしていた
。ま゛た、第2[K示す如く・、予め孔を明け、めっ1
1を施した板3Yr積層・接着11することも行われて
いる。しかしながら、上に述べた方法はいずれも孔明け
に多、大の工数を必要と・するという重大な間mt−有
するものであった。
``Board''. ), when electrically connecting between the internal conductor pattern layers and between the external and internal conductor pattern layers, install terminal 1 at the position where you want to connect the conductor pattern layers, as shown in the 1st WJ. Then, a hole 2 was made with a drill, and the inside of the hole 2 was plated and bonded. Also, as shown in the second [K], pre-drill the hole and insert it completely.
It is also practiced to laminate and bond the plates 3Yr which have been subjected to 11. However, all of the above-mentioned methods have a significant disadvantage in that they require a large number of man-hours to drill holes.

本発明は上記事情忙鑑みてなされたもので、その目的と
するところは、従来の多層プリンシ板05製造における
上述の如自問m全解消し、孔明けに要する工数管減少さ
せ゛るとともに孔の小径化によ。
The present invention was made in view of the above-mentioned circumstances, and its purpose is to completely eliminate the above-mentioned problems in the production of conventional multilayer principal plates 05, reduce the number of man-hours required for drilling, and reduce the number of holes. By making the diameter smaller.

る配線密度の向上を可能にする多層プリント板の。multilayer printed circuit boards that enable increased wiring density.

製造方法を提供することにある。The purpose is to provide a manufacturing method.

本発明の上記目的は、複数の内層導体、<ターン()層
を有し、導体パターン、眉間の電気的接続を行う゛ため
の孔tレーザ加工により明けるようにした多。
The above-mentioned object of the present invention is to provide a multilayer conductor having a plurality of inner conductor layers, a conductor pattern, and a hole for making an electrical connection between the eyebrows by laser processing.

層プリント板の製造方法において、前記レーザ加工によ
る孔明けに際して、前記電気的接続を行う゛べき導体パ
ターン層の接続端子のうち、レーザ蒸射側から見て最も
深い位置にある接続端子【除く・他の電気的接続を行う
ぺ金導体パターン層の接続端子に、前記レーザのビーム
径よりやや小さな径を有する孔を設けておくことにより
、前記電気的接続を行うべき位置に存在する樹1!管前
記し−ザ(Iにより、レーザ照射側から見て最も深い位
置にあ。
In the method for manufacturing a layered printed board, when drilling holes by the laser processing, among the connection terminals of the conductor pattern layer to make the electrical connection, the connection terminal [excluding By providing a hole having a diameter slightly smaller than the beam diameter of the laser in the connection terminal of the metal conductor pattern layer where other electrical connections are to be made, the tree 1! The tube laser (I) is located at the deepest position when viewed from the laser irradiation side.

る接続端子まで除失するようにしたことを特徴どする多
層プリント板の製造方法によって達成される・。
This is achieved by a method for manufacturing a multilayer printed board, which is characterized in that even the connecting terminals are removed.

本発明の要点は、多層プリント板を構成する樹・脂と銅
とで、レーザ特に炭酸ガスレーザの吸収に5著しい差が
あり、銅は炭酸ガスレーザを殆んど反。
The key point of the present invention is that there is a significant difference in the absorption of lasers, especially carbon dioxide lasers, between the resin and copper that make up the multilayer printed board, and copper has almost no absorption of carbon dioxide lasers.

射すること全利用して、レーザにより樹脂を選択。The resin is selected by the laser, making full use of the irradiation.

的に分解・除去するようにして、前記電気的接絆を行う
ための孔を短時間に明けるようにした点k。
Point k, where the hole for making the electrical connection can be opened in a short time by disassembling and removing the wire in a short time.

ある。be.

以下、本発明の実施例を図面に基づいて詳細に説明する
Embodiments of the present invention will be described in detail below with reference to the drawings.

第3図(1)〜(・)は本発明の一実施例である外層と
内層との接続方法を示す図である。まず、第3図(1)
K示す如く、外層鋼箔養に設ける端子6の中心位f6’
に、後に孔明けに使用する炭酸ガスレーザのビーム径よ
り少し小さな孔をエツチングにより形成しておく。次い
で、第3図(b)に示す如く、樹脂層のみが除去される
強度と照射時間の炭酸ガスレーザLKより基板表面を走
査し、前記エツチングにより設けた孔の位置の樹脂層8
を除失し、孔を明ける。以下、第3図(Q)に示す如く
、ブラズ!スミア除実装置略により前記樹脂層8に設け
た孔内の樹脂層を除去した後、銅めつ1!(結果を第3
図(d) K示す。)、エツチング(結果を第3図(・
)に示讐@)を行い、配線パターン9.端子6を形成す
る。
FIGS. 3(1) to 3(·) are diagrams showing a method of connecting an outer layer and an inner layer according to an embodiment of the present invention. First, Figure 3 (1)
As shown in K, the center position f6' of the terminal 6 provided on the outer steel foil layer
Next, a hole slightly smaller than the beam diameter of the carbon dioxide laser that will be used later for drilling is formed by etching. Next, as shown in FIG. 3(b), the surface of the substrate is scanned with a carbon dioxide laser LK of an intensity and irradiation time such that only the resin layer is removed, and the resin layer 8 is etched at the positions of the holes formed by the etching.
Remove it and make a hole. Below, as shown in Figure 3 (Q), BRAZ! After removing the resin layer in the holes provided in the resin layer 8 using a smear remover, the copper peat 1! (See the results in the third
Figure (d) shows K. ), etching (results are shown in Figure 3 (・
) to take revenge @) and create wiring pattern 9. Terminal 6 is formed.

第3WJ伽)において、内層端子δには孔が明いていな
いので、レーザは前記内層端子6より内部(wiの下方
)Kは侵入せず、外層と所望の内層との接続を行うこと
ができる。
In the third WJ (3rd WJ), since there is no hole in the inner layer terminal δ, the laser does not penetrate into the interior (below wi) K than the inner layer terminal 6, and it is possible to connect the outer layer and the desired inner layer. .

第4図は本発明の他の実施例を示すもので、外層と複数
の内層6.7の接続を行う場合を示している。この場合
には、外層に設ける端子6の中心位置および内層に設け
る端子7の中心位置に、それぞれエツチングにより前記
小孔を形成しておくことが必要であり、′これらを積層
したものをレー・ザ加工することにより内層の端子6に
達する孔を・明け、これにめつき′tilliiすこと
kより前記接続を・行うことができるものである。
FIG. 4 shows another embodiment of the present invention, in which an outer layer and a plurality of inner layers 6, 7 are connected. In this case, it is necessary to form the small hole by etching at the center position of the terminal 6 provided on the outer layer and the center position of the terminal 7 provided on the inner layer, respectively. The above-mentioned connection can be made by cutting a hole in the inner layer to reach the terminal 6, and then plating the hole into the hole.

上記実施例においては、レーザとして軟酸ガス。In the above embodiment, a soft acid gas is used as the laser.

レーザを用いたが、本発明はこれに限られるべき。Although a laser was used, the present invention should be limited to this.

ものではない。It's not a thing.

また、電気的接続を行うべき位置にある導体に。Also, to conductors where electrical connections are to be made.

設ける孔も、エツチング以外の方法で明けること5を妨
げるものではない。
The holes to be provided also do not preclude opening 5 by a method other than etching.

以上述べた如く、本発明によれば、複数の内層。As described above, according to the present invention, a plurality of inner layers.

導体バタ1−ン層會有し、導体パターン層間の電気約接
続を行うための孔をレーザ加工により明ける。
A conductor pattern layer is formed, and a hole for making an electrical connection between the conductor pattern layers is made by laser processing.

ようにした多層プリント板”の製造において、前記。In the production of a "multilayer printed board" as described above.

電気的接続を行うべき位置にある導体に予め孔を明けて
おき、樹脂のみをレーザ加工により除去するようにした
ので、レーザ加工の特徴を最大限に発揮させることがで
き、孔明けに要する時間を短縮できること、孔径を0.
1〜0.2−と小さくできるので配線密度で向上させる
ことができること等のすぐれた効果を有する多層プリン
ト板の製造方法を提供することができるものである。
A hole is pre-drilled in the conductor at the location where electrical connection is to be made, and only the resin is removed by laser processing, allowing the characteristics of laser processing to be maximized and reducing the time required to drill the hole. The pore diameter can be reduced to 0.
Since the wiring density can be as small as 1 to 0.2, it is possible to provide a method for manufacturing a multilayer printed board that has excellent effects such as improved wiring density.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図は従来の導体パターン層の接続を示す断
面図、第31N C&)〜(e)は本発明の一実施料で
ある外層と内層との接続方法を示す断面図、第+11A
は本発明の他の実施例を示す断面図である。 4:外層鋼箔、5.6.7 :端子、8;樹脂層、9!
配線パターン、L;レーザ。 特許出願人 株式会社 日立製作所 、l ]f、  、、、i 第1図 第2図 第3図 第4図
1 and 2 are cross-sectional views showing the connection of conventional conductor pattern layers, No. 31N C&) to (e) are cross-sectional views showing the method of connecting the outer layer and the inner layer, which is one embodiment of the present invention; +11A
FIG. 3 is a sectional view showing another embodiment of the present invention. 4: Outer layer steel foil, 5.6.7: Terminal, 8; Resin layer, 9!
Wiring pattern, L; laser. Patent applicant: Hitachi, Ltd., l]f, ,,,i Fig. 1 Fig. 2 Fig. 3 Fig. 4

Claims (1)

【特許請求の範囲】 複数の内層導体パターン層を有し、導体パターン層間の
電気的接続を行うための孔をレーザ加工・により明ける
ようにした多層印刷回路板の製造方法忙おいて、前記レ
ーザ加工による孔明けに際して、前記電気的接続を行う
べき導体パターン層O接続端子のうち、レーザ照射側か
ら見て最も深い+1重量和ある接続端子を除く他の電気
的接続を行さ・べき導体パターン層の接続端子に、前記
レーザ0ビーム径よりやや小さな径を有する孔を設けて
おくことにより、前記電気的接続を行うべき位置に・存
在する樹脂を前記レーザにより、レーザ照射側5から見
て最も深い位置にある接続端子まで除来するようにした
ことを特徴とする多層印刷回路板の。 製造方法。
[Scope of Claims] A method for manufacturing a multilayer printed circuit board having a plurality of inner conductor pattern layers, in which holes for making electrical connections between the conductor pattern layers are made by laser processing. When drilling holes by processing, among the connection terminals of the conductor pattern layer O to which electrical connections are to be made, other electrical connections are to be made except for the connection terminal which is the deepest +1 weight sum when viewed from the laser irradiation side. By providing a hole having a diameter slightly smaller than the zero beam diameter of the laser in the connection terminal of the layer, the resin existing at the position where the electrical connection is to be made is exposed to the laser when viewed from the laser irradiation side 5. A multilayer printed circuit board characterized in that even the deepest connection terminals are removed. Production method.
JP56162861A 1981-10-14 1981-10-14 Method of producing multilayer printed circuit board Granted JPS5864097A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56162861A JPS5864097A (en) 1981-10-14 1981-10-14 Method of producing multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56162861A JPS5864097A (en) 1981-10-14 1981-10-14 Method of producing multilayer printed circuit board

Publications (2)

Publication Number Publication Date
JPS5864097A true JPS5864097A (en) 1983-04-16
JPH043676B2 JPH043676B2 (en) 1992-01-23

Family

ID=15762641

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56162861A Granted JPS5864097A (en) 1981-10-14 1981-10-14 Method of producing multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JPS5864097A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61294896A (en) * 1985-06-24 1986-12-25 株式会社日立製作所 Manufacture of multilayer printed circuit board
JPS62216297A (en) * 1986-03-17 1987-09-22 富士通株式会社 Hole drilling of multilayer printed board
JPS639194A (en) * 1986-06-30 1988-01-14 株式会社日立製作所 Manufacture of multilayer printed circuit board
JPH02153594A (en) * 1988-12-05 1990-06-13 Ibiden Co Ltd Manufacture of multilayer printed wiring board
DE4002326A1 (en) * 1989-01-27 1990-08-02 Hitachi Seiko Kk METHOD AND DEVICE FOR PERFORATING A PRINTED CIRCUIT BOARD
DE4117938A1 (en) * 1990-06-01 1991-12-05 Hitachi Seiko Kk Perforation method for PCB - partially depth drilling followed by laser finishing to required depth
WO1998034447A1 (en) * 1997-02-03 1998-08-06 Ibiden Co., Ltd. Printed wiring board and its manufacturing method
US6531677B2 (en) 2000-10-06 2003-03-11 Hitachi Via Mechanics, Ltd. Method and apparatus for drilling printed wiring boards

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5419441B2 (en) * 2008-12-26 2014-02-19 富士フイルム株式会社 Method for forming multilayer wiring board
CN107926121B (en) * 2015-08-11 2021-04-30 昭和电工材料株式会社 Method for manufacturing multilayer printed wiring board, metal foil with adhesive layer, metal-clad laminate, and multilayer printed wiring board

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5254172A (en) * 1975-10-28 1977-05-02 Siemens Ag Method of producing microminiature multiilayer wiring

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5254172A (en) * 1975-10-28 1977-05-02 Siemens Ag Method of producing microminiature multiilayer wiring

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61294896A (en) * 1985-06-24 1986-12-25 株式会社日立製作所 Manufacture of multilayer printed circuit board
JPS62216297A (en) * 1986-03-17 1987-09-22 富士通株式会社 Hole drilling of multilayer printed board
JPS639194A (en) * 1986-06-30 1988-01-14 株式会社日立製作所 Manufacture of multilayer printed circuit board
JPH0518478B2 (en) * 1986-06-30 1993-03-12 Hitachi Ltd
JPH02153594A (en) * 1988-12-05 1990-06-13 Ibiden Co Ltd Manufacture of multilayer printed wiring board
DE4002326A1 (en) * 1989-01-27 1990-08-02 Hitachi Seiko Kk METHOD AND DEVICE FOR PERFORATING A PRINTED CIRCUIT BOARD
US5010232A (en) * 1989-01-27 1991-04-23 Hitachi Seiko, Ltd. Method of and apparatus for perforating printed circuit board
DE4117938A1 (en) * 1990-06-01 1991-12-05 Hitachi Seiko Kk Perforation method for PCB - partially depth drilling followed by laser finishing to required depth
WO1998034447A1 (en) * 1997-02-03 1998-08-06 Ibiden Co., Ltd. Printed wiring board and its manufacturing method
US6590165B1 (en) 1997-02-03 2003-07-08 Ibiden Co., Ltd. Printed wiring board having throughole and annular lands
US7552531B2 (en) 1997-02-03 2009-06-30 Ibiden Co., Ltd. Method of manufacturing a printed wiring board having a previously formed opening hole in an innerlayer conductor circuit
US6531677B2 (en) 2000-10-06 2003-03-11 Hitachi Via Mechanics, Ltd. Method and apparatus for drilling printed wiring boards

Also Published As

Publication number Publication date
JPH043676B2 (en) 1992-01-23

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