JP2005235963A - Method for forming through hole in printed board - Google Patents

Method for forming through hole in printed board Download PDF

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Publication number
JP2005235963A
JP2005235963A JP2004042219A JP2004042219A JP2005235963A JP 2005235963 A JP2005235963 A JP 2005235963A JP 2004042219 A JP2004042219 A JP 2004042219A JP 2004042219 A JP2004042219 A JP 2004042219A JP 2005235963 A JP2005235963 A JP 2005235963A
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Prior art keywords
hole
diameter
forming
circuit board
printed circuit
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Pending
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JP2004042219A
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Japanese (ja)
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Tomochika Takami
知親 高見
Koji Nakayama
浩二 中山
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Hitachi Ltd
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Hitachi Ltd
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Priority to JP2004042219A priority Critical patent/JP2005235963A/en
Publication of JP2005235963A publication Critical patent/JP2005235963A/en
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for forming a through hole which reduces a diameter of the hole formed for suppressing the deterioration of electric characteristics caused by the through hole to the minimum, thereby enhancing the integration of a printed board. <P>SOLUTION: After a hole of a small diameter is formed, a hole of a large diameter is formed up to a layer required for electrically connecting a signal line 30 with a signal line 31, plating 40 is performed therein, and next a plating portion where the electric connection is unwanted is removed by a hole 22, thereby reducing a diameter of the hole 22. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明はプリント基板のスルーホール形成方法に関する。   The present invention relates to a method for forming a through hole in a printed circuit board.

従来は、プリント基板上に形成された信号または電源を電気的に接続することを目的としたスルーホールにより生じる電気的特性の劣化を改善するため、信号または電源を電気的に接続するのに不要なスルーホールの部分を図3に示す通り除去していた(例えば、特許文献1)。この方法では、電気的接続に不要なスルーホール部分を完全に除去するためには、製造バラツキを考慮すると、最初に形成したスルーホールよりも大きい孔をあける必要がある。また、この方法では最終的に形成されるスルーホールは特定位置においては基板表面あるいは裏面のどちらかに限定される。   Conventionally, it is not necessary to electrically connect a signal or power supply in order to improve the deterioration of electrical characteristics caused by a through hole intended to electrically connect a signal or power supply formed on a printed circuit board. The through-hole portion was removed as shown in FIG. 3 (for example, Patent Document 1). In this method, in order to completely remove a through-hole portion unnecessary for electrical connection, it is necessary to make a hole larger than the through-hole formed first in consideration of manufacturing variation. In this method, the finally formed through hole is limited to either the substrate front surface or the back surface at a specific position.

国際公開公報 WO 01/56338 A1International Publication No. WO 01/56338 A1

従来の構造では不要部分を除去するために形成した孔の径は最初に形成したスルーホールの径よりも大きく、孔の領域は配線の実装が不可能なためプリント基板上に実装することのできる配線の領域が小さくなり、高密度に配線を集積できない欠点があった。
この課題を解決するためには、スルーホール径を小さくする必要があるが、スルーホールにリードを挿入するような部品を実装するためには物理的な制約からある一定の径以下にはできない場合があった。
In the conventional structure, the diameter of the hole formed to remove unnecessary portions is larger than the diameter of the through hole formed first, and the hole area cannot be mounted on the wiring, so it can be mounted on the printed circuit board. There is a drawback that the wiring area becomes small and the wiring cannot be integrated at a high density.
In order to solve this problem, it is necessary to reduce the through-hole diameter, but in order to mount a component that inserts a lead into the through-hole, it is not possible to make it smaller than a certain diameter due to physical restrictions. was there.

本発明の目的はスルーホール内壁にめっきを形成した後にあける電気的特性を改善するための孔の径を小さくすることのできるスルーホールの形成方法を提供することにある。   An object of the present invention is to provide a method of forming a through hole that can reduce the diameter of a hole for improving the electrical characteristics that are formed after plating is formed on the inner wall of the through hole.

本発明のスルーホール形成手段は、スルーホールを形成するための貫通孔あける際に、基板の厚さ方向の途中で穴径を変更して、電気的接続に不要な部分の径を小さくしたことを特徴とする。その後めっき処理を行う。電気的接続に不要な部分は径が小さいため、電気的接続に不要な部分を除去するためにあける孔の径は従来の技術と比較して小さくすることが可能である。   In the through hole forming means of the present invention, when making a through hole for forming a through hole, the hole diameter is changed in the middle of the thickness direction of the substrate to reduce the diameter of a portion unnecessary for electrical connection. It is characterized by. Thereafter, plating is performed. Since the portion unnecessary for the electrical connection has a small diameter, the diameter of the hole formed for removing the portion unnecessary for the electrical connection can be reduced as compared with the conventional technique.

一方、貫通孔をあける際、後から除去するために穴径を細くする部分を基板の厚さ方向の中央付近にすることにより、同じ位置において基板の表面および裏面の両方にスルーホールを形成することが可能である。   On the other hand, when a through hole is made, a through hole is formed on both the front surface and the back surface of the substrate at the same position by making the portion of the hole diameter narrower to be removed later near the center in the thickness direction of the substrate. It is possible.

本発明によれば、スルーホールによる電気特性劣化の影響を軽減するためにあける孔の径を小さくすることにより、プリント基板の集積度を高めることができるので、スルーホールによる電気特性劣化が小さく集積度が高い多層プリント基板を提供できる。   According to the present invention, since the degree of integration of the printed circuit board can be increased by reducing the diameter of the hole to reduce the influence of the electrical characteristic deterioration due to the through hole, the electrical characteristic deterioration due to the through hole is reduced and integrated. A multi-layer printed circuit board having a high degree can be provided.

以下、発明の実施例を図面を用いて説明する。図1は、本発明のプリント基板の縦断面構造の一例を示す図である。   Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing an example of a longitudinal sectional structure of a printed board according to the present invention.

図1(a)のプリント基板1は4層から構成されており、プリント基板1を貫通するスルーホール20を設けており、スルーホール内壁に形成されためっき40を介して外層に設けられた信号ライン30と内層に設けられた信号ライン31とが電気的に接続されている。導体32および導体33は導体30および導体31とは電気的に絶縁されている。孔22は、スルーホール内壁にめっきを形成した後、信号ライン30と信号ライン31とを接続するのに不要なめっきを除去するために形成した孔である。なお、スルーホールに直接部品が実装される場合は信号ライン30あるいは信号ライン31が存在しない場合もある。   The printed circuit board 1 in FIG. 1A is composed of four layers, has a through hole 20 penetrating the printed circuit board 1, and a signal provided in an outer layer through a plating 40 formed in the inner wall of the through hole. The line 30 and the signal line 31 provided in the inner layer are electrically connected. The conductor 32 and the conductor 33 are electrically insulated from the conductor 30 and the conductor 31. The hole 22 is a hole formed to remove plating unnecessary for connecting the signal line 30 and the signal line 31 after plating is formed on the inner wall of the through hole. When components are directly mounted in the through holes, the signal line 30 or the signal line 31 may not exist.

図1(b)は、不要な部分を除去する穴を基板の厚さ方向の中央付近に限定することにより、スルーホール20を基板の表裏面で絶縁することが可能となる。したがって同じ位置で基板の表裏面にスルーホールを形成することが可能となる。   In FIG. 1B, by limiting the hole for removing unnecessary portions to the vicinity of the center in the thickness direction of the substrate, the through hole 20 can be insulated on the front and back surfaces of the substrate. Therefore, it is possible to form through holes on the front and back surfaces of the substrate at the same position.

次に図2に於いて本発明に係る多層プリント基板の製造工程について説明する。
プリント基板1に径の小さいドリル等により径の小さい孔21をあける(図2(A))。次にスルーホールにより電気的に接続する必要のある位置まで径の大きいドリル等により孔23をあける(図2(B))。孔21、孔23の内壁にめっき40を形成する(図2(C))。不要なめっきをドリル等により孔22をあけることにより除去する(図2(D))。以上の結果、図1(a)の構造が実現する。
Next, the manufacturing process of the multilayer printed board according to the present invention will be described with reference to FIG.
A small-diameter hole 21 is formed in the printed circuit board 1 with a small-diameter drill or the like (FIG. 2A). Next, a hole 23 is drilled with a drill having a large diameter to a position where it is necessary to electrically connect through the through hole (FIG. 2B). A plating 40 is formed on the inner walls of the holes 21 and 23 (FIG. 2C). Unnecessary plating is removed by opening holes 22 with a drill or the like (FIG. 2D). As a result, the structure of FIG. 1A is realized.

本実施例ではこれにより、スルーホール下部にあける孔の領域を小さくし、プリント基板上の配線可能な領域を増やし、集積度を向上している。   In this embodiment, this reduces the area of the hole in the lower part of the through hole, increases the area where wiring is possible on the printed circuit board, and improves the degree of integration.

一方、径の大きい穴を形成するにあたり、基板の表裏面からあけ(図2(E))、孔21および孔23の内壁にめっき40を形成し(図2(F))、基板の厚さ方向の中央付近の不要な部分をドリル等により孔22で除去することにより、図1(b)の構造が実現する。   On the other hand, in forming a hole having a large diameter, the substrate 40 is opened from the front and back surfaces (FIG. 2E), and plating 40 is formed on the inner walls of the holes 21 and 23 (FIG. 2F), and the thickness of the substrate By removing unnecessary portions near the center of the direction with a hole 22 using a drill or the like, the structure of FIG. 1B is realized.

本実施例ではこれにより、同じ位置において基板の表裏面にスルーホールを形成することが可能となり、配線の集積度が向上する。   In this embodiment, this makes it possible to form through holes on the front and back surfaces of the substrate at the same position, thereby improving the degree of wiring integration.

なお、上記実施例では4層のプリント基板の例で説明したが、言うまでもなく4層のプリント基板以外の多層プリント基板に本発明を適用することができる。また、実施例では信号を伝送する場合を用いているが、信号に限定する必要が無いことは言うまでもない。また、実施例では孔20による穿設を1層としているが、穿設する深さを限定するものではない。本発明は2層以上穿設する場合にも適用できることは言うまでもない。また、実施例では外層と内層の信号ラインを接続する場合を用いているが、内層と内層の信号ラインを接続する場合および部品が実装されるスルーホールと内層あるいは外層の信号ラインを接続する場合にも適用できることは言うまでもない。また、径の大きい孔23と径の小さい孔21をあける順序および径の大きい孔23をあける面(表面、裏面)も限定されない。   In the above-described embodiment, an example of a four-layer printed board has been described. Needless to say, the present invention can be applied to a multilayer printed board other than the four-layer printed board. Moreover, although the case where the signal is transmitted is used in the embodiment, it is needless to say that the signal need not be limited. Further, in the embodiment, the drilling by the hole 20 is one layer, but the depth to be drilled is not limited. It goes without saying that the present invention can also be applied to the case of drilling two or more layers. Also, in the embodiment, the case where the outer layer and the inner layer signal line are connected is used, but the case where the inner layer and the inner layer signal line are connected, and the case where the through hole in which the component is mounted is connected to the inner layer or the outer layer signal line. Needless to say, it can also be applied. Further, the order of opening the hole 23 having the large diameter and the hole 21 having the small diameter and the surface (front surface, back surface) for forming the hole 23 having the large diameter are not limited.

本発明に係るプリント基板の縦断面構造の一例を示す図である。It is a figure which shows an example of the longitudinal cross-section of the printed circuit board which concerns on this invention. 本発明に係るプリント基板の製造工程を示す図である。It is a figure which shows the manufacturing process of the printed circuit board which concerns on this invention. 従来の技術を示す図である。It is a figure which shows the prior art.

符号の説明Explanation of symbols

1……プリント基板、10……絶縁基材、
20……孔、30……信号ライン、
40……めっき
1 ... Printed circuit board, 10 ... Insulating substrate,
20 ... hole, 30 ... signal line,
40 …… Plating

Claims (3)

信号または電源を電気的に接続する導体層を2層以上有するプリント基板のスルーホール形成方法において、穴径が基板の厚さ方向の途中で階段状に異なる貫通孔をあけ、その貫通孔の内壁面にめっきを形成した後、電気的接続に不要となる穴径の小さな部分を除去することを特徴とするプリント基板のスルーホール形成方法。   In a method for forming a through-hole of a printed circuit board having two or more conductor layers for electrically connecting a signal or a power source, through holes having different hole diameters are formed stepwise in the middle of the thickness direction of the board. A method for forming a through hole in a printed circuit board, comprising: removing a portion having a small hole diameter which is not necessary for electrical connection after plating on a wall surface. 前記貫通孔は穴径の小さな部分を基板の厚さ方向の中央付近に設けたことを特徴とする請求項1記載のスルーホール形成方法。   2. The through-hole forming method according to claim 1, wherein the through-hole has a portion having a small hole diameter provided near the center in the thickness direction of the substrate. 請求項1又は請求項2のスルーホール形成方法を用いて製造したプリント基板。
A printed circuit board manufactured using the through hole forming method according to claim 1.
JP2004042219A 2004-02-19 2004-02-19 Method for forming through hole in printed board Pending JP2005235963A (en)

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009289981A (en) * 2008-05-29 2009-12-10 Fujitsu Ltd Method for manufacturing of printed board, printed board provided by the same, and manufacturing device of printed board
JP2010258048A (en) * 2009-04-22 2010-11-11 Nec Access Technica Ltd Printed wiring board and through-hole forming method for the same
JP2012019049A (en) * 2010-07-07 2012-01-26 Toshiba Corp Method for manufacturing printed circuit board
JP2013513211A (en) * 2009-12-08 2013-04-18 エルニ エレクトロニクス ゲゼルシャフト ミット ベシュレンクテル ハフツング Relief plug-in connector and multilayer circuit board
JP2015185735A (en) * 2014-03-25 2015-10-22 日立化成株式会社 Multilayer wiring board and manufacturing method therefor
JP2017505541A (en) * 2014-01-22 2017-02-16 サンミナ コーポレーションSanmina Corporation Method for forming plated through hole having high aspect ratio and method for removing stub in printed circuit board with high accuracy
CN111954395A (en) * 2020-07-30 2020-11-17 生益电子股份有限公司 Printed circuit board with conductive layer with local hole wall thickness and preparation method thereof

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009289981A (en) * 2008-05-29 2009-12-10 Fujitsu Ltd Method for manufacturing of printed board, printed board provided by the same, and manufacturing device of printed board
US8402648B2 (en) 2008-05-29 2013-03-26 Fujitsu Limited Printed circuit board fabrication method
JP2010258048A (en) * 2009-04-22 2010-11-11 Nec Access Technica Ltd Printed wiring board and through-hole forming method for the same
JP2013513211A (en) * 2009-12-08 2013-04-18 エルニ エレクトロニクス ゲゼルシャフト ミット ベシュレンクテル ハフツング Relief plug-in connector and multilayer circuit board
US9131632B2 (en) 2009-12-08 2015-09-08 Erni Production Gmbh & Co. Kg Relief plug-in connector and multilayer circuit board
JP2012019049A (en) * 2010-07-07 2012-01-26 Toshiba Corp Method for manufacturing printed circuit board
JP2017505541A (en) * 2014-01-22 2017-02-16 サンミナ コーポレーションSanmina Corporation Method for forming plated through hole having high aspect ratio and method for removing stub in printed circuit board with high accuracy
JP2015185735A (en) * 2014-03-25 2015-10-22 日立化成株式会社 Multilayer wiring board and manufacturing method therefor
CN111954395A (en) * 2020-07-30 2020-11-17 生益电子股份有限公司 Printed circuit board with conductive layer with local hole wall thickness and preparation method thereof

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