JPH05347480A - Manufacture of multilayer printed wiring board - Google Patents

Manufacture of multilayer printed wiring board

Info

Publication number
JPH05347480A
JPH05347480A JP15537492A JP15537492A JPH05347480A JP H05347480 A JPH05347480 A JP H05347480A JP 15537492 A JP15537492 A JP 15537492A JP 15537492 A JP15537492 A JP 15537492A JP H05347480 A JPH05347480 A JP H05347480A
Authority
JP
Japan
Prior art keywords
hole
wiring board
diameter
printed wiring
multilayer printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15537492A
Other languages
Japanese (ja)
Inventor
Kunio Iketani
国夫 池谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Bakelite Co Ltd
Original Assignee
Sumitomo Bakelite Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Bakelite Co Ltd filed Critical Sumitomo Bakelite Co Ltd
Priority to JP15537492A priority Critical patent/JPH05347480A/en
Publication of JPH05347480A publication Critical patent/JPH05347480A/en
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To reduce the number of holes by realizing conduction between upper and lower surfaces by shaping a hole in a multilayer printed wiring board and then cutting off the conduction. CONSTITUTION:A hole 3 of a small diameter is made to pass through a multilayer printed wiring board 1 and a hole 4 whose diameter is larger than that of the hole 3 is shaped up to a specified depth of the wiring board 1 in the same position. Then, after upper and lower surfaces of the wiring board 1 are made conductive by a method such as plating, a bottom of the hole of the large diameter is cut with a drill whose diameter is larger than the small diameter of the hole 4 and smaller than the large diameter thereof; thereby, conduction between up and down of the wiring board is cut off. Since two or more conductions are thereby possible by one through-hole 6, the number of holes 3, 4 of the printed wiring board 1 can be reduced and troubles such as adhesion defective of plating metal can be prevented.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は高密度の配線板を得るた
めに、多層プリント配線板の穴の数を減少させる方法で
ある。
FIELD OF THE INVENTION The present invention is a method of reducing the number of holes in a multilayer printed wiring board to obtain a high density wiring board.

【0002】[0002]

【従来の技術】従来の多層プリント配線板は小径のドリ
ル穴が多数あけられてスルーホールを形成している。こ
れらひとつひとつのスルーホールがそれぞれ一つの信号
を伝えるものである。配線の高密度化のためには、この
小径穴をより多くする必要があり、多層プリント配線板
を製造する上で精度など、種々の問題があった。また、
小径穴のめっき工程では多層プリント配線板の厚さに比
して穴径が小さいのでめっき不良が発生することが多か
った。また、例えば、一方の表面側と他方の表面側とを
絶縁する必要がある場合、該当する回路パターン及び穴
の位置が制約され、穴の数が多くなる欠点がある。
2. Description of the Related Art A conventional multilayer printed wiring board is formed with a large number of small-diameter drill holes to form through holes. Each of these through holes transmits a signal. In order to increase the wiring density, it is necessary to increase the number of the small diameter holes, which causes various problems such as accuracy in manufacturing a multilayer printed wiring board. Also,
In the plating process for small-diameter holes, since the hole diameter is smaller than the thickness of the multilayer printed wiring board, plating defects often occur. Further, for example, when it is necessary to insulate one surface side from the other surface side, there is a drawback that the positions of the corresponding circuit patterns and holes are restricted, and the number of holes increases.

【0003】[0003]

【発明が解決しようとする課題】本発明はこのような欠
点をなくすることを目的とするもので、穴の数を少なく
するとともに、めっき不良を少なくし、多層回路のそれ
ぞれの回路パターンや穴の位置の制約を小さくすること
ができるものである。
SUMMARY OF THE INVENTION The present invention is intended to eliminate such drawbacks, and to reduce the number of holes and also to reduce plating defects, thereby making it possible to reduce the number of circuit patterns and holes in each multilayer circuit. It is possible to reduce the restriction on the position of.

【0004】[0004]

【課題を解決するための手段】本発明は、多層プリント
配線板に小径の穴を貫通させ、同じ位置において、これ
より大径の穴を該配線板の所定の深さまであけ、次いで
めっき等の方法で上下表面間を導通させた後、上記穴の
小径より大きく大径より小さい径のドリルで、大径の底
部を切削して除去することによって、その上下間の導通
を蔽断することを特徴とする多層プリント配線板の製造
方法である。
According to the present invention, a hole having a small diameter is penetrated through a multilayer printed wiring board, a hole having a diameter larger than the hole is made at the same position to a predetermined depth of the wiring board, and then plating or the like is performed. After connecting the upper and lower surfaces by a method, by cutting the large-diameter bottom part with a drill having a diameter larger than the small diameter and smaller than the large diameter to remove the conduction between the upper and lower surfaces. A method for manufacturing a characteristic multilayer printed wiring board.

【0005】本発明を図面を用いて詳細に説明する。図
1は4層プリント配線板(以下4層板という)の一例の
断面図である。a、b、c、dはそれぞれ表面層回路あ
るいは内層回路を示す。図2は図1の4層板に小径のス
ルーホール(2)を設けたもので、2本のスルーホール
はそれぞれcとdの回路、aとbの回路を導通する。図
3は図1の4層板を使用して本発明の工程を示すもので
ある。まず、前記4層板にa、b、c、dの各回路を貫
く小径穴(3)をあけ(図3A)、a及びbの回路を切
削して前記小径穴(3)と同心円で、これより大径の穴
(4)をあける(図3B)。これらの小径穴及び大径穴
の内面全面にわたりメッキを施す(図3C)。(5)は
メッキされた穴を示す。その後、小径穴と大径穴の中間
の径を有するドリルで、大径穴の底部を切削してメッキ
部を除去し、スルーホール(6)を形成する(図3
D)。(7)はメッキ部、(8)は非メッキ部を示す。
このような工程により、ひとつの穴でそれぞれaとbの
回路、cとdの回路を導通し、bとcの間は絶縁された
スルーホールが形成される。図4は6層プリント配線板
(11)に本発明を適用した例である。スルーホール(1
2)は、径の異なる穴を三段に形成し、メッキ後それぞ
れの底部を切削してその部分のメッキを除去したもので
ある。スルーホール(13)は図3で示した工程を上下両
面から行ったものである。図4において(14)はメッキ
部、(15)は非メッキ部を示す。いずれもaとbの回
路、cとdの回路、eとfの回路が導通され、bとcの
間、dとeの間は絶縁されている。
The present invention will be described in detail with reference to the drawings. FIG. 1 is a sectional view of an example of a four-layer printed wiring board (hereinafter referred to as a four-layer board). Reference symbols a, b, c, and d respectively indicate a surface layer circuit or an inner layer circuit. FIG. 2 shows the four-layer plate of FIG. 1 provided with small-diameter through holes (2). The two through holes conduct the circuits c and d and the circuits a and b, respectively. FIG. 3 illustrates the process of the present invention using the 4-layer board of FIG. First, a small-diameter hole (3) penetrating each circuit of a, b, c, d is opened in the four-layer plate (FIG. 3A), and the circuits of a and b are cut to form a concentric circle with the small-diameter hole (3). Drill a hole (4) with a larger diameter than this (Fig. 3B). Plating is performed on the entire inner surfaces of these small diameter holes and large diameter holes (FIG. 3C). (5) indicates a plated hole. Then, the bottom portion of the large diameter hole is cut with a drill having a diameter intermediate between the small diameter hole and the large diameter hole to remove the plated portion to form the through hole (6) (FIG. 3).
D). (7) shows a plated portion and (8) shows a non-plated portion.
By such a process, the circuit of a and b and the circuit of c and d are respectively conducted through one hole, and an insulated through hole is formed between b and c. FIG. 4 shows an example in which the present invention is applied to a 6-layer printed wiring board (11). Through hole (1
In 2), holes with different diameters are formed in three steps, and after plating, the bottom of each is cut to remove the plating on that part. The through hole (13) is obtained by performing the process shown in FIG. 3 from both upper and lower sides. In FIG. 4, (14) shows a plated portion and (15) shows a non-plated portion. In both cases, the circuits a and b, the circuits c and d, and the circuits e and f are electrically connected, and the portions b and c and the portions d and e are insulated from each other.

【0006】[0006]

【発明の効果】本発明の方法に従うと、一つのスルーホ
ールで2ヶ所以上の導通を行うことができるので、穴の
数を少なくすることができる。また、穴の径や穴の位置
を変えることにより種々のタイプの導通、絶縁を行うこ
とができる。更に、小径部分が短いので、メッキ金属の
密着不良などのトラブルを防止することができる。
According to the method of the present invention, since one through hole can conduct electricity at two or more places, the number of holes can be reduced. Further, various types of conduction and insulation can be performed by changing the diameter of the hole and the position of the hole. Furthermore, since the small diameter portion is short, troubles such as poor adhesion of the plated metal can be prevented.

【図面の簡単な説明】[Brief description of drawings]

【図1】4層プリント配線板(4層板)の断面図FIG. 1 is a sectional view of a four-layer printed wiring board (four-layer board).

【図2】図1の4層板にスルーホールを設けた場合の断
面図
FIG. 2 is a cross-sectional view of the four-layer board of FIG. 1 with through holes.

【図3】図1の4層板に本発明によるスルーホールを設
ける各工程を示す断面図で、A:小径穴を貫通した状
態、B:大径穴を4層板途中まであけた状態、C:穴に
メッキをした状態、D:大径穴底部を切削した状態
3 is a cross-sectional view showing each step of providing a through hole according to the present invention in the four-layer board of FIG. 1, A: a state of penetrating a small-diameter hole, B: a state of forming a large-diameter hole in the middle of the four-layer board, C: hole is plated, D: large diameter hole bottom is cut

【図4】6層プリント配線板(6層板)に本発明の方法
を適用した場合の断面図
FIG. 4 is a sectional view when the method of the present invention is applied to a six-layer printed wiring board (six-layer board).

【符号の説明】[Explanation of symbols]

1 多層板(4層板) 2 スルーホール 3 小径穴 4 大径穴 5 メッキされた穴 6 スルーホール 7 メッキ部 8 非メッキ部 11 多層板(6層板) 12 スルーホール 13 スルーホール 14 メッキ部 15 非メッキ部 1 Multilayer board (4 layer board) 2 Through hole 3 Small diameter hole 4 Large diameter hole 5 Plated hole 6 Through hole 7 Plated part 8 Non-plated part 11 Multi-layer plate (6 layer plate) 12 Through hole 13 Through hole 14 Plated part 15 Non-plated part

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 多層プリント配線板に小径の穴を貫通さ
せ、同じ位置において、これより大径の穴を該配線板の
所定の深さまであけ、次いでめっき等の方法で上下表面
間を導通させた後、上記穴の小径より大きく大径より小
さい径のドリルで、大径の底部を切削して除去すること
によって、その上下間の導通を蔽断することを特徴とす
る多層プリント配線板の製造方法。
1. A multilayer printed wiring board having a small-diameter hole penetrating through it, and a hole having a larger diameter than that at the same position is drilled to a predetermined depth of the wiring board, and then the upper and lower surfaces are electrically connected by a method such as plating. After that, by using a drill having a diameter larger than the small diameter and smaller than the large diameter of the hole to cut and remove the large-diameter bottom portion, the conduction between the upper and lower sides of the multilayer printed wiring board is blocked. Production method.
JP15537492A 1992-06-15 1992-06-15 Manufacture of multilayer printed wiring board Pending JPH05347480A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15537492A JPH05347480A (en) 1992-06-15 1992-06-15 Manufacture of multilayer printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15537492A JPH05347480A (en) 1992-06-15 1992-06-15 Manufacture of multilayer printed wiring board

Publications (1)

Publication Number Publication Date
JPH05347480A true JPH05347480A (en) 1993-12-27

Family

ID=15604543

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15537492A Pending JPH05347480A (en) 1992-06-15 1992-06-15 Manufacture of multilayer printed wiring board

Country Status (1)

Country Link
JP (1) JPH05347480A (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003049511A1 (en) * 2001-12-04 2003-06-12 Teradyne, Inc. High speed multi-layer printed circuit board via
WO2004060035A1 (en) * 2002-12-20 2004-07-15 Viasystems Group, Inc. Circuit board having a multi-functional hole
JP2008066544A (en) * 2006-09-08 2008-03-21 Nec Corp Multilayer printed circuit board and its manufacturing method
JP2010537402A (en) * 2007-08-13 2010-12-02 フォース テン ネットワークス,インク. High-speed router with backplane using multi-bore drilled through-holes and vias
EP2420115A1 (en) * 2009-04-13 2012-02-22 Hewlett-Packard Development Company, L.P. Back drill verification feature
JP2015099854A (en) * 2013-11-19 2015-05-28 日本電気株式会社 Transmission line structure, method for manufacturing the same, and method for selecting transmission line
JP2015185735A (en) * 2014-03-25 2015-10-22 日立化成株式会社 Multilayer wiring board and manufacturing method therefor
US9345138B2 (en) 2013-11-29 2016-05-17 Fujitsu Limited Laminated substrate and method of manufacturing laminated substrate
CN105659712A (en) * 2013-08-19 2016-06-08 桑米纳公司 Methods of segmented through hole formation using dual diameter through hole edge trimming
KR20160111955A (en) * 2014-01-22 2016-09-27 산미나 코포레이션 Methods of forming high aspect ration plated through holes and high precision stub removal in a printed circuit board
CN110430668A (en) * 2019-07-24 2019-11-08 珠海崇达电路技术有限公司 Crimping hole, wiring board and production method on a kind of wiring board

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003049511A1 (en) * 2001-12-04 2003-06-12 Teradyne, Inc. High speed multi-layer printed circuit board via
WO2004060035A1 (en) * 2002-12-20 2004-07-15 Viasystems Group, Inc. Circuit board having a multi-functional hole
JP2008066544A (en) * 2006-09-08 2008-03-21 Nec Corp Multilayer printed circuit board and its manufacturing method
US8212153B2 (en) 2006-09-08 2012-07-03 Nec Corporation Circuit board and manufacturing method of the circuit board
JP2010537402A (en) * 2007-08-13 2010-12-02 フォース テン ネットワークス,インク. High-speed router with backplane using multi-bore drilled through-holes and vias
EP2420115A1 (en) * 2009-04-13 2012-02-22 Hewlett-Packard Development Company, L.P. Back drill verification feature
CN102396299A (en) * 2009-04-13 2012-03-28 惠普开发有限公司 Back drill verification feature
EP2420115A4 (en) * 2009-04-13 2012-12-19 Hewlett Packard Development Co Back drill verification feature
JP2016528742A (en) * 2013-08-19 2016-09-15 サンミナ コーポレーションSanmina Corporation Method of forming split through holes using double diameter through hole edge trimming
CN105659712A (en) * 2013-08-19 2016-06-08 桑米纳公司 Methods of segmented through hole formation using dual diameter through hole edge trimming
JP2015099854A (en) * 2013-11-19 2015-05-28 日本電気株式会社 Transmission line structure, method for manufacturing the same, and method for selecting transmission line
US9345138B2 (en) 2013-11-29 2016-05-17 Fujitsu Limited Laminated substrate and method of manufacturing laminated substrate
KR20160111955A (en) * 2014-01-22 2016-09-27 산미나 코포레이션 Methods of forming high aspect ration plated through holes and high precision stub removal in a printed circuit board
JP2017505541A (en) * 2014-01-22 2017-02-16 サンミナ コーポレーションSanmina Corporation Method for forming plated through hole having high aspect ratio and method for removing stub in printed circuit board with high accuracy
JP2015185735A (en) * 2014-03-25 2015-10-22 日立化成株式会社 Multilayer wiring board and manufacturing method therefor
CN110430668A (en) * 2019-07-24 2019-11-08 珠海崇达电路技术有限公司 Crimping hole, wiring board and production method on a kind of wiring board

Similar Documents

Publication Publication Date Title
JP4256603B2 (en) Manufacturing method of laminated wiring board
JPH05347480A (en) Manufacture of multilayer printed wiring board
US6523257B1 (en) Method for forming fine through hole conduction portion of circuit board
JPH09172261A (en) Manufacture of multilayered printed wiring board
JP2000216513A (en) Wiring board and manufacturing method using the same
JP2741238B2 (en) Flexible printed wiring board and method of manufacturing the same
JPH08264940A (en) Method for making through hole in printed wiring board
JPH0542157B2 (en)
JP2003332745A (en) Multilayer printed wiring board and its manufacturing method
JP3165617B2 (en) Multilayer printed wiring board and method of manufacturing the same
JP2002016332A (en) Laminated board having through hole and its manufacturing method
JPH08162766A (en) Multilayer printed wiring board and production thereof
KR100298896B1 (en) A printed circuit board and a method of fabricating thereof
JPH07221460A (en) Manufacture of multilater printed wiring board
JP2019029559A (en) Multilayer wiring board and manufacturing method thereof
JPH07221458A (en) Multilayer printed wiring board
KR20000025528A (en) Method of electrical interlayer connection of multi-layered printed circuit board
JPH06125158A (en) Printed-circuit board
JPH06302959A (en) Manufacture of multilayer printed wiring board
JPH06196832A (en) Insulating substrate with through-hole
JPH05327172A (en) Manufacture of printed-wiring board
JPH04299597A (en) Manufacture of printed wiring board
JPH03165093A (en) Multilayer printed wiring board
JPH03211791A (en) Metal board layer structure of printed board
JPH03228396A (en) Manufacture of multilayer printed circuit board