JPH06125158A - Printed-circuit board - Google Patents

Printed-circuit board

Info

Publication number
JPH06125158A
JPH06125158A JP27390992A JP27390992A JPH06125158A JP H06125158 A JPH06125158 A JP H06125158A JP 27390992 A JP27390992 A JP 27390992A JP 27390992 A JP27390992 A JP 27390992A JP H06125158 A JPH06125158 A JP H06125158A
Authority
JP
Japan
Prior art keywords
hole
printed wiring
wiring board
holes
penetrating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP27390992A
Other languages
Japanese (ja)
Other versions
JP2814858B2 (en
Inventor
Mamoru Ikeda
守 池田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4273909A priority Critical patent/JP2814858B2/en
Publication of JPH06125158A publication Critical patent/JPH06125158A/en
Application granted granted Critical
Publication of JP2814858B2 publication Critical patent/JP2814858B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers

Abstract

PURPOSE:To provide a printed-circuit board having blind through holes without causing a decrease in area of wiring pattern while maintaining depth for through holes. CONSTITUTION:A printed circuit board 5 includes blind holes 1 whose diameter decreases stepwise toward the bottom. Therefore, the required length of the holes is obtained without a decrease in area of wiring pattern.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、プリント配線基板の構
造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board structure.

【０００２】[0002]

【従来の技術】表面実装部品の使用が多くなり、両面実
装のプリント配線基板を設計製造する場合、従来使用し
ていた貫通スルーホールの他に任意の信号層間を接続す
ることができる非貫通スルーホールが必要となってきて
いる。2. Description of the Related Art In the case of designing and manufacturing a double-sided mounting printed wiring board due to the increased use of surface mount components, in addition to through through holes which have been conventionally used, arbitrary signal layers can be connected to each other. Halls are needed.

【０００３】図２に示す従来のプリント配線基板５で
は、上下に完全に貫通した貫通スルーホール９と、深さ
方向とを調整しながら穴明け処理をした非貫通スルーホ
ール７，８とが設けられていた。２，３，１０は接続ラ
ンド，１１はスルーホールメッキである。そして、各ス
ルーホール７，８，９は、その深さ方向の径が同一径の
穴として形成されていた。In the conventional printed wiring board 5 shown in FIG. 2, there are provided through-holes 9 which completely penetrate vertically and non-through-holes 7 and 8 which are punched while adjusting the depth direction. It was being done. 2, 3 and 10 are connection lands, and 11 is through-hole plating. The through holes 7, 8 and 9 are formed as holes having the same diameter in the depth direction.

【０００４】[0004]

【発明が解決しようとする課題】この従来の非貫通スル
ーホールでは、ドリルの深さ方向の制約があり、現状で
は使用キリ径と同等の深さ方向の距離が限度である。図
２の非貫通スルーホール（キリ径：深さ方向＝１：４）
８を形成しても、スルーホールメッキ１１を正常に形成
できず、信頼性の問題で実際の製品には適用することが
不可能であった。In this conventional non-penetrating through hole, there is a restriction in the depth direction of the drill, and at present, the distance in the depth direction equivalent to the drill diameter is the limit. Non-penetrating through hole in Fig. 2 (Diameter: depth direction = 1: 4)
Even if the No. 8 was formed, the through-hole plating 11 could not be normally formed, and it was impossible to apply it to an actual product due to reliability problems.

【０００５】また図２の非貫通スルーホール７のよう
に、ある程度の深さ方向を確保するためにキリ径を２〜
３ｍｍ程度とすると、パターン配線領域が少なくなり、
パターン配線性の問題があり、最近要求されている高密
度実装薄板化プリント配線基板の実現への障害となって
いた。Further, like the non-penetrating through hole 7 in FIG. 2, the drilling diameter is set to 2 to secure a certain depth direction.
If it is about 3 mm, the pattern wiring area is reduced,
There is a problem of pattern wiring property, which has been an obstacle to the realization of a recently demanded high-density packaging thin printed wiring board.

【０００６】本発明の目的は、パターン領域を減少させ
ず、かつ穴明け深さ方向を確保できるスルーホールを有
するプリント配線基板を提供することにある。An object of the present invention is to provide a printed wiring board having a through hole which does not reduce the pattern area and can secure the direction of drilling depth.

【０００７】[0007]

【課題を解決するための手段】前記目的を達成するた
め、本発明に係るプリント配線基板は、非貫通スルーホ
ールを有するプリント配線基板であって、非貫通スルー
ホールは、階段状に穴明け処理して形成され、内周面に
メッキが施されたものである。In order to achieve the above object, a printed wiring board according to the present invention is a printed wiring board having a non-penetrating through hole, and the non-penetrating through hole is formed in a stepwise manner. The inner peripheral surface is plated.

【０００８】また、前記非貫通スルーホールは、穴明け
深さ方向に沿って口径が段階的に縮径されたものであ
る。The diameter of the non-penetrating through hole is gradually reduced along the depth direction of the hole.

【０００９】また、プリント配線基板の各層の信号層と
前記非貫通スルーホールのメッキとを接続するための接
続ランドの大きさは、穴明け深さ方向に沿って段階的に
異なるものである。Further, the size of the connection land for connecting the signal layer of each layer of the printed wiring board and the plating of the non-through hole is different stepwise along the direction of the drilling depth.

【００１０】[0010]

【作用】パターン配線領域を減少させず、なおかつ深さ
方向の確保ができるように複数種の径をもつキリを用い
て段階的に穴明け処理をして階段状の非貫通スルーホー
ルを形成している。[Operation] A step-like non-through through hole is formed by performing a stepwise drilling process using a drill having a plurality of kinds of diameters so that the pattern wiring region can be secured in the depth direction without reducing the area. ing.

【００１１】[0011]

【実施例】次に本発明について図面を参照して説明す
る。図１，図２は本発明の一実施例を示す断面図であ
る。The present invention will be described below with reference to the drawings. 1 and 2 are sectional views showing an embodiment of the present invention.

【００１２】図において、本発明に係る非貫通スルーホ
ール１は、プリント配線基板５の各信号層に使用キリ径
に見合った接続ランド２，３，４が設けられている。例
えば使用キリ径として、２．０ｍｍ，１．２ｍｍ，０．
６ｍｍの３種類を使用する場合は、各々２．５ｍｍ，
１．７ｍｍ，１．１ｍｍの接続ランドを設ける。In the figure, in a non-through hole 1 according to the present invention, connection lands 2, 3 and 4 are provided in each signal layer of a printed wiring board 5 in accordance with the diameter of the hole to be used. For example, as the used drilling diameter, 2.0 mm, 1.2 mm, 0.
When using 3 types of 6 mm, 2.5 mm each,
Connection lands of 1.7 mm and 1.1 mm are provided.

【００１３】穴明け処理を行う場合には、まず図２に示
すように２．０ｍｍのキリ径をもつキリを使用して第１
ペア信号層Ａ1間にスルーホール１ａを穴明け処理す
る。When performing the drilling process, first, as shown in FIG. 2, a first drill having a drill diameter of 2.0 mm is used.
A through hole 1a is punched between the paired signal layers A 1 .

【００１４】次に１．２ｍｍのキリ径をもつキリを使用
してスルーホール１ａを通して穴明け処理を行い、第２
ペア信号層Ａ2間に、スルーホール１ａに連通したスル
ーホール１ｂを形成する。Next, a hole having a diameter of 1.2 mm is used to perform a drilling process through the through hole 1a, and the second hole is formed.
A through hole 1b communicating with the through hole 1a is formed between the pair signal layers A 2 .

【００１５】最後に０．６ｍｍのキリ径をもつキリを使
用して、２つのスルーホール１ａ，１ｂを通して穴明け
処理を行い、第３ペア信号層Ａ3間に、２つのスルーホ
ール１ａ，１ｂに連通したスルーホール１ｃを形成す
る。これにより、図１に示す穴明け断面が階段状の非貫
通スルーホール１の穴明け処理を終了する。Finally, a drill having a drill diameter of 0.6 mm is used to perform a drilling process through the two through holes 1a and 1b, and the two through holes 1a and 1b are provided between the third pair signal layers A 3. To form a through hole 1c communicating with. As a result, the drilling process for the non-through through-hole 1 having a stepped cross section shown in FIG. 1 is completed.

【００１６】次に非貫通スルーホール１内のパターン接
続のためのメッキ処理をしてスルーホールメッキ１１を
作成することになるが、接続信頼性を確保するには、使
用キリ径と同等の深さ方向の距離が現状では限度であ
る。Next, through-hole plating 11 is created by performing a plating process for connecting the pattern in the non-through hole 1; however, in order to secure the connection reliability, a depth equivalent to the drilled diameter is used. The distance in the vertical direction is currently the limit.

【００１７】しかし、本発明の非貫通スルーホール１は
図１に示すように段階的にキリ径を変えて穴明け処理を
し、階段状のスルーホール形成としてあるため、各キリ
径での穴明け深さは、キリ径と同等の距離以内に保たれ
ており、現状のメッキ技術でも十分信頼性の高いメッキ
処理をすることが可能であり、このようにして接続信頼
性が高く深さ方向も３〜４ｍｍの非貫通スルーホールを
作成することができる。However, as shown in FIG. 1, the non-through hole 1 of the present invention is formed by stepwise changing the diameter of the hole to form a stepped through hole. The dawn depth is kept within a distance equivalent to the drill diameter, and it is possible to perform plating treatment with sufficient reliability even with the current plating technology. In this way, connection reliability is high and depth direction Can also make non-through through holes of 3 to 4 mm.

【００１８】また、各信号層Ａ1，Ａ2，Ａ3に設けられ
ている接続ランド２，３，４は図２（ｂ）に示すよう
に、使用キリ径ごとにランド径を２．５ｍｍ，１．７ｍ
ｍ，１．１ｍｍと大きさを変えているため、第２ペア信
号層Ａ2，第３ペア信号層Ａ3内での配線領域６を確保す
ることができ、パターン配線性を向上することができ、
パターン配線性の問題も解消できる。Further, as shown in FIG. 2B, the connection lands 2, 3 and 4 provided on each of the signal layers A 1 , A 2 and A 3 have a land diameter of 2.5 mm for each drill diameter used. , 1.7m
Since the size is changed to m and 1.1 mm, the wiring region 6 in the second pair signal layer A 2 and the third pair signal layer A 3 can be secured, and the pattern wiring property can be improved. You can
The problem of pattern wiring property can be solved.

【００１９】このようにして深さ方向が十分に確保で
き、スルーホールの接続信頼性もよく、かつパターン配
線性のよい非貫通スルーホールを作成することができ、
最近要求されている高密度実装，高密度配線，薄板化の
プリント配線基板を提供することが可能となる。In this way, it is possible to secure a sufficient depth direction, to form a non-through hole having good through hole connection reliability, and good pattern wiring.
It is possible to provide the recently demanded high-density packaging, high-density wiring, and thinned printed wiring boards.

【００２０】[0020]

【発明の効果】以上説明したように本発明は、複数種の
キリ径を用い段階的に穴明け処理をして階段状の非貫通
スルーホールを形成することにより、穴明け深さを従来
の２〜３倍に拡大することができ、かつパターン接続
性，配線性のよいプリント配線基板を製造することがで
きる。これにより高密度実装，薄板プリント配線基板を
提供することが可能となる。As described above, according to the present invention, the depth of drilling is reduced by forming a step-like non-through through hole by performing a stepwise drilling process using plural kinds of drill diameters. It is possible to manufacture a printed wiring board which can be enlarged 2-3 times and has good pattern connectivity and wiring properties. This makes it possible to provide a high-density mounting and a thin printed wiring board.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の一実施例を示す断面図である。FIG. 1 is a sectional view showing an embodiment of the present invention.

【図２】本発明の一実施例を工程順に示す断面図であ
る。FIG. 2 is a cross-sectional view showing an embodiment of the present invention in the order of steps.

【図３】従来例を示す断面図である。FIG. 3 is a cross-sectional view showing a conventional example.

【符号の説明】[Explanation of symbols]

１ 非貫通スルーホール ２，３，４，１０ 接続ランド ５ プリント配線基板 ６ プリント配線領域 ７，８ 従来の非貫通スルーホール ９ 貫通スルーホール １１ スルーホールメッキ １２ 配線パターン 1 non-through hole 2, 3, 4, 10 connection land 5 printed wiring board 6 printed wiring area 7, 8 conventional non-through hole 9 through through hole 11 through hole plating 12 wiring pattern

Claims (3)

【特許請求の範囲】[Claims] 【請求項１】 非貫通スルーホールを有するプリント配
線基板であって、 非貫通スルーホールは、階段状に穴明け処理して形成さ
れ、内周面にメッキが施されたものであることを特徴と
するプリント配線基板。1. A printed wiring board having a non-penetrating through hole, wherein the non-penetrating through hole is formed by performing a stepwise punching process, and an inner peripheral surface is plated. And a printed wiring board. 【請求項２】 請求項１に記載のプリント配線基板であ
って、 前記非貫通スルーホールは、穴明け深さ方向に沿って口
径が段階的に縮径されたものであることを特徴とするプ
リント配線基板。2. The printed wiring board according to claim 1, wherein the non-penetrating through hole has a diameter that is gradually reduced along the direction of the depth of the hole. Printed wiring board. 【請求項３】 請求項１に記載のプリント配線基板であ
って、 プリント配線基板の各層の信号層と前記非貫通スルーホ
ールのメッキとを接続するための接続ランドの大きさ
は、穴明け深さ方向に沿って段階的に異なるものである
ことを特徴とするプリント配線基板。3. The printed wiring board according to claim 1, wherein the size of the connection land for connecting the signal layer of each layer of the printed wiring board and the plating of the non-penetrating through hole has a depth of a hole. A printed wiring board, which is different stepwise along the vertical direction.
JP4273909A 1992-10-13 1992-10-13 Printed wiring board Expired - Fee Related JP2814858B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4273909A JP2814858B2 (en) 1992-10-13 1992-10-13 Printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4273909A JP2814858B2 (en) 1992-10-13 1992-10-13 Printed wiring board

Publications (2)

Publication Number Publication Date
JPH06125158A true JPH06125158A (en) 1994-05-06
JP2814858B2 JP2814858B2 (en) 1998-10-27

Family

ID=17534266

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4273909A Expired - Fee Related JP2814858B2 (en) 1992-10-13 1992-10-13 Printed wiring board

Country Status (1)

Country Link
JP (1) JP2814858B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01186166A (en) * 1988-01-20 1989-07-25 Toshiba Corp Power distribution control device
JPH09199861A (en) * 1996-01-22 1997-07-31 Hitachi Aic Inc Multilayer printed wiring board and manufacture thereof
JP2015185777A (en) * 2014-03-26 2015-10-22 日本電気株式会社 Multilayer printed wiring board, method of manufacturing multilayer printed wiring board
CN108260302A (en) * 2016-12-28 2018-07-06 中国科学院苏州纳米技术与纳米仿生研究所 Multi-layer flexible circuit board and preparation method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5987896A (en) * 1982-11-10 1984-05-21 富士通株式会社 Multilayer printed board
JPS6129194A (en) * 1984-07-20 1986-02-10 株式会社日立製作所 Method of connecting inner layer of multilayer printed board
JPH04243197A (en) * 1991-01-17 1992-08-31 Matsushita Electric Ind Co Ltd Multilayer printed wiring board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5987896A (en) * 1982-11-10 1984-05-21 富士通株式会社 Multilayer printed board
JPS6129194A (en) * 1984-07-20 1986-02-10 株式会社日立製作所 Method of connecting inner layer of multilayer printed board
JPH04243197A (en) * 1991-01-17 1992-08-31 Matsushita Electric Ind Co Ltd Multilayer printed wiring board

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01186166A (en) * 1988-01-20 1989-07-25 Toshiba Corp Power distribution control device
JPH09199861A (en) * 1996-01-22 1997-07-31 Hitachi Aic Inc Multilayer printed wiring board and manufacture thereof
JP2015185777A (en) * 2014-03-26 2015-10-22 日本電気株式会社 Multilayer printed wiring board, method of manufacturing multilayer printed wiring board
CN108260302A (en) * 2016-12-28 2018-07-06 中国科学院苏州纳米技术与纳米仿生研究所 Multi-layer flexible circuit board and preparation method thereof

Also Published As

Publication number Publication date
JP2814858B2 (en) 1998-10-27

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