JPH02295183A - Printed wiring board - Google Patents

Printed wiring board

Info

Publication number
JPH02295183A
JPH02295183A JP11661789A JP11661789A JPH02295183A JP H02295183 A JPH02295183 A JP H02295183A JP 11661789 A JP11661789 A JP 11661789A JP 11661789 A JP11661789 A JP 11661789A JP H02295183 A JPH02295183 A JP H02295183A
Authority
JP
Japan
Prior art keywords
signal lines
hole
printed wiring
wiring board
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11661789A
Other languages
Japanese (ja)
Other versions
JPH069287B2 (en
Inventor
Yoshitaka Morihara
森原 良隆
Tomohiko Nishida
西田 友彦
Yukio Matsushita
幸生 松下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP1116617A priority Critical patent/JPH069287B2/en
Publication of JPH02295183A publication Critical patent/JPH02295183A/en
Publication of JPH069287B2 publication Critical patent/JPH069287B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching

Abstract

PURPOSE:To supply a printed wiring board capable of inhibiting the interruption of a signal and forming long and parallel signal lines by boring a hole on a portion of a substrate where signal lines are formed. CONSTITUTION:Punched holes 3 are provided on a portion of substrate 1 where signal lines 2 are formed. A round hole 4, such as a drilled hole or a long hole 5, such as a slit, is acceptable for the punched holes 3. The configuration and size of the hole can be subjected to various design changes. Compared with the distribution capacity of a resin-made substrate 1, a punched hole can be bored so that the distribution capacity in the punched section may be reduced. Moreover, this construction makes it possible to reduce the size of the printed wiring board, bringing the signal lines 2 nearer, prevent the interruption of signals, and form, the signal lines 2 in parallel over a longer distance.

Description

【発明の詳細な説明】 [産業上の利用分野1 本発明は、基板の上に信号線を形成したプリント配線板
に関し、詳しくは小型化を図りながら信号線間の信号の
干渉を抑制しようとする技術に係るものである。
[Detailed Description of the Invention] [Industrial Application Field 1] The present invention relates to a printed wiring board in which signal lines are formed on a substrate, and more specifically, to suppress signal interference between signal lines while achieving miniaturization. It is related to the technology to

[従米の技術1 従米、プリント配線板においては、信号線間の信号の干
渉を抑制するために、基板上に信号線を充分な間隔を隔
てて分布容量を小になるようになすのである. [発明が解決しようとする課題1 ところが、近午、種々の部品も含めてプリント配線板も
小型化され、略平行になされる信号線間の距離も小にな
され、しかして信号線間の分布容量も大きくなり、信号
線間の干渉、混信(クロストーク)が生じ、信号線を平
行に長くし難いという問題があった。
[Jubei's technology 1 Jubei: In printed wiring boards, in order to suppress signal interference between signal lines, the signal lines are spaced sufficiently apart on the board to reduce the distributed capacitance. [Problem to be Solved by the Invention 1] However, in recent years, printed wiring boards, including various components, have become smaller, and the distance between signal lines that are substantially parallel has also become smaller, resulting in an increase in the distribution between signal lines. The capacitance also increases, causing interference and crosstalk between signal lines, and there are problems in that it is difficult to make the signal lines long and parallel.

本発明はこのような問題に鑑みてなされたものであり、
その目的とする′ところは、信号#II1l1の距離を
小にしながら信号の干渉を抑制することができ、信号線
を平行に長く形成できるプリント配線板を提供すること
にある。
The present invention was made in view of such problems,
The object is to provide a printed wiring board that can suppress signal interference while reducing the distance of signal #II111, and can form long signal lines in parallel.

[課題を解決するための千Pj.1 本発明のプリント配線板は、基板1上に形成された信号
線2.2闇の基板1部分に穿孔3を設けて成ることを特
徴とするものである。
[1,000 Pj to solve problems. 1 The printed wiring board of the present invention is characterized in that the signal lines 2 and 2 formed on the substrate 1 and the perforations 3 are provided in the dark portion of the substrate 1.

[作用1 このように、基JIil上に形成された信号IiA2,
2開の基板1分に穿孔3を設けることによって、樹脂製
の基板1が有する分布容量に比べて穿孔3を形成するこ
とで、その穿孔3部分において分布容量を小にでき、信
号線2,2を近付けてプリント配線板を小型化しながら
信号の干渉を抑制し、信号線を平行に長くできるように
したものである。
[Action 1 In this way, the signals IiA2,
By forming the perforation 3 in one minute of the two-way board, the distributed capacitance at the perforation 3 portion can be made smaller than the distributed capacitance of the resin board 1, and the signal line 2, 2 closer to each other to reduce the size of the printed wiring board while suppressing signal interference and allowing the signal lines to be parallel and long.

[実施例1 以下本発明の実施例を図面に基づいて詳述する.基板1
は例えば基Hに7ェノール樹脂を含没させ、このような
ブリプレグを多数枚積層して加熱加圧したものであり、
このような基板1に銅箔を積層し、そしてスクリーン印
刷にて回路パターンの印刷を行い、エッチング加工にて
回路パターンの通りに銅箔を残し、これら回路パターン
の信号線2,2に導通させて各種の部品を実装するもの
である. そして基@1上に形成された信号線2.2間の基板lf
flS分に穿孔3を設けてある。かかる穿孔3はきり孔
のようなや円孔4やスリットのような氏孔5でもよく、
その形状形態及び大きさは種々設計変更可能である。
[Embodiment 1] An embodiment of the present invention will be described below in detail based on the drawings. Board 1
For example, 7-phenol resin is impregnated into the group H, and a large number of such Bripregs are laminated and heated and pressurized.
Copper foil is laminated on such a board 1, a circuit pattern is printed by screen printing, the copper foil is left along the circuit pattern by etching, and the signal lines 2 of these circuit patterns are made conductive. It is used to mount various parts. And the substrate lf between the signal lines 2 and 2 formed on the base@1
A perforation 3 is provided at flS. The perforation 3 may be a round hole 4 like a drill hole or a hole 5 like a slit,
Its shape and size can be changed in various designs.

しかして、樹脂製の基板1が有する分布容量に比べて穿
孔3を形成することで、その穿孔3部分において号布容
量を小になし、信号@2 .2を近付けてプリント配線
板を小型化しながら信号の干渉を抑制するものである。
By forming the perforations 3 compared to the distributed capacitance of the resin substrate 1, the capacitance at the perforations 3 is made smaller, and the signal @2. 2 closer together to reduce the size of the printed wiring board and suppress signal interference.

[発明の効果J 以上要するに本発明は、基板上に形成された信号線間の
基板部分に穿孔を設けるから、樹mstの基板が有する
分布容量に比べて穿孔を形成することで、その穿孔部分
において分布容量を小にでき、信号#lな近付けてプリ
ント配線板を小型化しながら信号の干渉を抑制し、信号
線を平行に艮く形成することができるという利点がある
[Effects of the Invention J] In short, the present invention provides perforations in the substrate portion between the signal lines formed on the substrate. There are advantages in that the distributed capacitance can be made small, signal interference can be suppressed while reducing the size of the printed wiring board by bringing the signal #l closer to each other, and the signal lines can be formed in parallel.

【図面の簡単な説明】[Brief explanation of drawings]

@X図は本発明の一実施例の部分平面図、tjS2図は
第1図の八一A線断面図であり、1は基板、2は信号線
、3は穿孔である。 代理人 弁理士 石 田 艮 七
Figure @X is a partial plan view of an embodiment of the present invention, and Figure tjS2 is a sectional view taken along line 81A in Figure 1, where 1 is a substrate, 2 is a signal line, and 3 is a perforation. Agent Patent Attorney Ai Shichi Ishida

Claims (1)

【特許請求の範囲】[Claims] (1)基板上に形成された信号線間の基板部分に穿孔を
設けて成ることを特徴とするプリント配線板。
(1) A printed wiring board characterized in that a hole is provided in a portion of the board between signal lines formed on the board.
JP1116617A 1989-05-10 1989-05-10 Printed wiring board Expired - Lifetime JPH069287B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1116617A JPH069287B2 (en) 1989-05-10 1989-05-10 Printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1116617A JPH069287B2 (en) 1989-05-10 1989-05-10 Printed wiring board

Publications (2)

Publication Number Publication Date
JPH02295183A true JPH02295183A (en) 1990-12-06
JPH069287B2 JPH069287B2 (en) 1994-02-02

Family

ID=14691617

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1116617A Expired - Lifetime JPH069287B2 (en) 1989-05-10 1989-05-10 Printed wiring board

Country Status (1)

Country Link
JP (1) JPH069287B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03265187A (en) * 1990-03-15 1991-11-26 Matsushita Electric Ind Co Ltd Electronic device
EP0921715A1 (en) * 1997-11-06 1999-06-09 Samsung Electronics Co., Ltd. PCB for mounting RF band pass filter and method of manufacture

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5513977U (en) * 1978-07-11 1980-01-29
JPS5849460U (en) * 1981-09-28 1983-04-04 東芝ライテック株式会社 printed wiring board equipment
JPS60169856U (en) * 1984-04-17 1985-11-11 三菱電機株式会社 printed wiring board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5513977U (en) * 1978-07-11 1980-01-29
JPS5849460U (en) * 1981-09-28 1983-04-04 東芝ライテック株式会社 printed wiring board equipment
JPS60169856U (en) * 1984-04-17 1985-11-11 三菱電機株式会社 printed wiring board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03265187A (en) * 1990-03-15 1991-11-26 Matsushita Electric Ind Co Ltd Electronic device
EP0921715A1 (en) * 1997-11-06 1999-06-09 Samsung Electronics Co., Ltd. PCB for mounting RF band pass filter and method of manufacture

Also Published As

Publication number Publication date
JPH069287B2 (en) 1994-02-02

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