JPS6129070B2 - - Google Patents
Info
- Publication number
- JPS6129070B2 JPS6129070B2 JP56205120A JP20512081A JPS6129070B2 JP S6129070 B2 JPS6129070 B2 JP S6129070B2 JP 56205120 A JP56205120 A JP 56205120A JP 20512081 A JP20512081 A JP 20512081A JP S6129070 B2 JPS6129070 B2 JP S6129070B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- memory cell
- voltage
- correction
- bit line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000003321 amplification Effects 0.000 claims description 4
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 4
- 230000005669 field effect Effects 0.000 description 38
- 239000003990 capacitor Substances 0.000 description 18
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 10
- 238000010586 diagram Methods 0.000 description 9
- 230000003071 parasitic effect Effects 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000006870 function Effects 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56205120A JPS58108090A (ja) | 1981-12-21 | 1981-12-21 | メモリ回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56205120A JPS58108090A (ja) | 1981-12-21 | 1981-12-21 | メモリ回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58108090A JPS58108090A (ja) | 1983-06-28 |
JPS6129070B2 true JPS6129070B2 (de) | 1986-07-04 |
Family
ID=16501747
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56205120A Granted JPS58108090A (ja) | 1981-12-21 | 1981-12-21 | メモリ回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58108090A (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6584026B2 (en) | 2000-06-28 | 2003-06-24 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit capable of adjusting input offset voltage |
JP4965883B2 (ja) * | 2006-04-07 | 2012-07-04 | 株式会社東芝 | 半導体集積回路装置および半導体集積回路装置のトリミング方法 |
JP5452348B2 (ja) * | 2009-07-27 | 2014-03-26 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
-
1981
- 1981-12-21 JP JP56205120A patent/JPS58108090A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS58108090A (ja) | 1983-06-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4973864A (en) | Sense circuit for use in semiconductor memory | |
KR100377421B1 (ko) | 반도체 기억 장치 | |
RU2311695C2 (ru) | Устройство считывания заряда (варианты) и запоминающее устройство с матричной адресацией, снабженное таким устройством | |
US6337825B2 (en) | Semiconductor memory device | |
US6201378B1 (en) | Semiconductor integrated circuit | |
JPS6322395B2 (de) | ||
US4494219A (en) | Nonvolatile read only memory device | |
US6512686B2 (en) | Ferroelectric storage device and test method thereof | |
US4980862A (en) | Folded bitline dynamic ram with reduced shared supply voltages | |
US3969708A (en) | Static four device memory cell | |
JP2001043682A (ja) | 半導体装置 | |
US5528545A (en) | Semiconductor memory device | |
KR910004733B1 (ko) | 데이타 버스 리셋트 회로를 지닌 반도체 기억장치 | |
US4858193A (en) | Preamplification method and apparatus for dram sense amplifiers | |
US5815450A (en) | Semiconductor memory device | |
US5566110A (en) | Electrically erasable programmable read only memory and method of operation | |
US7663952B2 (en) | Capacitor supported precharging of memory digit lines | |
EP0318927A2 (de) | Halbleiterspeicher mit Abtastanordnung (ohne Funktionsstörung) | |
JPS6129070B2 (de) | ||
JP3827534B2 (ja) | 半導体記憶装置の基準電圧発生回路及びメモリ読出回路 | |
JPS5925311B2 (ja) | 感知増幅器 | |
JPS5935114B2 (ja) | 増巾回路 | |
KR100214462B1 (ko) | 반도체메모리셀의 라이트 방법 | |
JPS60258793A (ja) | ダイナミック型半導体記憶装置 | |
US20030031043A1 (en) | Integrated dynamic memory, and method for operating the integrated dynamic memory |