JPS6127787B2 - - Google Patents

Info

Publication number
JPS6127787B2
JPS6127787B2 JP2007982A JP2007982A JPS6127787B2 JP S6127787 B2 JPS6127787 B2 JP S6127787B2 JP 2007982 A JP2007982 A JP 2007982A JP 2007982 A JP2007982 A JP 2007982A JP S6127787 B2 JPS6127787 B2 JP S6127787B2
Authority
JP
Japan
Prior art keywords
channel
registration table
identification information
signal
channels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2007982A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58139229A (ja
Inventor
Takashi Morikawa
Hironari Okuda
Tetsuji Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2007982A priority Critical patent/JPS58139229A/ja
Publication of JPS58139229A publication Critical patent/JPS58139229A/ja
Publication of JPS6127787B2 publication Critical patent/JPS6127787B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP2007982A 1982-02-10 1982-02-10 信号選択回路 Granted JPS58139229A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007982A JPS58139229A (ja) 1982-02-10 1982-02-10 信号選択回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007982A JPS58139229A (ja) 1982-02-10 1982-02-10 信号選択回路

Publications (2)

Publication Number Publication Date
JPS58139229A JPS58139229A (ja) 1983-08-18
JPS6127787B2 true JPS6127787B2 (en:Method) 1986-06-27

Family

ID=12017085

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007982A Granted JPS58139229A (ja) 1982-02-10 1982-02-10 信号選択回路

Country Status (1)

Country Link
JP (1) JPS58139229A (en:Method)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04134798U (ja) * 1991-06-07 1992-12-15 シンコウ株式会社 ユニツトキヤビン

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0752432B2 (ja) * 1987-01-20 1995-06-05 富士通株式会社 シリアルインターフェース制御装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04134798U (ja) * 1991-06-07 1992-12-15 シンコウ株式会社 ユニツトキヤビン

Also Published As

Publication number Publication date
JPS58139229A (ja) 1983-08-18

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