JPS61271555A - Transferring system for direct memory access - Google Patents

Abstract

PURPOSE:To prevent the deterioration of the processing capacity of a central processor by providing a DMA bus for transfer of direct memory access DMA independently of a central control bus which transfers the information to the central controller. CONSTITUTION:When the DMA transfer is carried out between a main memory device 3 and an input/output controller 6, the central controller 1 gives an instruction to a DMA controller 8 and also controls selection circuits 10, 11 and 13 to connect the controller 8, the device 3 and the controller 6 to a bus 9. When the DMA transfer request is sent to the controller 8 from the controller 6, the controller 8 starts to transmit the desired information between the controller 6 and the device 3 via a DMA bus 9. When this transfer is through,the controller 8 informs the end of the information transfer to the controller 1. Then the controller 1 controls the circuits 10-13 and connects the controller 8, the device 3 and the controller 6 to a central control bus 7. Thus the controller 1 can perform the processing for use of main memory devices 2 and 4 or an input/output device 5 via the bus 7 even while the information is transmitted under the control of the device 3 and controllers 6 and 8. This prevents the deterioration of the processing capacity of the controller 1.

Description

[Detailed Description of the Invention] [Summary] In an information processing system that performs direct memory access transfer between a main storage device and an input/output control device, a bus for direct memory access transfer is used to transfer information between the central control device and the main storage device. By providing a bus independent of the transfer bus and connecting the main memory device and input/output control device to both buses via a selection circuit controlled by the central control device, the central control device can be connected to other buses even during direct memory access transfer. It enables the use of the main storage device or input/output control device.

[Industrial application field]

The present invention relates to an improvement of a direct memory access transfer method in an information processing system having a direct memory access transfer function.

In an information processing system that connects input/output control devices such as a central control unit, main storage device, external storage control device, etc. via a common bus, for example, when transferring information from the external storage device to the main storage device, the central control device After specifying the address on the main memory to store the information to be stored, the amount of information to be transferred, etc., the information is directly transferred between the external storage and the main memory via the common bus, and the central The control device performs other processing, so-called direct memory access (
A transfer method (hereinafter referred to as DMA) has been put into practical use.

It is desirable that the central control unit be able to exchange information with other main storage units or input/output control units via a common bus during MA transfer.

[Conventional technology]

FIG. 2 is a diagram showing an example of a conventional direct memory access transfer method.

In FIG. 2, a central control device 1, main storage devices 2 to 4
, input/output control devices 5 and 6 that control various input/output devices or communication lines (not shown) are connected to a common bus (hereinafter referred to as central control bus 7). Note that the main storage device 2
It is assumed that the input/output control device 5 is used only by the central control device 1.

Furthermore, a DMAfldlJI device 8 that controls DMA transfer between the main storage device 3 or 4 and the input/output control device 6 under instructions from the central control device 1 is connected to the central control bus 7.

When performing DMA transfer between the main storage device 3 and the input/output control device 6, after the central control device 1 gives the above-mentioned instruction to the DMA control device 8, a DMA transfer request is sent from the input/output control device 6. When the signal is transmitted to the DMA control device 8, the DMA control device 8 transmits the blockage signal of the central control bus 7 to the central control device 1, and also sends the necessary information to the input/output control device 6 between it and the main storage device 3. Start transferring information.

During this time, the central control unit 1 can execute processing that does not use the main memory N2.4 or the input/output control unit 5.

When the information transfer between the input/output control device 6 and the main storage device 3 is eventually completed, the DMA control device 8 notifies the central control device 1 of the completion of the information transfer and releases the blockage of the central control bus 7.

[Problem that the invention seeks to solve]

As is clear from the above explanation, in the conventional direct memory access transfer method, while the input/output control device 6 and the main storage device 3 are transferring information under the control of the DMA, M control device 8, the central control is performed. The device 1 will be unable to perform processing using the main storage device 2.4 or the input/output control device 5, and there is a possibility that the processing capacity of the central control device 1 will be reduced.

[Means for solving problems]

The present invention solves the above problems by taking the following measures.

That is, in the present invention, a bus for DMA transfer (9 in FIG. 1) is provided independently of a bus (7) for transferring information to and from the central control unit (1).

In addition, the main storage device (3, 4) and the input/output control device (6)
, a selection circuit (1) controlled by a central controller (1)
1, 12, 13) to both the buses (7, 9).

[Effect]

That is, according to the present invention, DMA transfer is performed via a dedicated bus, eliminating the need for a built-in bus for transferring information between the central control unit and the central control unit. It becomes possible to transmit information to and from an unrelated main storage device or input/output control device, and a decrease in the processing capacity of the central control device is prevented.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing a direct memory access transfer method according to an embodiment of the present invention. Note that the same reference numerals indicate the same objects throughout the figures.

In FIG. 1, in addition to the central control bus 7, a bus for DMA transfer (hereinafter referred to as DMA bus 9) is provided.
The main storage device 3.4, the input/output control device 6, and the DMA control device 8, which can be the targets of A transfer, are connected to the central control bus 7 and the DMA bus 9 via selection circuits 10 to 13 controlled by the central control device 1. Connected to anything. Normally, the central control device 1 includes a DMA control device 8, a main memory device 3.4
The selection circuits 10 to 13 are set so that the input/output control devices 6 and 6 are all connected to the central control bus 7.

In FIG. 1, when performing DMA transfer between the main storage device 3 and the input/output control device 6, the central control device 1
While giving the above-mentioned instructions to the A i control device 8,
It controls selection circuits 10, 11 and 13, and connects DMA control device 8, main storage device 3, and input/output control device 6 to DMA bus 9.

Next, when the DMA transfer request is transmitted from the input/output control device 6 to the DMA control device 8, the DMA control device 8 transfers the required information to the input/output control device 6 from the main storage device 3 via the DMA bus 9. Start the transfer via

Meanwhile, the central control unit 1 can also execute processes using the main memory 2.4 or the input/output control unit 5 via the central control bus 7.

When the information transfer between the main memory bag W3 and the input/output control device 6 is eventually completed, the DMA control device 8 notifies the central control device 1 of the completion of the information transfer.

The central control device 1 that has received the notification selects the selection circuit 10.1.
1 and 13, and connects the DMA control device 8, main storage device 3, and input/output control device 6 to the central control bus 7.

As is clear from the above description, according to this embodiment, even when the main storage device 3 and the input/output control device 6 are transferring information under the control of the DMA control device 8, the central control device 1
．． 4 or the input/output control device 5 can be performed via the central control bus 7, and a decrease in the processing capacity of the central control device 1 is prevented.

Note that FIG. 1 is merely one embodiment of the present invention, and the configuration of the information processing system, for example, is not limited to that shown in the figure, and many other modifications may be considered; In this case, the effects of the present invention remain the same.

〔Effect of the invention〕

As described above, according to the present invention, in the information processing system, even during DMA transfer, it becomes possible for the central control unit to transmit information between the main storage device or the input/output control unit that is not related to the DMA transfer, and the central control unit A decrease in the processing capacity of the device is prevented.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a direct memory access transfer method according to an embodiment of the present invention, and FIG. 2 is a diagram showing an example of a conventional direct memory access transfer method. In the figure, 1 is a central control unit, 2 to 4 are main storage units, 5 and 6 are input/output control units, 7 is a central control bus, and 8
1, numeral 9 represents a DMA control device, numeral 9 represents a DMA bus, and numerals 10 to 13 represent selection circuits. Tsubo 1 Same conventional example 10T diagram 2 mouth

Claims (1)

[Claims] In an information processing system equipped with an input/output control device (6) that performs a direct memory access transfer function between main storage devices (3, 4), a bus (9) for direct memory access transfer is connected to a central control device (1). ) is provided independently from the bus (7) for transferring information to and from the main storage device (3,
4) and input/output control device (6) to the central control device (
1) A direct memory access transfer system, characterized in that it is connected to both the buses (7, 9) via selection circuits (11, 12, 13) controlled by the following.