JPS61263124A - 半導体装置製造用のマスク板 - Google Patents

半導体装置製造用のマスク板

Info

Publication number
JPS61263124A
JPS61263124A JP60105310A JP10531085A JPS61263124A JP S61263124 A JPS61263124 A JP S61263124A JP 60105310 A JP60105310 A JP 60105310A JP 10531085 A JP10531085 A JP 10531085A JP S61263124 A JPS61263124 A JP S61263124A
Authority
JP
Japan
Prior art keywords
wafer
mask
pattern
mask plate
plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60105310A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0466094B2 (enExample
Inventor
Yutaka Kadonishi
門西 裕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP60105310A priority Critical patent/JPS61263124A/ja
Publication of JPS61263124A publication Critical patent/JPS61263124A/ja
Publication of JPH0466094B2 publication Critical patent/JPH0466094B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10P95/00

Landscapes

  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
JP60105310A 1985-05-16 1985-05-16 半導体装置製造用のマスク板 Granted JPS61263124A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60105310A JPS61263124A (ja) 1985-05-16 1985-05-16 半導体装置製造用のマスク板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60105310A JPS61263124A (ja) 1985-05-16 1985-05-16 半導体装置製造用のマスク板

Publications (2)

Publication Number Publication Date
JPS61263124A true JPS61263124A (ja) 1986-11-21
JPH0466094B2 JPH0466094B2 (enExample) 1992-10-22

Family

ID=14404129

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60105310A Granted JPS61263124A (ja) 1985-05-16 1985-05-16 半導体装置製造用のマスク板

Country Status (1)

Country Link
JP (1) JPS61263124A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1278236A1 (en) * 2001-07-09 2003-01-22 Sanyo Electric Co., Ltd. Method of dicing a compound semiconductor wafer and compound semiconductor substrate thereby formed

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1278236A1 (en) * 2001-07-09 2003-01-22 Sanyo Electric Co., Ltd. Method of dicing a compound semiconductor wafer and compound semiconductor substrate thereby formed
US6897126B2 (en) 2001-07-09 2005-05-24 Sanyo Electric, Co., Ltd. Semiconductor device manufacturing method using mask slanting from orientation flat
CN100466170C (zh) * 2001-07-09 2009-03-04 三洋电机株式会社 掩模以及使用该掩模的化合物半导体装置的制造方法

Also Published As

Publication number Publication date
JPH0466094B2 (enExample) 1992-10-22

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