JPS6126154B2 - - Google Patents

Info

Publication number
JPS6126154B2
JPS6126154B2 JP55052461A JP5246180A JPS6126154B2 JP S6126154 B2 JPS6126154 B2 JP S6126154B2 JP 55052461 A JP55052461 A JP 55052461A JP 5246180 A JP5246180 A JP 5246180A JP S6126154 B2 JPS6126154 B2 JP S6126154B2
Authority
JP
Japan
Prior art keywords
potential
memory cell
power supply
external power
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55052461A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56148792A (en
Inventor
Hajime Shirato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP5246180A priority Critical patent/JPS56148792A/ja
Publication of JPS56148792A publication Critical patent/JPS56148792A/ja
Publication of JPS6126154B2 publication Critical patent/JPS6126154B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/81—Threshold
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C2029/5004—Voltage

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
JP5246180A 1980-04-21 1980-04-21 Testing method for margin voltage of memory cell Granted JPS56148792A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5246180A JPS56148792A (en) 1980-04-21 1980-04-21 Testing method for margin voltage of memory cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5246180A JPS56148792A (en) 1980-04-21 1980-04-21 Testing method for margin voltage of memory cell

Publications (2)

Publication Number Publication Date
JPS56148792A JPS56148792A (en) 1981-11-18
JPS6126154B2 true JPS6126154B2 (enrdf_load_stackoverflow) 1986-06-19

Family

ID=12915352

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5246180A Granted JPS56148792A (en) 1980-04-21 1980-04-21 Testing method for margin voltage of memory cell

Country Status (1)

Country Link
JP (1) JPS56148792A (enrdf_load_stackoverflow)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5891594A (ja) * 1981-11-27 1983-05-31 Fujitsu Ltd ダイナミツク型半導体記憶装置
US4612630A (en) * 1984-07-27 1986-09-16 Harris Corporation EEPROM margin testing design
US5142495A (en) * 1989-03-10 1992-08-25 Intel Corporation Variable load for margin mode
US5559739A (en) * 1995-09-28 1996-09-24 International Business Machines Corporation Dynamic random access memory with a simple test arrangement
US5610867A (en) * 1995-09-28 1997-03-11 International Business Machines Corporation DRAM signal margin test method

Also Published As

Publication number Publication date
JPS56148792A (en) 1981-11-18

Similar Documents

Publication Publication Date Title
US5241503A (en) Dynamic random access memory with improved page-mode performance and method therefor having isolator between memory cells and sense amplifiers
US5184326A (en) Integrated semiconductor memory of the dram type and method for testing the same
US4504929A (en) Dynamic semiconductor memory device
KR930008416B1 (ko) 반도체 기억 회로
US5903502A (en) Variable equilibrate voltage circuit for paired digit lines
US4286178A (en) Sense amplifier with dual parallel driver transistors in MOS random access memory
JPS6126154B2 (enrdf_load_stackoverflow)
US4255679A (en) Depletion load dynamic sense amplifier for MOS random access memory
TWI287793B (en) Increasing a refresh period in a semiconductor memory device
JPH06176572A (ja) 半導体記憶装置
JP3238806B2 (ja) 半導体記憶装置
JPS59180891A (ja) 半導体メモリ
JPS61217986A (ja) ダイナミツク型ｒａｍ
JPS61178795A (ja) ダイナミツク型半導体記憶装置
KR100214462B1 (ko) 반도체메모리셀의 라이트 방법
JPH01192098A (ja) 半導体記憶装置
JPS6149760B2 (enrdf_load_stackoverflow)
JPS63282994A (ja) 半導体ダイナミック・ランダム・アクセス・メモリ
JPH10208498A (ja) 半導体メモリ回路
JPS6013396A (ja) ダイナミツク型ｒａｍ
JP2768130B2 (ja) 半導体メモリ回路のリーク電流測定方法
JPH0520833B2 (enrdf_load_stackoverflow)
JPS5939836B2 (ja) 記憶集積回路
JPS59104793A (ja) ダイナミツク型ｒａｍ
JPH0756751B2 (ja) １トランジスタ型ｍｏｓダイナミックｒａｍ