JPS6124853B2 - - Google Patents

Info

Publication number
JPS6124853B2
JPS6124853B2 JP17267680A JP17267680A JPS6124853B2 JP S6124853 B2 JPS6124853 B2 JP S6124853B2 JP 17267680 A JP17267680 A JP 17267680A JP 17267680 A JP17267680 A JP 17267680A JP S6124853 B2 JPS6124853 B2 JP S6124853B2
Authority
JP
Japan
Prior art keywords
signal
pulse
circuit
violation
negative
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP17267680A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5797254A (en
Inventor
Koji Nishizaki
Tetsuo Murase
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17267680A priority Critical patent/JPS5797254A/ja
Publication of JPS5797254A publication Critical patent/JPS5797254A/ja
Publication of JPS6124853B2 publication Critical patent/JPS6124853B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4917—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes
    • H04L25/4923—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using ternary codes
    • H04L25/4925—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using ternary codes using balanced bipolar ternary codes

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
JP17267680A 1980-12-09 1980-12-09 Decoding circuit for b6zs code Granted JPS5797254A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17267680A JPS5797254A (en) 1980-12-09 1980-12-09 Decoding circuit for b6zs code

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17267680A JPS5797254A (en) 1980-12-09 1980-12-09 Decoding circuit for b6zs code

Publications (2)

Publication Number Publication Date
JPS5797254A JPS5797254A (en) 1982-06-16
JPS6124853B2 true JPS6124853B2 (enrdf_load_html_response) 1986-06-12

Family

ID=15946298

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17267680A Granted JPS5797254A (en) 1980-12-09 1980-12-09 Decoding circuit for b6zs code

Country Status (1)

Country Link
JP (1) JPS5797254A (enrdf_load_html_response)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0616635B2 (ja) * 1983-12-05 1994-03-02 富士通株式会社 誤りパルス検出回路
JPS60214141A (ja) * 1984-04-09 1985-10-26 Fujitsu Ltd 復号回路
JPS63142921A (ja) * 1986-12-05 1988-06-15 Fujitsu Ltd Ｈｄｂ３符号デコ−ダ

Also Published As

Publication number Publication date
JPS5797254A (en) 1982-06-16

Similar Documents

Publication Publication Date Title
JPS6124853B2 (enrdf_load_html_response)
JPS6319106B2 (enrdf_load_html_response)
JPH0644756B2 (ja) 同期クロツク発生回路
JPH0431211B2 (enrdf_load_html_response)
JPS6340384B2 (enrdf_load_html_response)
JPS60142652A (ja) 復号回路
JPH0124386B2 (enrdf_load_html_response)
JPH0253326A (ja) Ｈｄｂ−３デコーダ符号則誤検出回路
SU1181155A1 (ru) Преобразователь последовательного кода в параллельный
JPH01293738A (ja) 復調回路
JPH0320942B2 (enrdf_load_html_response)
JPH0131743B2 (enrdf_load_html_response)
JPH0616635B2 (ja) 誤りパルス検出回路
JPS6027460B2 (ja) 準３値符号ワ−ド同期回路
JPH05122206A (ja) 同期クロツク信号再生方法
JPH02202738A (ja) シリアルデータ受信回路
JPH0799826B2 (ja) ディジタル位相誤差検出回路
JPS60144046A (ja) フレ−ム同期回路
JPH01129544A (ja) データ復合化用タイミング抽出回路
JPS61107811A (ja) 状態監視回路
JPS6198272U (enrdf_load_html_response)
JPS62118633A (ja) デイジタル識別回路
JPS62108623A (ja) 信号断検出方式
JPH01245737A (ja) シリアルデータ転送回路
JPH03160599A (ja) アラーム出力保護回路