JPS61248539A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS61248539A
JPS61248539A JP60089046A JP8904685A JPS61248539A JP S61248539 A JPS61248539 A JP S61248539A JP 60089046 A JP60089046 A JP 60089046A JP 8904685 A JP8904685 A JP 8904685A JP S61248539 A JPS61248539 A JP S61248539A
Authority
JP
Japan
Prior art keywords
layer
wafer
solder
chip
melting point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60089046A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0149021B2 (enrdf_load_stackoverflow
Inventor
Masayoshi Kujirai
鯨井 正義
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP60089046A priority Critical patent/JPS61248539A/ja
Publication of JPS61248539A publication Critical patent/JPS61248539A/ja
Publication of JPH0149021B2 publication Critical patent/JPH0149021B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group subclass H10D
    • H01L25/074Stacked arrangements of non-apertured devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135Double encapsulation or coating and encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)
JP60089046A 1985-04-26 1985-04-26 半導体装置の製造方法 Granted JPS61248539A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60089046A JPS61248539A (ja) 1985-04-26 1985-04-26 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60089046A JPS61248539A (ja) 1985-04-26 1985-04-26 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS61248539A true JPS61248539A (ja) 1986-11-05
JPH0149021B2 JPH0149021B2 (enrdf_load_stackoverflow) 1989-10-23

Family

ID=13959943

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60089046A Granted JPS61248539A (ja) 1985-04-26 1985-04-26 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS61248539A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0334451A (ja) * 1989-06-30 1991-02-14 Hitachi Ltd 樹脂モールド半導体装置
JP2001176890A (ja) * 1999-12-21 2001-06-29 Rohm Co Ltd 半導体装置及び半導体装置の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0334451A (ja) * 1989-06-30 1991-02-14 Hitachi Ltd 樹脂モールド半導体装置
JP2001176890A (ja) * 1999-12-21 2001-06-29 Rohm Co Ltd 半導体装置及び半導体装置の製造方法

Also Published As

Publication number Publication date
JPH0149021B2 (enrdf_load_stackoverflow) 1989-10-23

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