JPS61214475A - Thin-film transistor - Google Patents

Thin-film transistor

Info

Publication number
JPS61214475A
JPS61214475A JP5558185A JP5558185A JPS61214475A JP S61214475 A JPS61214475 A JP S61214475A JP 5558185 A JP5558185 A JP 5558185A JP 5558185 A JP5558185 A JP 5558185A JP S61214475 A JPS61214475 A JP S61214475A
Authority
JP
Japan
Prior art keywords
contact layer
ohmic contact
phosphorus
thin film
diffusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5558185A
Other languages
Japanese (ja)
Inventor
Akihisa Matsuda
彰久 松田
Hideo Tanaka
秀夫 田中
Tsuneo Yamazaki
山崎 恒夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology, Seiko Instruments Inc filed Critical Agency of Industrial Science and Technology
Priority to JP5558185A priority Critical patent/JPS61214475A/en
Publication of JPS61214475A publication Critical patent/JPS61214475A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To not only inhibit the diffusion of phosphorus to other layers from an ohmic contact layer but also increase the growth rate of the ohmic contact layer, and to improve the safety of a raw material gas by forming the ohmic contact layer out of N-type hydride amorphous silicon containing fluorine. CONSTITUTION:N-type hydride amorphous silicon containing fluorine is used as a material for an ohmic contact layer 6, and trifluoride silane containing phosphine is employed as a raw material gas for preparing N<+> a-Si:H:F, thus inhibiting a diffusion to source-drain electrodes 7, 8 of phosphorus, then increasing the growth rate of the ohmic contact layer 6. When an ohmic contact layer 5 is formed out of said material, the diffusion to the source-drain electrodes 7, 8 of phosphorus can be suppressed because the diffusion coefficient of phosphorus in N<+> a-Si:H:F is smaller than that of phosphorus in N<+> a-Si:H. The growth rate of the ohmic contact layer 6 is made faster than that at a time when using raw material gases except trifluoride silane, such as silane, hydrogen and tetrafluoride silica, etc. by several times.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は液晶パネルの駆動等に用いらnる薄膜トラン
ジスタ(以下T]FTと略す】に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a thin film transistor (hereinafter abbreviated as FT) used for driving a liquid crystal panel, etc.

〔発明の概要〕[Summary of the invention]

この発明は液晶パネルの駆動等に用いらnるTFTにお
いて、オーム接触層6t−8フツ化シランと水素、ホス
フィン等から作成することによりリンがオーム接触層6
からソース、ドレイン電極7.8へ拡散するのを防ぎ、
且つオーム接触層6の成長速度を増ししかも原料ガスの
危険性が々いようにしtものである。
In a TFT used for driving a liquid crystal panel, the present invention provides an ohmic contact layer 6t-8 made of fluorinated silane, hydrogen, phosphine, etc.
to prevent diffusion from the source and drain electrodes 7.8,
Moreover, the growth rate of the ohmic contact layer 6 is increased, and the danger of the source gas is increased.

〔従来の技術〕[Conventional technology]

第2図は従来のTPTの断面構造図である。第2図にお
いて1は絶縁性基板で石英、ガラス等から成る。2はゲ
ート電極であってクロム、アルミニウム等から取り絶縁
性基板1の上にスパッタ法、真窒蒸渭法等で形成さnる
。ゲート肥縁膜8及び非晶質半導体薄膜4は各々二酸化
シリコン及び水素化非晶質シリコン等から成りともにP
OVD法によってゲート電極2及び絶縁性基rL1の上
に形成される。絶縁膜5は二酸化シリコン等がら成りr
cv:o法によって非晶負半導体薄膜4の上に形成さI
Lる。オーム接触層6は従来ル型水素化非晶質シリコン
(1十−α−’ i : B)titはホスフィン、水
素、4フツ化ケイ2をぶ科ガスとするフッ素を含むn型
水素化非晶負シリコンC%十−α−εi:H:F)によ
って形成してい几。
FIG. 2 is a cross-sectional structural diagram of a conventional TPT. In FIG. 2, reference numeral 1 denotes an insulating substrate made of quartz, glass, or the like. Reference numeral 2 denotes a gate electrode, which is made of chromium, aluminum, etc., and is formed on the insulating substrate 1 by sputtering, true nitrogen evaporation, or the like. The gate thickening film 8 and the amorphous semiconductor thin film 4 are each made of silicon dioxide, hydrogenated amorphous silicon, etc., and are both made of P.
It is formed on the gate electrode 2 and the insulating group rL1 by an OVD method. The insulating film 5 is made of silicon dioxide or the like.
I formed on the amorphous negative semiconductor thin film 4 by the cv:o method.
L. The ohmic contact layer 6 is a conventional hydrogenated amorphous silicon (10-α-' i : B) titanium oxide containing n-type hydrogenated non-crystalline silicon containing phosphine, hydrogen, and fluorine containing silicon tetrafluoride 2 as a gas. It is made of crystalline negative silicon (C% 10-α-εi:H:F).

〔発明が・解決しようとする間勉点〕[Study points while the invention is trying to solve]

オーム級触唐6の材料に【:従来外十−α−s6:Hが
広く用いら几ている。しかし、n十−6−B4:1i中
に含まnるりンは拡散係数が大きくソース、ドレイン電
極7.8に容易に拡散し、その九めに接触抵抗t−6ま
り下げることができなかった。リンの拡散を防ぐために
最近答十−α−8(:H:Fが使用さnることがめるが
 、+−↓−sz:H二y1作るだめの従来のyA科ガ
スの主成分4フッ化ケイ素は毒性が強く、t7trjX
としての成長速度も遅いなどの欠点があった。
Conventionally, 10-α-s6:H has been widely used as the material for Ohm-class contact 6. However, nruphosphorus contained in n-6-B4:1i has a large diffusion coefficient and easily diffuses into the source and drain electrodes, making it impossible to lower the contact resistance by t-6. . Recently, to prevent the diffusion of phosphorus, 10-α-8(:H:F) has been used, but +-↓-sz:H2y1 is the main component of the conventional yA family gas that cannot be made. Silicon is highly toxic and t7trjX
There were drawbacks such as slow growth rate.

〔問題を解決するための手段〕[Means to solve the problem]

そこでこの発明は従来のかかる欠点1に解決するtめオ
ーム接触層6の材料としてフッ素を含むをn型水素化非
晶質シリコンを用い且つ外+−5−Bi:H:Ft−作
成する九めの原料ガスとしてホスフィンを含む3フッ化
シ2ンを使用することによってリンのソース、ドレイン
電W7.8への拡散を抑制し且つオーム接触層6の成長
速度を速めるようにした。
Therefore, the present invention solves the above drawbacks of the conventional ohmic contact layer 6 by using n-type hydrogenated amorphous silicon containing fluorine as the material of the ohmic contact layer 6 and creating an outer +-5-Bi:H:Ft-9. By using phosphorus trifluoride containing phosphine as the raw material gas, diffusion of phosphorus into the source/drain electrode W7.8 is suppressed and the growth rate of the ohmic contact layer 6 is increased.

〔作用〕[Effect]

□ 上記の材料でオーム妥触層5t−形成すると 、+
−,−s4:a:vの中のリンは、+  、、B4二I
I中のリンより拡散係数が小さいのでリンのソース、ド
レイン電極7.8への拡散が抑制でき且つオーム接触層
6の成長速度は3フッ化シラン以外の原料ガス、例えば
シラン、水素と4フッ化ケイ素などの原料ガスを用いた
場合に比べ数倍速くなる。
□ When forming an ohmic compatible layer 5t- with the above material, +
-, -s4: phosphorus in a:v is +,,B42I
Since the diffusion coefficient is smaller than that of phosphorus in I, the diffusion of phosphorus into the source and drain electrodes 7.8 can be suppressed, and the growth rate of the ohmic contact layer 6 can be increased by using source gases other than trifluorosilane, such as silane, hydrogen and tetrafluorosilane. This is several times faster than when using raw material gas such as silicon oxide.

〔実施例〕〔Example〕

以下に本発明の実施例を図面に基いて詳細に説明する。 Embodiments of the present invention will be described in detail below with reference to the drawings.

第1図に本発明でオーム黴触1−に用いるn”−a−8
i : H: Fir OVDK ヨッテ作成する際の
膜の成長速度と投入電力@贋との関係を示す。黒丸は本
発明のホスフィンと8フツ化シランとt−原料ガスに用
いt場合、白丸番;従来通りホスフィンと47フ化ケイ
素と水素と金属湯ガスに用い九場会金示している。従来
の原料ガスでは成長速度が遅く0.7〜8.OA/秒′
秒置8度る。
Figure 1 shows n''-a-8 used for ohmic mold contact 1- in the present invention.
i: H: Fir OVDK Shows the relationship between the film growth rate and the input power @fake when creating the yacht. The black circles indicate the number of white circles used for the phosphine, octafluoride silane, and raw material gas of the present invention. With conventional raw material gas, the growth rate is slow and is 0.7 to 8. OA/sec'
The second is 8 degrees.

−万本発明の原料ガスでは成長速度が2.0〜8、QA
/秒程度であり、従来の成長速度を上回っている。また
8フツ化シランは4フツ化ケイ素、シランに比べて毒性
、燃性とも低い。ま7′c8フツ化シ2ンはオーム接触
層全フッ素を含むn散水素化微結晶非結晶混相シ、リコ
ン(%+−μc −8i:Ii:IF)によって形成す
る場合にも用いることができ、一般には水素、ホスフィ
ンと8フツ化シラ70’l’ OVDVCヨツ”Cn”
−p O−B i : H:11′を形成する。
-The raw material gas of the present invention has a growth rate of 2.0 to 8, QA
/second, which exceeds the conventional growth rate. Silane octafluoride is also lower in toxicity and flammability than silicon tetrafluoride and silane. The 7'c8 fluoride silicon can also be used when the ohmic contact layer is formed by an n-dispersed hydrogenated microcrystalline amorphous mixed phase silicon containing total fluorine (%+-μc-8i:Ii:IF). Generally, hydrogen, phosphine and octafluoride 70'l' OVDVC "Cn"
-p O-B i :H:11' is formed.

本発明では第2図のオーム接触層6t−ホスフィンと8
フツ化シランとからI’OVD法によって作成し九n十
−G−8<:H:Fにより形成している。ソース電極7
、ドレイン電極8はともにクロム、アルミニウム等から
成りオーム接触層6の上にスパッタ法により形成さrl
−る。
In the present invention, the ohmic contact layer 6t-phosphine and 8
It is prepared from fluorinated silane by the I'OVD method and formed by 9n0-G-8<:H:F. Source electrode 7
, the drain electrode 8 is made of chromium, aluminum, etc. and is formed on the ohmic contact layer 6 by sputtering.
-ru.

上記のように構成さrL7HTIFTのゲート電標2に
電圧を印加すると、ゲート絶縁膜8と非晶質半導体薄膜
4の間にチャネルが形成さ74,1 このときにソース
電極7とドレイン電極8の間に電圧を印加すnば、ソー
スを極7、ドレイン電極8の間に電流が流nる。オーム
接触層6は、ソース、ドレイン電極7.8と非晶質半導
体薄膜4との接触抵抗を低く押さえる働きがある。
When a voltage is applied to the gate electrode 2 of the rL7HTIFT configured as described above, a channel is formed between the gate insulating film 8 and the amorphous semiconductor thin film 4 74,1. If a voltage is applied between them, a current flows between the source electrode 7 and the drain electrode 8. The ohmic contact layer 6 has the function of keeping the contact resistance between the source and drain electrodes 7.8 and the amorphous semiconductor thin film 4 low.

〔発明の効果〕〔Effect of the invention〕

この発明は以上説明したようにオーム接触層から他層へ
のリンの拡散を抑制するだけでなくオーム接触層の成長
速度を増し、がっi料ガスの安全性が高いという効果が
ある。
As explained above, this invention not only suppresses the diffusion of phosphorus from the ohmic contact layer to other layers, but also increases the growth rate of the ohmic contact layer, and has the effect of increasing the safety of the i-metal gas.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明にかかるオーム接触層の成長速度を示す
図、第2図は従来のTPTの断面構造図でbる。 40.非晶質半導体薄膜 66.オーム通触層 70.ソース電極 80.ドレイン電極 以上 工業技術院長 出願人 セイコー電子工業株式会社 代理人 弁理士 最 上    務 投入’Uy’f!l <W/craリ オーA1卆触層のA長速崖とホT図 第1図
FIG. 1 is a diagram showing the growth rate of an ohmic contact layer according to the present invention, and FIG. 2 is a diagram showing a cross-sectional structure of a conventional TPT. 40. Amorphous semiconductor thin film 66. Ohmic contact layer 70. Source electrode 80. Applicant for Drain Electrode and above Director of Industrial Science and Technology Agent of Seiko Electronics Co., Ltd. Patent Attorney Mogami Input 'Uy'f! l <W/cra Rioux A1 contact layer A long scarp and Ho T diagram Figure 1

Claims (2)

【特許請求の範囲】[Claims] (1)絶縁性基板と、前記絶縁性基板上に設けられたゲ
ート電極と、前記ゲート電極を被うように形成されたゲ
ート絶縁膜と、前記ゲート絶縁膜上に形成された非晶質
半導体薄膜と、前記非晶質半導体薄膜上にあつて、前記
ゲート電極の直上及び直上から間隔を置いて設けられた
絶縁膜と、前記非晶質半導体薄膜上にあつて、前記絶縁
膜に被われていない部分に形成されたオーム接触層と、
前記オーム接触層上に設けられたソース電極及びドレイ
ン電極とから成る薄膜トランジスタにおいて、前記オー
ム接触層がホスフィンを含む3フッ化シランを原料とす
るガスにより作られるフッ素を含むn型水素化非晶質シ
リコンであることを特徴とする薄膜トランジスタ。
(1) An insulating substrate, a gate electrode provided on the insulating substrate, a gate insulating film formed to cover the gate electrode, and an amorphous semiconductor formed on the gate insulating film. a thin film, an insulating film provided on the amorphous semiconductor thin film directly above and spaced apart from directly above the gate electrode, and an insulating film provided on the amorphous semiconductor thin film and covered with the insulating film. an ohmic contact layer formed on the non-contact parts;
In a thin film transistor comprising a source electrode and a drain electrode provided on the ohmic contact layer, the ohmic contact layer is made of a fluorine-containing n-type hydrogenated amorphous material made from a gas made from trifluorosilane containing phosphine. A thin film transistor characterized by being made of silicon.
(2)前記オーム接触層がフィンを含む3フッ化シラン
と水素とを原料とするガスにより作られるフッ素を含む
をn型水素化微結晶非結晶混相シリコンであることを特
徴とする特許請求の範囲第1項記載の薄膜トランジスタ
(2) The ohmic contact layer is a fluorine-containing n-type hydrogenated microcrystalline amorphous mixed-phase silicon made from a gas containing trifluorosilane containing fins and hydrogen as raw materials. The thin film transistor according to scope 1.
JP5558185A 1985-03-19 1985-03-19 Thin-film transistor Pending JPS61214475A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5558185A JPS61214475A (en) 1985-03-19 1985-03-19 Thin-film transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5558185A JPS61214475A (en) 1985-03-19 1985-03-19 Thin-film transistor

Publications (1)

Publication Number Publication Date
JPS61214475A true JPS61214475A (en) 1986-09-24

Family

ID=13002703

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5558185A Pending JPS61214475A (en) 1985-03-19 1985-03-19 Thin-film transistor

Country Status (1)

Country Link
JP (1) JPS61214475A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5440168A (en) * 1993-02-22 1995-08-08 Ryoden Semiconductor System Engineering Corporation Thin-film transistor with suppressed off-current and Vth
KR19980074495A (en) * 1997-03-25 1998-11-05 윤종용 Thin film transistor using fluorine-containing oxide film (SiOF) and manufacturing method thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56135968A (en) * 1980-03-27 1981-10-23 Canon Inc Amorphous silicon thin film transistor and manufacture thereof
JPS5767020A (en) * 1980-10-15 1982-04-23 Agency Of Ind Science & Technol Thin silicon film and its manufacture

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56135968A (en) * 1980-03-27 1981-10-23 Canon Inc Amorphous silicon thin film transistor and manufacture thereof
JPS5767020A (en) * 1980-10-15 1982-04-23 Agency Of Ind Science & Technol Thin silicon film and its manufacture

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5440168A (en) * 1993-02-22 1995-08-08 Ryoden Semiconductor System Engineering Corporation Thin-film transistor with suppressed off-current and Vth
US5885858A (en) * 1993-02-22 1999-03-23 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing thin-film transistor
US6103556A (en) * 1993-02-22 2000-08-15 Mitsubishi Denki Kabushiki Kaisha Thin-film transistor and method of manufacturing the same
KR19980074495A (en) * 1997-03-25 1998-11-05 윤종용 Thin film transistor using fluorine-containing oxide film (SiOF) and manufacturing method thereof

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