JPS6120758Y2 - - Google Patents
Info
- Publication number
- JPS6120758Y2 JPS6120758Y2 JP7504980U JP7504980U JPS6120758Y2 JP S6120758 Y2 JPS6120758 Y2 JP S6120758Y2 JP 7504980 U JP7504980 U JP 7504980U JP 7504980 U JP7504980 U JP 7504980U JP S6120758 Y2 JPS6120758 Y2 JP S6120758Y2
- Authority
- JP
- Japan
- Prior art keywords
- lead
- semiconductor element
- sub
- thin metal
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 21
- 229910052751 metal Inorganic materials 0.000 claims description 15
- 239000002184 metal Substances 0.000 claims description 15
- 239000000758 substrate Substances 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 11
- 239000011347 resin Substances 0.000 claims description 11
- 229920005989 resin Polymers 0.000 claims description 11
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 14
- 229910052709 silver Inorganic materials 0.000 description 14
- 239000004332 silver Substances 0.000 description 14
- 238000007747 plating Methods 0.000 description 11
- 238000005452 bending Methods 0.000 description 3
- 230000005012 migration Effects 0.000 description 3
- 238000013508 migration Methods 0.000 description 3
- 230000000630 rising effect Effects 0.000 description 3
- 238000010292 electrical insulation Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000001125 extrusion Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical group [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7504980U JPS6120758Y2 (enrdf_load_html_response) | 1980-05-29 | 1980-05-29 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7504980U JPS6120758Y2 (enrdf_load_html_response) | 1980-05-29 | 1980-05-29 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57945U JPS57945U (enrdf_load_html_response) | 1982-01-06 |
JPS6120758Y2 true JPS6120758Y2 (enrdf_load_html_response) | 1986-06-21 |
Family
ID=29437739
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7504980U Expired JPS6120758Y2 (enrdf_load_html_response) | 1980-05-29 | 1980-05-29 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6120758Y2 (enrdf_load_html_response) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63211638A (ja) * | 1988-01-08 | 1988-09-02 | Nec Home Electronics Ltd | 樹脂封止型半導体装置の製造方法 |
-
1980
- 1980-05-29 JP JP7504980U patent/JPS6120758Y2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS57945U (enrdf_load_html_response) | 1982-01-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
USRE35109E (en) | Semiconductor device and method for fabricating the same | |
US20040056337A1 (en) | Semiconductor device | |
EP0848423A1 (en) | Resin-encapsulated semiconductor device and method of manufacturing the same | |
KR0144164B1 (ko) | 엘오씨 반도체 패키지 및 반도체 장치를 패키징하는 방법 | |
JP2000188366A (ja) | 半導体装置 | |
EP3761359B1 (en) | A lead frame assembly for a semiconductor device | |
JPH04280664A (ja) | 半導体装置用リードフレーム | |
EP0210371A1 (en) | Semiconductor device having a plurality of leads | |
JPS6120758Y2 (enrdf_load_html_response) | ||
JPH06338583A (ja) | 樹脂封止型半導体装置及びその製造方法 | |
JP4530863B2 (ja) | 樹脂封止型半導体装置 | |
JP2536431B2 (ja) | 半導体装置 | |
JP2528192B2 (ja) | 半導体装置 | |
CN114520203A (zh) | 用于半导体器件封装的接触夹 | |
KR0148078B1 (ko) | 연장된 리드를 갖는 리드 온 칩용 리드프레임 | |
JP2601228B2 (ja) | 樹脂封止型回路装置の製造方法 | |
JPH0666354B2 (ja) | 半導体装置 | |
JP4100483B2 (ja) | 複合半導体装置及びその製造方法 | |
JPH06507276A (ja) | リードフレームに接合された介在ダイ取付基板を有する集積回路パッケージ設計 | |
JP3072632B2 (ja) | 圧電発振器 | |
JPH0834281B2 (ja) | 半導体装置 | |
JP3036597B1 (ja) | 半導体装置用リードフレーム | |
KR20020024654A (ko) | 적층형 반도체 팩키지 유니트 및, 적층형 반도체 팩키지 | |
JP3015458B2 (ja) | リードフレームを用いた半導体装置の製造方法 | |
JP2561470Y2 (ja) | 絶縁封止電子部品 |