JPS61154002A - Chip resistor - Google Patents
Chip resistorInfo
- Publication number
- JPS61154002A JPS61154002A JP59276622A JP27662284A JPS61154002A JP S61154002 A JPS61154002 A JP S61154002A JP 59276622 A JP59276622 A JP 59276622A JP 27662284 A JP27662284 A JP 27662284A JP S61154002 A JPS61154002 A JP S61154002A
- Authority
- JP
- Japan
- Prior art keywords
- chip resistor
- resistor
- substrate
- resistors
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
（ａ）技術分野
この発明は、抵抗体を基板上に厚膜形成したチップ抵抗
器に関する。DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field The present invention relates to a chip resistor in which a resistor is formed as a thick film on a substrate.
（ｂ）従来技術
チップ抵抗器は、膜状の抵抗体に対して基板が厚く、実
装の際に幅や高さの面で以外に大きなスペースを必要と
するものである。また、基板上に複数の抵抗体を並列に
形成した従来の多連チップ抵抗器も、複数のチップ抵抗
器を並列に配置した場合に較べ実装の際に特にスペース
の節約になるという効果を期待することはできなかった
。(b) Prior Art A chip resistor has a thick substrate compared to a film-like resistor, and requires a large space in addition to width and height when mounted. In addition, the conventional multi-chip resistor, in which multiple resistors are formed in parallel on a board, is also expected to save space during mounting, compared to when multiple chip resistors are arranged in parallel. I couldn't.
（Ｃ）発明の目的
この発明は、このような事情に鑑みなされたものであっ
て、基板の表裏両面に交差状に抵抗体を形成することに
より、実装密度を高めることができるチップ抵抗器を提
供することを目的とする。(C) Purpose of the Invention The present invention was made in view of the above circumstances, and provides a chip resistor that can increase the packaging density by forming resistors in a crosswise manner on both the front and back surfaces of a substrate. The purpose is to provide.
（ｄ）発明の構成および効果
この発明のチップ抵抗器は、基板の表裏両面にそれぞれ
抵抗体を形成し、これらの抵抗体の互いに交差する方向
の両端にそれぞれ電極を形成したことを特徴とする。(d) Structure and Effects of the Invention The chip resistor of the present invention is characterized in that resistors are formed on both the front and back surfaces of a substrate, and electrodes are formed at both ends of these resistors in a direction that intersects with each other. .
この発明のチップ抵抗器を上記のように構成すると、従
来のチップ抵抗器１個分のスペースで２個の抵抗を実装
することができるので、製品の電子部品スペースを節約
し重量の軽減を図ることができる。また、この発明のチ
ップ抵抗器は、基板の表裏両面の抵抗体が交差するよう
に電極を形成しているので、実装配線パターンが交差す
るような場合に使用すれば、ジャンパー用チップの使用
を省略することができ、スペースおよび部品を節約する
ことができる。When the chip resistor of the present invention is configured as described above, two resistors can be mounted in the space of one conventional chip resistor, thereby saving space for the electronic components of the product and reducing weight. be able to. In addition, since the chip resistor of this invention has electrodes formed so that the resistors on both the front and back sides of the board intersect, the use of jumper chips can be avoided if used in cases where the mounted wiring patterns intersect. It can be omitted, saving space and parts.
（ｅ）実施例
第１図は、この発明の実施例であるチップ抵抗器の表側
から見た斜視図、第２図は、同チップ抵抗器の裏側から
見た斜視図、第３図は、同チップ抵抗器の電気回路図で
ある。(e) Embodiment FIG. 1 is a perspective view of a chip resistor according to an embodiment of the present invention as seen from the front side, FIG. 2 is a perspective view of the same chip resistor as seen from the back side, and FIG. It is an electric circuit diagram of the same chip resistor.
この実施例のチップ抵抗器１は、基板２の表裏両面に形
成した抵抗体３と電極４とで構成されている。基板２は
、矩形の板状に形成した絶縁性を有するアルミナ基板で
ある。抵抗体３は、抵抗体ペーストを基板２上にプリン
トし高温で焼成することにより形成される１０μｍ前後
程度の厚さの膜状であり、基板２の表面側の抵抗体３は
、矩形の長辺に沿って両側辺に間隔を開けて帯状に形成
され、基板２の裏面側の抵抗体３は、矩形の短辺に沿っ
て両側辺に間隔を開けて帯状に形成される、電極４は、
この基板２の表裏両面に形成された抵抗体３の両端部お
よびこれに繋がる基板２の側面にそれぞれ互いに接する
ことがないように形成される。なお、基板２上の抵抗体
３は、上方を絶縁性を有する保護コート５で覆われ保護
されている。The chip resistor 1 of this embodiment is composed of a resistor 3 and an electrode 4 formed on both the front and back surfaces of a substrate 2. The substrate 2 is an insulating alumina substrate formed into a rectangular plate shape. The resistor 3 is in the form of a film with a thickness of about 10 μm, which is formed by printing a resistor paste on the substrate 2 and baking it at high temperature. The resistors 3 on the back side of the substrate 2 are formed in a strip shape with spaces on both sides along the short sides of the rectangle. ,
Both end portions of the resistor 3 formed on both the front and back surfaces of the substrate 2 and the side surfaces of the substrate 2 connected thereto are formed so as not to touch each other. Note that the resistor 3 on the substrate 2 is protected by being covered above with a protective coat 5 having insulating properties.
上記のように構成されたこの実施例のチップ抵抗器１は
、従来のチップ抵抗器とほぼ同じ大きさのチップで、第
３図に示すように、２個の抵抗を実装できるので、配線
基板等に実装した際に従来に較べて２倍近い実装密度を
得ることができる。The chip resistor 1 of this embodiment configured as described above is a chip of approximately the same size as a conventional chip resistor, and as shown in FIG. etc., it is possible to obtain a packaging density nearly twice that of the conventional method.
このため、製品の電子部品スペースを節約し重量の軽減
を図ることができる。また、この実施例のチップ抵抗器
１は、２個の抵抗が、第３図に示すように、交差して配
置されているので、実装配線パターンが交差するような
場合に使用すれば、ジャンパー用チップの使用を省略す
ることができ、スペースおよび部品を節約することがで
きる。Therefore, it is possible to save space for the electronic components of the product and reduce the weight. In addition, in the chip resistor 1 of this embodiment, the two resistors are arranged to cross each other as shown in FIG. This eliminates the need for additional chips, saving space and parts.
第１図は、この発明の実施例であるチップ抵抗器の表側
から見た斜視図、第２図は、同チップ抵抗器の裏側から
見た斜視図、第３図は、同チップ抵抗器の電気回路図で
ある。
１−チップ抵抗器、２一基板、３−抵抗体、４−電極。Fig. 1 is a perspective view of a chip resistor according to an embodiment of the present invention as seen from the front side, Fig. 2 is a perspective view of the chip resistor as seen from the back side, and Fig. 3 is a perspective view of the chip resistor as seen from the back side. It is an electrical circuit diagram. 1 - chip resistor, 2 - substrate, 3 - resistor, 4 - electrode.
Claims (1)
らの抵抗体の互いに交差する方向の両端にそれぞれ電極
を形成したことを特徴とするチップ抵抗器。(1) A chip resistor characterized in that resistors are formed on both the front and back surfaces of a substrate, and electrodes are formed at both ends of these resistors in a direction that intersects with each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59276622A JPS61154002A (en) | 1984-12-26 | 1984-12-26 | Chip resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59276622A JPS61154002A (en) | 1984-12-26 | 1984-12-26 | Chip resistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61154002A true JPS61154002A (en) | 1986-07-12 |
Family
ID=17572001
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59276622A Pending JPS61154002A (en) | 1984-12-26 | 1984-12-26 | Chip resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61154002A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61203506U (en) * | 1985-06-10 | 1986-12-22 | ||
| JPH01300501A (en) * | 1988-05-28 | 1989-12-05 | Ibiden Co Ltd | Fixed resistor |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS523648U (en) * | 1975-06-24 | 1977-01-11 |
-
1984
- 1984-12-26 JP JP59276622A patent/JPS61154002A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS523648U (en) * | 1975-06-24 | 1977-01-11 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61203506U (en) * | 1985-06-10 | 1986-12-22 | ||
| JPH01300501A (en) * | 1988-05-28 | 1989-12-05 | Ibiden Co Ltd | Fixed resistor |
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