JPS5851594A - Thick film hybrid ic board - Google Patents
Thick film hybrid ic boardInfo
- Publication number
- JPS5851594A JPS5851594A JP15040981A JP15040981A JPS5851594A JP S5851594 A JPS5851594 A JP S5851594A JP 15040981 A JP15040981 A JP 15040981A JP 15040981 A JP15040981 A JP 15040981A JP S5851594 A JPS5851594 A JP S5851594A
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- thick film
- insulating layer
- film hybrid
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明は、部品実装導体部にはんだ流れ防止用絶縁層を
ダム状に設けた厚膜混成ＩＣ基板に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a thick film hybrid IC board in which an insulating layer for preventing solder flow is provided in a dam shape on a component mounting conductor portion.
厚膜混成ＩＣ基板はアルミナセラミダク基板上に導体・
抵抗体および絶縁層等を印刷・焼成して回路を形成する
。このような厚膜混成ＩＣ基板を高周波領域で使用する
Ｋは導体面積を大きくすると同時に導体上の絶縁層面積
を可能な限シ小さくすることが必要である。一方、一般
の厚膜混成ＩＣ基板に形成される絶縁層の用途としては
、抵抗体の保護膜および部品はんだ付は時のはんだ流れ
防止用レジストがある。この後者の用途の場合、通常、
絶縁層は、導体上のはんだ付は以外の領域すべてに形成
する為、１０Ｍ以上の高周波特性が必要な場合、絶縁層
の容量が問題となり、特性上不都合を生じることが多い
。また、高周波特性を向上させる為に１絶縁層を導体上
に形成しない場合は、はんだが導体上を流れて拡が９、
結果的には部品と基板間のはんだ量が不足し、接続が不
完全な状態となる。Thick film hybrid IC substrates have conductors and
A circuit is formed by printing and firing resistors, insulating layers, etc. When such a thick film hybrid IC substrate is used in a high frequency range, it is necessary to increase the area of the conductor and at the same time reduce the area of the insulating layer on the conductor as much as possible. On the other hand, the insulating layer formed on a general thick film hybrid IC substrate is used as a protective film for a resistor and as a resist for preventing solder flow during soldering of components. For this latter application, typically
Since the insulating layer is formed on all areas other than the soldering area on the conductor, when high frequency characteristics of 10M or more are required, the capacitance of the insulating layer becomes a problem, which often causes problems in terms of characteristics. In addition, if an insulating layer is not formed on the conductor in order to improve high frequency characteristics, the solder may flow on the conductor and spread.
As a result, the amount of solder between the component and the board becomes insufficient, resulting in an incomplete connection.
本発明の目的は、上述の欠点を除去した高周波用厚膜混
成ＩＣ基板を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a high-frequency thick-film hybrid IC substrate that eliminates the above-mentioned drawbacks.
本発明の厚膜混成ＩＣ基板は、その部品半田付は導体上
にダム状絶縁層を設けることを特徴とすの部品はんだ付
は時の一例を示す平面図および断面図である。第１図は
アルミナセラミック基板ｌ上に形成した導体２にチップ
コンデンサ３をはんだ４を用いてはんだ付けしたもので
あるが、はんだの流れ止めがない為、はんだ４は加熱に
よりて導体２上を濡れ拡がり、チップコンデンサ３を被
う形にならず、はんだ量不足をきえし接続が不完全にな
ることがある。第２図は、導体２のはんだ付は部以外の
領域すべてに絶縁層５を形成した導体２にチップコンデ
ンサ３をはんだ４を用いてはんだ付けしたものであるが
、１０Ｍ以上の高周波で使用すると絶縁層の容量が問題
とな）、特性に重大な支障をきたす可能性がある。The thick film hybrid IC board of the present invention is characterized in that a dam-shaped insulating layer is provided on the conductor for soldering of the components. In Figure 1, a chip capacitor 3 is soldered to a conductor 2 formed on an alumina ceramic substrate l using solder 4, but since there is no stopper for the solder to flow, the solder 4 is heated and soldered onto the conductor 2. The solder may spread and become unable to cover the chip capacitor 3, resulting in an insufficient amount of solder and an incomplete connection. In Fig. 2, a chip capacitor 3 is soldered using solder 4 to the conductor 2, which has an insulating layer 5 formed on the entire area other than the conductor 2, but when used at a high frequency of 10M or higher, (The capacitance of the insulating layer is a problem), which may seriously impede the characteristics.
＃Ｉ３図は本発明の構造の厚膜混成ＩＣ基板の部品はん
だ付妙時の一実施例を示す平面図でおる。Figure #I3 is a plan view showing an embodiment of soldering of components of a thick film hybrid IC board having the structure of the present invention.
ダム状絶縁層を形成する以前ははんだ付は不良は２５チ
もあったが、第３図に示すように、Ａｇ−Ｐｄ導体上に
チップコンデンサの端面より３００ｐｍ離して、幅２０
Ｇ、ａｍ、長さ平均１ｍｍ、厚さ５μｍ程度のダム状絶
縁層を印刷・焼成によ）形成することによりて、はんだ
の拡がシが抑制され、チップコンデンサの電極部をはん
だ４で被う形になシ、はんだ付は不良がはとんどなくな
った。さらに、大面積を有する導体上の絶縁層面積が小
さく １００Ｍ以上の高周波で使用しても特性に全く影
響を与えなか−）友。Before forming the dam-shaped insulating layer, there were 25 soldering failures, but as shown in Figure 3, soldering was performed on the Ag-Pd conductor at a distance of 300 pm from the end face of the chip capacitor, with a width of 20 cm.
By printing and baking a dam-shaped insulating layer with an average length of 1 mm and a thickness of about 5 μm, the spread of solder is suppressed and the electrodes of the chip capacitor are covered with solder 4. Due to the curved shape, there are almost no defects in soldering. Furthermore, the area of the insulating layer on the large-area conductor is small, so even if it is used at high frequencies of 100M or more, the characteristics will not be affected at all.
以王述ぺ喪様に本発明によれば、従来構造と比較して厚
膜混成として接続品質が向上するばかりでなく、混成Ｉ
Ｃのメリｗ）の一つでもある高周波領域での使用限界を
伸はすという優れた特性を有しているといえる。In other words, according to the present invention, not only the connection quality is improved as compared to the conventional structure due to the thick film hybrid structure, but also the connection quality is improved due to the hybrid structure.
It can be said that it has an excellent property of extending the limit of use in the high frequency range, which is one of the advantages of C.
んだ付は時の一実施例を示す平面図および断面図である
。1 is a plan view and a sectional view showing an example of soldering.
ｌ・・・・・・アルミナセラミック基板、２・・・・・
・導体、３・・・・・・チップコンデンサ、４・・・・
・・はんだ、５・・・・・・絶縁層。l...Alumina ceramic substrate, 2...
・Conductor, 3... Chip capacitor, 4...
...Solder, 5...Insulating layer.
什理人 尋硼＋ 内 Ｍ 畳θ￥”！’！： ％
第１図
（ｂ）
第２図
（１）） 人塼硼＋内M tatami θ￥"!'!: %
Figure 1 (b) Figure 2 (1))
Claims (1)
がシをさえぎるダム状絶縁層を設けると七を特徴とする
厚膜混成ＩＣ基板。7. A thick film hybrid IC board characterized in that a dam-shaped insulating layer is provided on the conductor to which components are soldered, to prevent the spread of solder onto the conductor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15040981A JPS5851594A (en) | 1981-09-22 | 1981-09-22 | Thick film hybrid ic board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15040981A JPS5851594A (en) | 1981-09-22 | 1981-09-22 | Thick film hybrid ic board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5851594A true JPS5851594A (en) | 1983-03-26 |
Family
ID=15496320
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15040981A Pending JPS5851594A (en) | 1981-09-22 | 1981-09-22 | Thick film hybrid ic board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5851594A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0194564U (en) * | 1987-12-15 | 1989-06-22 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS494156B1 (en) * | 1968-02-29 | 1974-01-30 |
-
1981
- 1981-09-22 JP JP15040981A patent/JPS5851594A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS494156B1 (en) * | 1968-02-29 | 1974-01-30 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0194564U (en) * | 1987-12-15 | 1989-06-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US3851223A (en) | Microcircuit board | |
| CA2412030C (en) | Perimeter anchored thick film pad | |
| JPS5851594A (en) | Thick film hybrid ic board | |
| JP2545602Y2 (en) | Jumper chip | |
| JPS62132396A (en) | Mounting of chip parts | |
| JPH08222478A (en) | Chip-type electronic part | |
| JPH03252193A (en) | Wiring board | |
| JPH11163510A (en) | Mounting structure for electronic component | |
| JPH0638441Y2 (en) | Mounting structure of surface mounting hybrid IC | |
| JPH0125491Y2 (en) | ||
| JPS5951589A (en) | Printed board | |
| JP2528436B2 (en) | Manufacturing method of circuit board device | |
| JPS62252188A (en) | Thick film hybrid circuit board | |
| JPS61242095A (en) | Manufacture of printed wiring circuit board | |
| JPS6181698A (en) | Wiring circuit device | |
| JPS61154002A (en) | Chip resistor | |
| JPH08316591A (en) | Printed board | |
| JPS62193294A (en) | High density mounting board | |
| JPS6343391A (en) | Thick film circuit board | |
| JPH04348098A (en) | Circuit board | |
| JPH09135070A (en) | Printed-board | |
| JPH11330693A (en) | Thick film multilayer ceramic board, its manufacture, and mounting structure of electronic component thereon | |
| JPH0670277U (en) | Printed circuit board solder bridge prevention structure | |
| JPS62213195A (en) | Formation of conductor pattern | |
| JPH1050506A (en) | Multiple electronic component |