JPH0638441Y2 - Mounting structure of surface mounting hybrid IC - Google Patents

Description

[Detailed Description of the Invention] (a) Field of Industrial Application The present invention relates to a mounting structure of a surface mount type hybrid IC.

(B) Conventional technology Conventionally, with miniaturization of capacitors, diodes, ICs and other electronic components mounted on the substrate of hybrid ICs such as alumina ceramics and glass cloth-based epoxy resin, the hybrid ICs themselves have become smaller and more expensive. It is also required for densification. In order to achieve this high density, a planar mounting form disclosed in, for example, Japanese Utility Model Laid-Open No. 57-10760 is known as a mounting form in which the height direction is increased.

In the conventional surface mount type hybrid IC, the third
As shown in FIGS. 4 and 5, a plurality of notched through holes are formed in the outer peripheral edge of the hybrid substrate, and the wiring of the electronic component mounted on the surface of the substrate is extended in each of the through holes, and the back surface of the substrate is provided. Was directly arranged on the surface of the main board, and then the wiring of the hybrid IC and the connection land of the main board were connected by solder at the through hole.

(C) Problems to be solved by the invention In the conventional surface mount hybrid ICs described above, the through holes are used to connect to the main board. However, there was a problem that sufficient density could not be achieved because electronic components could only be mounted.

For example, FIGS. 1 and 2 of Japanese Utility Model Application Laid-Open No. 59-20645 disclose that a plurality of electronic components are densely mounted on both front and back surfaces of a hybrid IC substrate. Since a plurality of external lead-outs are provided below the peripheral edge of the board and the leads are mounted on another circuit board such as a main board, an unnecessary gap is formed between the board and the circuit board. On the other hand, in the case of automatic mounting, since the leads are inserted into the mounting holes of the main board, the more leads are mounted, the more difficult it is to mount due to problems such as bending of the leads. Therefore, planar mounting is becoming mainstream now.

However, in the above-mentioned conventional hybrid IC for surface mounting, since the substrate of the hybrid IC is directly mounted on the circuit board by using the through hole, other electronic parts are mounted between the circuit board and the board. There was a problem that we could not secure the space that we could do.

In addition, even if electronic components are appropriately embedded on the back surface of the board to mount it on the back surface, the space between the circuit board and the board is extremely small or in contact with each other. There has been a problem that moisture enters between the circuit boards due to dew condensation or the like to cause backside wiring and electronic components to be shorted, corroded, oxidized, or the like, resulting in a defective product.

An object of the present invention is to solve the above-mentioned problems and provide a mounting structure of a surface mounting hybrid IC which can achieve high density by mounting electronic components on both front and back surfaces of the hybrid IC substrate.

(D) Means for Solving the Problems In order to solve the above problems, the present invention provides an insulating substrate on which a plurality of electronic components are mounted, electrodes on the side edges of the insulating substrate, and the electrodes are the main A mounting structure of a surface mounting hybrid IC connected to a first conductor pattern on a substrate,
Second conductor patterns are formed on both the front and back surfaces of the insulating substrate, and electronic components are mounted on the second conductor patterns on the front and rear surfaces, respectively, and at least the electronic components and the second conductor pattern on the back surface of the insulating substrate are formed. An electrode connected to the second conductor pattern while being covered with an insulating protective film is formed in a film form on at least the back surface of the insulating substrate, and the sum of the thickness H of the back electrode and the thickness h of the first conductor pattern is the insulating substrate. The thickness S formed by the back surface of the above and the surface of the insulating protective film is not less than S.

(E) Operation and effects According to the mounting structure of the hybrid IC for surface mounting of the present invention, the second conductor pattern, which is an electrode, is film-formed on at least the back surface of the insulating substrate, and the second conductor pattern formed on this back surface. Thickness H of the first conductor pattern and the thickness h of the first conductor pattern formed by the back surface of the insulating substrate and the front surface of the insulating protective film.
Because of the above, a space for mounting electronic components can be secured between the main board and the back surface of the insulating board.

In addition, since the electronic component and the second conductor pattern to be mounted on the back surface are covered with an insulating protective film, it can be used for a long time or in a humid atmosphere, for example, between the back surface of the insulating substrate and the main substrate. Even if moisture condenses, it is possible to avoid the possibility that the second conductor pattern on the back surface or the electronic component is shorted.

(F) Embodiments <First Embodiment> A first embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

FIG. 1 is a central longitudinal sectional view of the hybrid IC according to this embodiment, and FIG. 2 is an external perspective view of the hybrid IC.

Reference numeral 2 is a rectangular insulating substrate made of alumina ceramic. A second conductor pattern (not shown) is formed on both surfaces 2a and 2b of the insulating substrate 2 by printing. On the surface 2a of the insulating substrate 2, chip-shaped electronic components
3a, 3b, 3c, etc. are mounted. On the other hand, the back surface 2b of the insulating substrate 2
The print resistors 3d and 3e are formed on. The printed resistors 3d and 3e are formed as electronic components on the back surface 2b of the insulating substrate 2 if the usual chip components are mounted, and when mounted on the main substrate 7, the back electrode 4a thickness H of the electrode 4 is set. And the thickness of the pad 8 of the first conductor pattern on the main substrate 7 become smaller than the thickness S formed by the back surface 2b of the insulating substrate 2 and the insulating protective film, and the pad 8 and the back surface electrode 4a are soldered. Because it will be difficult.

Electrodes 4 are arranged in a line on the side edge portion 2c of the insulating substrate 2.
Each electrode 4 has a double structure including a palladium-silver-based thick film on the inner side and a solder plating film on the outer side.
The conductor pattern is connected. 2d shown in FIG.
Is a notch for indicating a direction.

A mold layer (insulating protective film) 5 is formed on the surface 2a of the insulating substrate 2 by dipping, and the second conductor pattern on the surface 2a of the insulating substrate 2 and the electronic components 3a, 3b, 3c, etc. are covered. The surface 5a of the mold layer 5 is flat and facilitates chucking by an automatic mounting machine.

On the other hand, on the back surface 2b of the insulating substrate 2, a glass layer (insulating protective film) 6 is formed by glass passivation, and the second conductor pattern on the back surface 2b of the insulating substrate 2 and the printing resistors 3d and 3e are covered. This is for insulating the second conductor pattern on the back surface 2b of the insulating substrate 2 from the first conductor pattern on the main substrate 7.

The mounting of the hybrid IC of this embodiment on the main substrate 7 will be described. Pads 8 are formed on the main substrate 7 at appropriate positions on the second conductor pattern corresponding to the back surface electrodes 4a of the hybrid IC 1. (Refer to FIG. 1) The hybrid IC1 is installed by an automatic mounting machine (not shown).
It is mounted on the main board 7. At this time, the back surface electrode 4a is in contact with each pad 8. And the back surface electrode 4a and the pad 8 are
Soldered by reflow, the hybrid IC 1 is connected to the circuit on the main board 7.

<Second Embodiment> A second embodiment of the present invention will be described below with reference to FIGS. 3 and 4.

FIG. 3 is a central longitudinal sectional view of the hybrid IC 11 of this embodiment, and FIG. 4 is an external perspective view of the hybrid IC 11.

Reference numeral 12 is an insulating substrate made of alumina ceramic. On the front surface 12a and the back surface 12b of the insulating substrate 12, a second
Each conductor pattern is formed by printing.

On the surface 12a of the insulating substrate 12, electronic components 13a, 13b, 13c, 13
d etc. are implemented. However, no electronic component is mounted on the central portion of the surface 12a. On the other hand, printed resistors 13e and 13f are formed on the back surface 12b of the insulating substrate 12. Side edge 12 of insulating substrate 12
The electrode 14 similar to that of the first embodiment is provided on the insulating substrate 12 at c.
The front and back sides are lined up. 14a is a back surface electrode. Further, 12d is a notch for indicating a direction.

A mold layer 15 is formed on the surface 12a of the insulating substrate 12,
The second conductor pattern and the electronic components 13a, 13b, 13c, 13d are covered. Since no electronic component is mounted on the central portion of the surface 12a of the insulating substrate 12, the central portion of the mold layer 15 is a flat chucking area 15a. On the other hand, the back surface 12b of the insulating substrate 12 is covered with the glass layer 16 as in the first embodiment.

The hybrid IC 11 of this embodiment has a chucking area 15
a is chucked and mounted on the main board. The other points are exactly the same as in the first embodiment.

[Brief description of drawings]

FIG. 1 is a hybrid IC according to a first embodiment of the present invention.
2 is an external perspective view of the hybrid IC, FIG. 3 is a central vertical cross-sectional view of the hybrid IC according to the first embodiment of the present invention, and FIG. 4 is a perspective view of the hybrid IC. FIG. 3 is an external perspective view of the same thermal head. 1.11: Hybrid IC, 2.12: Insulating substrate, 3a, 3b, 3c, 13a, 13b, 13c, 13d: Electronic parts, 3d, 3e, 13e, 13f: Printing resistor, 4.14: Electrode, 6. 16: Glass layer, H: Electrode thickness h: Thickness of the first conductor pattern S: Thickness formed by the back surface of the insulating substrate, the insulating protective film and the front surface.

Claims (1)

[Scope of utility model registration request] 1. An insulating substrate on which a plurality of electronic components are mounted,
This is a mounting structure of a surface mounting hybrid IC in which an electrode is provided on a side edge portion of the insulating substrate and the electrode is connected to a first conductor pattern on a main substrate. While forming a conductor pattern, an electronic component is mounted on each of the second conductor patterns on both front and back surfaces, and at least the electronic component and the second conductor pattern on the back surface of the insulating substrate are covered with an insulating protective film, while the second conductor is formed. An electrode connected to the pattern is formed in a film shape on at least the back surface of the insulating substrate, and the sum of the thickness H of the back electrode and the thickness h of the first conductor pattern is the thickness formed by the back surface of the insulating substrate and the surface of the insulating protective film. Surface mounting hybrid IC mounting structure characterized by S or more.