JPH0723924Y2 - Multiple chip resistors - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a multiple chip resistor having a plurality of resistive films formed on an upper surface of a rectangular insulating substrate.

(Prior Art) Conventionally, this type of multiple chip resistor is configured, for example, as shown in FIG. This multi-chip resistor 20
Is formed by arranging a plurality of resistance films 22 side by side on the upper surface of a rectangular insulating substrate 21 made of alumina or the like, and the terminal electrodes connected to the resistive film 22 at opposite positions of opposite end edges of the insulating substrate 21. 23 and 24 are formed respectively.

Although not shown, the terminal electrodes 23 and 24 are also formed continuously on the side surface and the lower surface of the insulating substrate 21, respectively. Although not shown, a protective film made of a glaze material is provided on the upper surface of the insulating substrate 21 so as to cover the resistance film 22. It should be noted that recessed grooves 25 and 26 are formed between the terminal electrodes 22 and 23 and 24 and 24 which are adjacent to each other on opposite ends of the insulating substrate 21, and the terminal electrodes 23 and 24 are soldered to the wiring pattern of the wiring board. In this case, the adjacent terminal electrodes are prevented from being short-circuited with solder.

(Problems to be Solved by the Invention) In the multiple chip resistor 20 configured as described above, the pitch between the adjacent terminal electrodes 23, 23 and 24, 24 is increased in order to further reduce the size thereof. , Usually, it is close to or narrower than the terminal pitch of a semiconductor IC. Further, the wiring board on which the semiconductor IC is mounted has a wiring pattern formed at least in the vicinity of the position where the semiconductor IC is mounted in conformity with the terminal pitch. Therefore, if the above-mentioned multiple chip resistor 20 is attached to the wiring board in the vicinity of the semiconductor IC, and further the wiring patterns for connecting the terminal electrodes 23 and 24 at both end edges are all stretched in the same direction to form, for example, the tenth As shown in the figure, even if the terminal electrode 23 side on one edge side of the multiple chip resistor 20 can be formed by straightening the wiring pattern 27 as it is, the terminal electrode 24 side on the other edge side is a terminal. Since there is no extra space between the wiring patterns 27 on the electrode 23 side, the wiring pattern 28 needs to be detoured once and stretched.

However, when the wiring pattern is detoured and stretched in this way, there is a problem that the wiring pattern design becomes complicated and an extra resistance component is formed in the wiring pattern.

The present invention has been made in view of such a problem, and provides a multiple chip resistor that facilitates the wiring pattern design of a wiring board and does not form an extra resistance component in the wiring pattern. It is intended to be provided.

(Means for Solving the Problem) In order to achieve such an object, in the multiple chip resistor of the present invention, the pitch of the terminal electrodes on one edge side of the insulating substrate is set at one end of the insulating substrate. The wiring pattern pitch is set to be approximately equal to the wiring pattern pitch of the wiring board, and is set to a value approximately twice the wiring pattern pitch in other portions, and the pitch of the terminal electrodes on the other edge side of the insulating substrate is set to the other end portion of the insulating substrate. Is approximately equal to the wiring pattern pitch, and is approximately twice as large as the wiring pattern in the other parts, so that the terminal electrodes at both ends of the insulating substrate are at positions facing each other at one end and the other end. It is characterized by having done.

(Operation) With the above-described configuration, the terminal electrodes on both edges are located between the adjacent terminal electrodes on the opposite sides except the both ends of the insulating substrate. Therefore, the wiring pattern for connecting the terminal electrodes on the other edge side can be extended and formed between the adjacent wiring patterns for connecting the terminal electrodes on the one edge side.

As a result, the wiring pattern for connecting the terminal electrodes at the opposite end edges of the multiple chip resistor is formed without detouring as in the conventional case even when they are all formed in the same direction. You will be able to.

Embodiment An embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a plan view of a multiple chip resistor according to an embodiment of the present invention, and FIG. 2 is a sectional side view thereof. In these figures, a multiple chip resistor 1 includes a plurality of resistive films 3 formed on an upper surface of a rectangular insulating substrate 2 made of alumina or the like, and connected to the resistive films 3 so as to face the insulating substrate 2. It is composed of a plurality of terminal electrodes 4 and 5 respectively formed on both edges.

These terminal electrodes 4 and 5 are formed by printing an electrode paste of Ag, Ag-Pd, Cu or the like and firing it. The pitch P1 between the adjacent terminal electrodes 4, 4 on the one edge side of the one end portion of the insulating substrate 2 is substantially equal to the wiring pattern pitch formed on the wiring substrate on which the multiple chip resistor 1 is mounted. The pitch P2 between the adjacent terminal electrodes 4, 4 in the other portions is set to a value approximately twice the pitch of the wiring pattern. Also, the insulating substrate 2
Adjacent terminal electrodes 5 on the other end side of the other end portion of
The pitch P3 between 5 is set to a value substantially equal to the wiring pattern pitch, as in the one edge side of the one end portion,
Pitch P between adjacent terminal electrodes 5, 5 in other parts
4 is set to a value approximately twice the pitch of the wiring pattern, like the one edge side. In addition, at one end and the other end of the insulating substrate 2, the terminal electrodes 4,5
Are formed so as to face each other.
That is, except for both end portions of the insulating substrate 2, the terminal electrode 4 on one edge side is adjacent to the terminal electrodes 5, 5 on the other edge side.
The terminal electrode 5 on the other end side is located between the adjacent terminal electrodes 4, 4 on the one end side.

Each of the terminal electrodes 4 and 5 is continuously formed on the side surface and the lower surface of the insulating substrate 2, and the tip portion on the upper surface side is T-shaped at one end portion and the other end portion of the insulating substrate 2, and the other portions are L-shaped terminal electrodes that are paired with each other
The shape is such that 4,5 are facing each other. The resistance film 3 is formed, for example, by printing a cermet resistance paste such as ruthenium oxide over the tip portions of the terminal electrodes 4 and 5 and firing it. Recessed grooves 6 and 7 are formed on both sides of the terminal electrodes 4 and 5 at both edges of the insulating substrate 2. Further, although not shown, a protective film made of a glaze material or the like is formed on the upper surface of the insulating substrate 2 so as to cover the resistive film 3.

The dimension W between the opposite edges of the insulating substrate 2 is determined by the pitch P2, P4 between the terminal electrodes 4 and 5 in relation to the mounting on the wiring substrate.
It is desirable to match the above.

In the multiple chip resistor 1 configured as described above, the terminal electrodes on the respective edge sides except the both end portions are located between the adjacent terminal electrodes on the opposite edge sides, and a pair of terminal electrodes is formed. The pitch between 4 and 5 has a value substantially equal to the wiring pattern pitch for mounting the multiple chip resistors.
Therefore, for example, when the wiring patterns 8 and 9 for connecting the terminal electrodes 4 and 5 are extended in the same direction as shown in FIG. 3, the terminal electrodes 4 on one edge side are excluded except for both end portions. Between adjacent wiring patterns 8 and 8 connecting
It becomes possible to form the wiring pattern 9 for connecting the terminal electrode 5 on the other edge side. That is, the pitch between the wiring patterns 8 and 9 in this case is approximately equal to the wiring pattern pitch for mounting the semiconductor IC. The wiring patterns 8 and 9 shown in FIG. 3 are all formed so as to extend in the same direction. For example, as shown in FIG. 4, the wiring patterns 8 and 9 extend in opposite directions. When it is formed, another wiring pattern 10 can be formed between the adjacent wiring patterns 8 and 8 and between the adjacent wiring patterns 9 and 9, and the wiring pattern density of the wiring board can be increased.

The multiple chip resistor of the present invention is not limited to the one in the above-described embodiment, but may have a structure as shown in FIGS. 5 to 7, for example.

In the multiple chip resistor 11 shown in FIG. 5, the tip portions of the terminal electrodes 4 and 5 are formed in such a shape as to extend in the opposite edge directions, and the resistance film 3 is formed across the tip portions. It is a thing.

In the multiple chip resistor 12 shown in FIG. 6, the common electrode 13 is formed across the terminal electrodes 4 and 5 at both ends in the central longitudinal direction of the upper surface of the insulating substrate 2, and the resistance film 3 is connected to the terminal electrodes 4 and 4. It is formed over 5 and the common electrode 13.

The multiple chip resistor 14 shown in FIG. 7 has a structure in which an H-shaped common electrode 15 is formed on the upper surface of the insulating substrate 2 by short-circuiting the terminal electrodes 4 and 5 facing each other at both ends and traversing the central longitudinal direction. The film 3 is formed so as to straddle the terminal electrodes 4, 5 and the common electrode 15. In the case of the multiple chip resistor 14 having the structure shown in FIG. 7, the wiring pattern of the wiring board may be as shown in FIG. 8, for example.

Furthermore, there are various other modes of connection between the resistance film 3 and the terminal electrodes 4 and 5, and the multiple chip resistor of the present invention includes all of them.

Further, the concave grooves 6 and 7 on both sides of the terminal electrodes 4 and 5 of the insulating substrate 2 in the above embodiment are not always necessary. On the contrary, the terminal electrodes 4 and 5 may be formed in a concave shape.

(Effect of the Invention) As is apparent from the above description, according to the present invention,
The pitch of the terminal electrodes on one edge side of the insulating substrate is set to a value approximately equal to the wiring pattern pitch of the wiring substrate at one end portion of the insulating substrate, and is set to a value approximately twice the wiring pattern pitch in the other portions. The pitch of the terminal electrodes on the other edge side of the insulating substrate is set to a value substantially equal to the wiring pattern pitch at the other end portion of the insulating substrate,
In other portions, the wiring pattern pitch is set to a value approximately twice, and the terminal electrodes at both end edges are arranged to face each other at one end portion and the other end portion of the insulating substrate. The wiring becomes easy, the area is small, and the length of the pattern becomes short, the wiring pattern design of the wiring board becomes easy, and no extra resistance is formed in the wiring pattern. Furthermore, since the pitch of the terminal electrodes on one edge side and the other edge side of the insulating substrate is approximately half the pitch of the other terminal electrode at one end of the insulating substrate, the length in the pitch direction of the insulating substrate Therefore, the cost of the insulating substrate and the area occupied by the circuit board can be reduced.

[Brief description of drawings]

FIG. 1 is a plan view of a multiple chip resistor according to an embodiment of the present invention, FIG. 2 is a sectional side view thereof, and FIGS. 3, 4 and 8 are multiple chip resistors according to the present invention. 5 to 7 are plan views of a multiple chip type resistor according to another embodiment of the present invention. FIG. 9 is a plan view of a conventional multiple chip resistor, and FIG. 10 is a wiring pattern diagram of a wiring board on which the multiple chip resistor is mounted. 1,11,12,14 ... Multiple chip type resistors, 2 ... Insulating substrate, 3 ...
Resistive films, 4,5 ... terminal electrodes, 6,7 ... concave grooves, 8,9,10 ... wiring patterns, 13,15 ... common electrodes.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Shigeki Higashi Creator, Shigeki Higashi 2-26-10 Tenjin, Nagaokakyo-shi, Kyoto, Murata Manufacturing Co., Ltd. (56) References: Kaihei 2-92905 (JP, U)

Claims (1)

[Scope of utility model registration request] 1. A multi-row structure in which a plurality of resistance films are formed on an upper surface of a rectangular insulating substrate, and a plurality of terminal electrodes connected to the resistance films are formed on opposite end edges of the insulating substrate, respectively. In the case of a chip resistor, the terminal electrode on one edge side of the insulating substrate has a pitch that is approximately equal to the wiring pattern pitch of the wiring substrate to which this multiple chip resistor is attached at one end of the insulating substrate. In addition, the value of the wiring pattern pitch is set to a value approximately twice the wiring pattern pitch in other portions, and the pitch of the terminal electrodes on the other edge side of the insulating substrate is set to the wiring pattern pitch in the other end portion of the insulating substrate. The values are set to be substantially equal to each other, and are set to values approximately twice the wiring pattern pitch in the other portions, and end portions of opposite end edges of one end portion and the other end portion of the insulating substrate A multiple chip resistor, in which the child electrodes are arranged so as to face each other.