JPS61145839A - 半導体ウエ−ハの接着方法および接着治具 - Google Patents

半導体ウエ−ハの接着方法および接着治具

Info

Publication number
JPS61145839A
JPS61145839A JP26881384A JP26881384A JPS61145839A JP S61145839 A JPS61145839 A JP S61145839A JP 26881384 A JP26881384 A JP 26881384A JP 26881384 A JP26881384 A JP 26881384A JP S61145839 A JPS61145839 A JP S61145839A
Authority
JP
Japan
Prior art keywords
wafer
semiconductor wafer
jig
bonding
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP26881384A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0560250B2 (enrdf_load_stackoverflow
Inventor
Masaru Shinpo
新保　優
Kiyoshi Fukuda
潔 福田
Kazuyoshi Furukawa
和由 古川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP26881384A priority Critical patent/JPS61145839A/ja
Publication of JPS61145839A publication Critical patent/JPS61145839A/ja
Publication of JPH0560250B2 publication Critical patent/JPH0560250B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
JP26881384A 1984-12-20 1984-12-20 半導体ウエ−ハの接着方法および接着治具 Granted JPS61145839A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26881384A JPS61145839A (ja) 1984-12-20 1984-12-20 半導体ウエ−ハの接着方法および接着治具

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26881384A JPS61145839A (ja) 1984-12-20 1984-12-20 半導体ウエ−ハの接着方法および接着治具

Publications (2)

Publication Number Publication Date
JPS61145839A true JPS61145839A (ja) 1986-07-03
JPH0560250B2 JPH0560250B2 (enrdf_load_stackoverflow) 1993-09-01

Family

ID=17463609

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26881384A Granted JPS61145839A (ja) 1984-12-20 1984-12-20 半導体ウエ−ハの接着方法および接着治具

Country Status (1)

Country Link
JP (1) JPS61145839A (enrdf_load_stackoverflow)

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6271215A (ja) * 1985-09-25 1987-04-01 Toshiba Corp ウエハ接合装置
JPH01133341A (ja) * 1987-11-19 1989-05-25 Hitachi Ltd 半導体基板の製造方法及び半導体装置の製造方法
JPH01169917A (ja) * 1987-12-24 1989-07-05 Fujitsu Ltd ウェーハの接着方法
JPH023266A (ja) * 1987-12-28 1990-01-08 Motorola Inc 導電性再結合層を有するバイポーラ半導体デバイス
KR20030052986A (ko) * 2001-12-21 2003-06-27 에섹 트레이딩 에스에이 반도체 칩을 장착하기 위한 픽업 툴
FR2860178A1 (fr) * 2003-09-30 2005-04-01 Commissariat Energie Atomique Procede de separation de plaques collees entre elles pour constituer une structure empilee.
KR100499317B1 (ko) * 2001-03-21 2005-07-04 캐논 가부시끼가이샤 반도체장치
US7153759B2 (en) 2004-04-20 2006-12-26 Agency For Science Technology And Research Method of fabricating microelectromechanical system structures
US7192841B2 (en) 2002-04-30 2007-03-20 Agency For Science, Technology And Research Method of wafer/substrate bonding
US7259466B2 (en) 2002-12-17 2007-08-21 Finisar Corporation Low temperature bonding of multilayer substrates
US7361593B2 (en) 2002-12-17 2008-04-22 Finisar Corporation Methods of forming vias in multilayer substrates
WO2010055730A1 (ja) * 2008-11-14 2010-05-20 東京エレクトロン株式会社 貼り合わせ装置及び貼り合わせ方法
US7927975B2 (en) 2009-02-04 2011-04-19 Micron Technology, Inc. Semiconductor material manufacture
US7958628B2 (en) 2003-12-31 2011-06-14 Stats Chippac, Ltd. Bonding tool for mounting semiconductor chips
JP5136411B2 (ja) * 2006-06-29 2013-02-06 株式会社ニコン ウェハ接合装置
WO2014156987A1 (ja) 2013-03-26 2014-10-02 芝浦メカトロニクス株式会社 貼合装置および貼合基板の製造方法
WO2015046243A1 (ja) 2013-09-25 2015-04-02 芝浦メカトロニクス株式会社 吸着ステージ、貼合装置、および貼合基板の製造方法
CN110168711A (zh) * 2017-09-21 2019-08-23 Ev 集团 E·索尔纳有限责任公司 接合基板的装置和方法

Cited By (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6271215A (ja) * 1985-09-25 1987-04-01 Toshiba Corp ウエハ接合装置
JPH01133341A (ja) * 1987-11-19 1989-05-25 Hitachi Ltd 半導体基板の製造方法及び半導体装置の製造方法
JPH01169917A (ja) * 1987-12-24 1989-07-05 Fujitsu Ltd ウェーハの接着方法
JPH023266A (ja) * 1987-12-28 1990-01-08 Motorola Inc 導電性再結合層を有するバイポーラ半導体デバイス
KR100499317B1 (ko) * 2001-03-21 2005-07-04 캐논 가부시끼가이샤 반도체장치
KR20030052986A (ko) * 2001-12-21 2003-06-27 에섹 트레이딩 에스에이 반도체 칩을 장착하기 위한 픽업 툴
US7192841B2 (en) 2002-04-30 2007-03-20 Agency For Science, Technology And Research Method of wafer/substrate bonding
US7259466B2 (en) 2002-12-17 2007-08-21 Finisar Corporation Low temperature bonding of multilayer substrates
US7361593B2 (en) 2002-12-17 2008-04-22 Finisar Corporation Methods of forming vias in multilayer substrates
FR2860178A1 (fr) * 2003-09-30 2005-04-01 Commissariat Energie Atomique Procede de separation de plaques collees entre elles pour constituer une structure empilee.
EP1520669A1 (fr) * 2003-09-30 2005-04-06 Commissariat A L'energie Atomique Procédé de séparation de plaques collées entre elles pour constituer une structure empilée
US7958628B2 (en) 2003-12-31 2011-06-14 Stats Chippac, Ltd. Bonding tool for mounting semiconductor chips
US7405466B2 (en) 2004-04-20 2008-07-29 Agency For Science, Technology And Research Method of fabricating microelectromechanical system structures
US7153759B2 (en) 2004-04-20 2006-12-26 Agency For Science Technology And Research Method of fabricating microelectromechanical system structures
JP5136411B2 (ja) * 2006-06-29 2013-02-06 株式会社ニコン ウェハ接合装置
US8794287B2 (en) 2006-06-29 2014-08-05 Nikon Corporation Wafer bonding apparatus
WO2010055730A1 (ja) * 2008-11-14 2010-05-20 東京エレクトロン株式会社 貼り合わせ装置及び貼り合わせ方法
US7927975B2 (en) 2009-02-04 2011-04-19 Micron Technology, Inc. Semiconductor material manufacture
US8389385B2 (en) 2009-02-04 2013-03-05 Micron Technology, Inc. Semiconductor material manufacture
WO2014156987A1 (ja) 2013-03-26 2014-10-02 芝浦メカトロニクス株式会社 貼合装置および貼合基板の製造方法
KR20150130377A (ko) 2013-03-26 2015-11-23 시바우라 메카트로닉스 가부시끼가이샤 접합 장치 및 접합 기판의 제조 방법
US9586391B2 (en) 2013-03-26 2017-03-07 Shibaura Mechatronics Corporation Bonding apparatus and method for manufacturing bonded substrate
WO2015046243A1 (ja) 2013-09-25 2015-04-02 芝浦メカトロニクス株式会社 吸着ステージ、貼合装置、および貼合基板の製造方法
CN110168711A (zh) * 2017-09-21 2019-08-23 Ev 集团 E·索尔纳有限责任公司 接合基板的装置和方法
CN110168711B (zh) * 2017-09-21 2024-02-13 Ev 集团 E·索尔纳有限责任公司 接合基板的装置和方法

Also Published As

Publication number Publication date
JPH0560250B2 (enrdf_load_stackoverflow) 1993-09-01

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Legal Events

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