JPS61143835A - Data display system - Google Patents

Abstract

PURPOSE:To display respective data patterns so as to be overlapped by storing all data patterns to be displayed on a display device adjacently in a random access memory (RAM). CONSTITUTION:Three data patterns A-C of which size is A<B>C are adjacently stored in the video RAM3. When the three data patterns are displayed so that the pattern C is displayed in priority and the patterns B, A are successively displayed so as to be partially overlapped on the display device 5 as shown in the drawing, a central processor 1 stores prescribed data in an address converter 6, and then applies the display address of the picture display device 5 to the address converter 6 through an address line 82. The contents of the RAM3 are read out through an address line 83 on the basis of the converted address and the required picture is displayed on the display device 5.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention stores all data to be displayed on a display device adjacent to each other in a random access memory, and reads them out by controlling the addresses, thereby preventing overlap. This invention relates to a data display method that can also display data.

[Prior Art] When displaying a data pattern on a conventional cathode ray tube display device, it was as shown in FIG. In FIG. 7, the central processing unit 1 reads data to be displayed from the main memory 2, temporarily stores the information in a random access memory 3 (RAM) having a storage capacity corresponding to the display screen, and then reads it out. It was displayed. When storing, it was necessary to keep the displayed pattern as it is. That is, in FIG. 8, the screen C has priority over the other screen B, and B has priority over A. Therefore, since the data pattern on screen B is partially not displayed, the data of the hidden portion must be saved in the auxiliary storage device 4, and the central processing unit 1 must manage its address. The data pattern to the screen is also the same as in case B. The screen display device 5 sequentially reads out the random access memory 3 from the initial address and displays it in the stored state.

[Problems to be Solved by the Invention] When moving the display position of the A-C screen, it is necessary to correct the data of the portion that was hidden until then.

Therefore, all data regarding the screen pattern at the new display position is once transferred to the random access memory. If a blank space occurs in the data, it is necessary to read out that part from the auxiliary storage device 4 to fill in the blank space.

Therefore, when the data pattern is large or the amount of movement is large, the time required to transfer the data is enormous, and it is necessary to configure the pattern at the new position on the random access memory before displaying it.

[Means for solving the problems] The means adopted in the present invention to improve the above-mentioned problems are as follows:
In a data display method in which data to be displayed on a display device is retrieved from a main storage device via a random access memory under the control of a central processing unit and displayed, all data to be displayed are stored adjacent to each other in the random access memory. , the address for reading out the random access memory is given by specifying the position to be displayed on the screen display device, and further, in the previous stage of the random access memory, the display position specifying address is converted into a read address corresponding to the storage position of the memory. The present invention is to provide an address translation device that performs the following steps.

[Operation] All data can be stored adjacent to each other in a random access memory, and an address signal that gives a position to be displayed on a display device can be converted into an address so that a predetermined data pattern can be read out. It can be displayed without using an auxiliary storage device as in the past, and less processing is required when changing the pattern display position.

[Example] FIG. 1 is a block diagram showing an embodiment of the present invention.

Reference numeral 1 is a central processing unit CPU, 2 is a main memory MM, and 3 is a video signal random access memory RAM whose storage capacity does not correspond to the display screen and has a large capacity. 5 is a screen display device such as a cathode ray tube display device; 6 is an address conversion device;
7 is a refresh address generator for the random access memory 3; 81 is an address line that provides an initial write address to the memory 3; 82 is an address line that provides a display position address on the screen of the display device 5; and 83 is a converted address line. Shows address lines that give addresses.

FIG. 2 is a diagram showing display data patterns stored in the video RAM 3 in FIG. 1. Three data patterns A, B, and C are stored adjacent to each other in a planar manner. An example in which the pattern size is A<B>C is shown.

FIG. 3 shows a case where the data pattern of FIG. 2 is displayed on the screen display device 5, in which pattern C is preferentially displayed, and patterns B and A are hidden in that order.

When displaying as shown in Fig. 3, the central processing unit 1 (CPU) in Fig. 1 initially displays all data patterns A, B, and C.
is stored in the RAM 3 as shown in FIG.

That is, the address given to the address line 81 is the address given to the screen display device 5.
This is completely different from the address for displaying in . Next, the central processing unit 1 (CPU) stores the predetermined data shown in FIG. 3 in the address translation device 6, which will be described later. Thereafter, the central processing unit 1 (CPU) provides the display address on the screen display device 5 to the address conversion device 6 via the address line 82. The converted address is sent to R by the address line 83.
AM3 is read out and the desired screen shown in FIG. 3 is displayed on the display device 5.

The configuration of the address changing device 6 is as shown in FIG. 11 is a conversion information storage buffer, 12 is a pants 1 control circuit, 13 is a block selection circuit, 14 is a used block order buffer, and 15 is a used block count buffer. Data is stored in the conversion information storage buffer 11 as shown in FIG. That is, the topmost entry () contains the data pattern with the highest priority, in this case the display address on the screen display device 5 for screen C, and the data pattern in the RAM 3.
Stores the address difference (offset value) with

Looking at FIG. 3, we can see that the address of the display device 5 is the limit value (
Xc3. Yca) (XC4, Yca), and the address in FIG. 2 is (Xco, 0) (Xc+.

Yct), the offset value is (Xcs ~
Xco, Yca) (XC4~Xct,
YO2~Yc+), and the conversion information storage buffer 1
1's top entry ■ is (Xcs, Yca) (XC4, YO2): (Xcs
~Xco, Ycs) (XC4~Xc+,
YO2~Yc]) is stored. The next entry ■ stores the value for screen B, and the next entry ■ stores the value for screen A in the same way.

Further, the specific configuration of the block selection circuit 13 is as shown in FIG. 60-63 are comparison circuits, 64-69
denotes each address input terminal, and 70 denotes a selected signal output terminal. Terminals 64 and 67 are central processing unit 1 (C
Terminal 65 is the lower limit of the X address for each screen block, 66 is the upper limit of the X address for each screen block, 68 is the lower limit of the Y address for each screen block, and 69 is the lower limit of the Y address for each screen block. The value of the conversion information storage buffer 11 is inputted as the upper limit of Y address for each block. Then, from the comparison circuit 60, it is larger than the lower limit,
The configuration is such that an output is obtained from 61 when the output is smaller than the upper limit, from 62 when it is larger than the lower limit, and from 63 when it is smaller than the upper limit.

The central processing unit 1 determines the position to be displayed on the screen display device 5.
(CPU) to the conversion information storage buffer 11 in the address conversion device 6 and the block selection circuit 1 via the address line 82.
Give to 3. The buffer control circuit 12 operates to check the value at the top of the entry in the buffer 11 to see where in the screen block the address matches. When a match is found, for example, if it is found that it is within screen block C, by adding or subtracting the offset value of the buffer 11 for that address, the address from which to read the data in RAM 3 can be obtained, and if it is applied to RAM 3 via the address line 83, good.

Regarding data hidden on the screen, screen data included in entries with higher priority takes priority.

Used block order buffer 14, counter buffer I5
By storing the previously converted data for successive address inputs, the next address input can be processed more quickly.

When changing the display position of screens A to C, the data at the new position is stored in the conversion information storage buffer 11, and then the address line 81 is used to immediately obtain the conversion address.

[Effects of the Invention] According to the present invention, all data is developed in advance in one RAM 3 regardless of the display position, so data is transferred within the memory each time the display position is changed. There is no need to fill in data or develop new data. After simply processing for address translation,
Since it can be displayed at a new location simply by giving a new address, processing can be made faster. Also, in random access memory, one screen block does not store all of it together,
The data can be divided as needed, so it can be easily handled by storing the data in a buffer, and the random access memory can be used effectively.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, and FIG.
The figures are a diagram showing a display data pattern stored in the random access memory in Figure 1, Figure 3 is a diagram showing a display example of the screen display device in Figure 1,
The figure shows an example of the configuration of the address translation device in FIG. 1, FIG. 5 shows an example of data storage in the conversion information storage buffer in FIG. 4, and FIG. 6 shows an example of the configuration of the block selection circuit in FIG. 4. FIG. 7 is a diagram for explaining a conventional data display method, and FIG. 8 is a diagram showing an example of the display according to FIG. 1--Central processing unit CPU 2-Main memory device MM 3--Random access memory RAM4-Auxiliary storage device 5--Single screen display device 6-Address conversion device 11--Conversion information storage buffer 13--Block selection circuit 81.82.83--Address line patent applicant Fujitsu Ltd. agent Patent attorney Eisuke Suzuki No. 1vA Figure 4 Figure 6

Claims (1)

[Claims] In a data display method in which data to be displayed on a display device is retrieved from a main storage device via a random access memory under the control of a central processing unit and displayed, all data to be displayed are stored adjacent to each other in the random access memory. , the address for reading out the random access memory is given by specifying the position to be displayed on the screen display device, and further, in the previous stage of the random access memory, the display position specifying address is converted into a read address corresponding to the storage position of the memory. A data display method characterized by comprising an address translation device.