JPS61219082A - Display controller - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] Industrial Field of Application The present invention provides a method for displaying and scrolling the contents of an address area arbitrarily allocated in a screen memory, even if the screen memory stores the same number of characters as the number of displayed characters. The present invention relates to a display control device that allows scrolling without any trouble.

2. Description of the Related Art Conventionally, one of the functions of display devices such as cathode ray tubes (hereinafter referred to as rCRTJ) is scrolling, which moves an arbitrarily allocated address area in screen memory up or down line by line. There are ups and downs. As a way to perform this scrolling function,
It is conceivable to rewrite the contents of the screen memory or refresh memory, but this work would place a heavy burden on the control circuit system. This will be explained as a first conventional example with reference to FIG. As shown in Figure 3, CR of screen memory (1)
When scrolling up/down to the row-by-line address area (3) corresponding to one screen of the T screen (2), the row-by-line address value increase/decrease area (4a) (4b)
By providing this, up/down is possible. In this case, if the screen memory (1) is large, you can easily scroll multiple lines using this method, but the single screen memory (1) is
If 1) is small, for example, if this method is applied to a case where there is only one screen, scrolling one line will cause the memory address to point outside the memory area.

Next, as a second conventional example, a display control method that allows scrolling without any problem even in a screen memory that stores the same number of characters as one screen will be described. In this conventional example, a display device has a display area capable of displaying a pattern for a predetermined number of characters.

a screen memory capable of storing display data for the number of characters, and displaying the contents of a storage area corresponding to the display area from an arbitrary start address in the screen memory, the read start address of the screen memory; The present invention is characterized in that it includes an adder that adds a predetermined value to the screen memory, and converts an address other than the address area allocated as the screen memory into a corresponding address within the address area allocated to the screen memory. Also.

Even if the display screen is allocated to an arbitrary area of the screen memory, it can be scrolled without accessing outside the memory area. For example, the memory address of each line of one screen memory can be accessed in a drum format, that is, a ring-shaped configuration. It is said that

Currently, the screen memory is (oooo)1. ~(07FF)
1. For example, if the number of display characters per line is 80 characters and 24 lines are displayed, the storage address of the first display character of each line is the following number in 1G notation. The results are shown in Table 1.

Here, in order to access the entire memory (80 characters, 1 line x 24 lines = 1920 bytes), if we focus on the lower 10 bits of the address and ignore the upper 6 bits, we will get the start address of the 25th line (0780) 1. If you carry up (ooooo), it becomes 1G, and it becomes a drum configuration. That is, A shown in Table 2 (A)
7~AIO to the corresponding address A7~A in Table 2 (B)
It can be converted to lO. Therefore, even if the display screen is assigned to an arbitrary address area on the screen memory, it can be rewritten without any problem by using this drum configuration and adding or subtracting the start address of the display screen memory to the converted address. You can scroll.

(Margins below) Table 1 Table 2 (A) (B) Figure 4 explains the principle of the second conventional example. 5) is allocated to the display screen memory area (6).

()) is the display screen. With this configuration, for example, A
If the display screen area A' is allocated to the position, the above table 2 (A) is converted to table 2 (B) so that the area outside the memory area will not be accessed even if the screen is scrolled up further. Addition shown in FIG. 4(B) [I(8) is used. As a result, the screen memory has a drum configuration as shown in FIG. 4(e), and scrolling up and down can be performed endlessly. That is, the fourth
As shown in Figure (A), if the row addresses are 000 to 999, a drum-shaped memory is constructed by making the address after 999 match 000. Therefore, no matter where the start address of one display screen starts, when the conversion point is reached, conversion is performed by the adder (8), and the area outside the screen memory area is not accessed.The same applies when the conversion point is reached by scrolling. It is.

FIG. 5 shows a circuit block of a display control device according to the second conventional example according to the principle shown in FIG. ), and the address of the write or read command data is selected by the address decoder (14) and given to the screen memory (16) by the command decoder (15). In the case of writing, the contents of the write address register (17) are similarly selected by the address decoder (14), and the contents of the write data register (18) are written to the screen memory (16). The address is set on the n value setting board (19
) is accessed at the address added by the adder (20). In the case of reading, the start address of the display screen from the microprocessor (11) is selected by the address decoder (14) and temporarily stored in the start address register (21).
n value setting plate (19) for converting 16) into a drum structure.
) are added by the adder (22) and the contents of the AND circuit (2
3) and, on the other hand, a display one-screen character counter (24) that is counted by the clock from the clock generator (24).
25), a read address counter (26) is set by the output of the AND circuit (23), counts up one character at a time, and repeatedly sends the line-by-line address for each screen to the screen memory (16). The character code of the corresponding address is read from (16) and temporarily stored in the read register (27). This content is input to the character generator (28) as an address, and the counter (29) counts the dot string of, for example, 5 x 7 dots that constitutes a character using the read clock from the clock generator (24). 28), outputs this character pattern in parallel and inputs it into the pattern register (30), inputs it to the driver (31) as a serial signal using the read clock, obtains a brightness modulation signal, and outputs the character pattern in parallel from the clock generator (24). generates horizontal and vertical scan signals, and sends serial brightness modulation signals and scan control signals corresponding to characters to the CRT;
Display a predetermined number of characters on the display screen.

Problems to be Solved by the Invention However, in the conventional configuration described above, an adder circuit is required to convert the display address into an address in the screen memory area, making one circuit more complex and increasing the number of parts. It had

There is also a function called partial scrolling, which scrolls only some lines on one screen. ''), but in the conventional example, the address is always converted so that it accesses the same screen memory area, so it is not possible to distinguish between the scroll area and the fixed area. Another problem was that partial scrolling was not possible.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and it is an object of the present invention to provide a display control device that can perform scrolling without data movement and partial scrolling with a simpler circuit configuration.

Means for Solving the Problems In order to solve the above problems, a display control device of the present invention includes:
A display device that displays a pattern for a predetermined number of characters, a screen memory having an address area capable of storing data corresponding to a pattern for the number of characters, and a control device that supplies a predetermined address to the screen memory. , the content of an address area corresponding to a predetermined number of characters from an arbitrary starting address in the screen memory is read out and displayed, and a plurality of addresses specifying the screen memory exist for one memory cell. That is.

Effect According to the above configuration, the address specifying the screen memory is
Even if a predetermined number of characters are exceeded by scrolling or the like, the outside of the screen memory area is not specified, and the scrolling process or the like can be performed without moving data in the screen memory.

EXAMPLE Hereinafter, an example of the present invention will be described based on FIGS. 1 and 2.

FIG. 1 is a circuit block diagram of a display control device according to an embodiment of the present invention, in which (41) is a microprocessor, (42)
) is a data bus, (43) is an address bus, (44) is an address decoder, (45) is a command decoder,
(46) is the write data register, (47) is the write address register, (48) is the screen memory, (49) is 1
Screen character number counter, (50) is read address counter, (51) is read register, (52) is character generator, (53) is counter, (54) is pattern register, (55) is clock generator, (56) ) is the driver,
(57) is a CRT, which has the same structure as that shown in FIG. (58a) and (58b) are start address registers, and screen display start addresses can be set separately. (59) is a switching circuit, which allows the processor (41) to switch from which character on the screen the start address registers (58a) and (58b) are set.

FIG. 2 is an explanatory diagram of the screen memory read address circuit in the following display control device, in which the read address counter (50
) is a counter circuit that counts up according to the read clock. (60) is a read address line. In this case, one screen memory (48) is 4 kilobytes (1
It has a capacity of 1,024 bytes (kilobytes = 1024 bytes), and has two 2 kilobyte blocks, display block A and display block B.
It shall be divided into two blocks. In this embodiment, the configuration of the read address line (60) is 0, 1, 2, . . . from address O to address 10, as shown in FIG.
..., 9°10, and the next address is 12.

The effects of the above configuration will be explained below.

First, display information is sent from the microprocessor (41) through the data bus (42) and address bus (43), and the address of write or read command data is selected by the address decoder (44), and the command decoder (45) ) is applied to the screen memory (48).

In the case of writing, the write address register (47) is similarly selected by the address decoder (44), and the contents of the write data register (46) are written to the screen memory (48), but the contents of the write address register (47) The addresses are processed by a program using a microprocessor (41) so that each display block A and each display block B has a drum configuration.

In the case of reading, the start address of the display screen is sent from the microprocessor (41) to the address decoder (44).
In the 0th order switching circuit (59), the start address of display block A is selected in 1, for example, 1 is set in the start address register (58a), and the start address of display block B is set in the start address register (58b).
The line on the screen from which each block is displayed is set in advance by the microprocessor (41), and 1 is counted by the clock from the clock generator (55).
Comparing it with the value of the screen character number counter (49), when the display start count of each block is reached, the start address register (58a) or (58b) of that block is
is set in the read address counter (50), counted up one character at a time, and sent repeatedly to the screen memory (48).The character code of the corresponding address is read from the screen memory (48) and temporarily stored in the read register (51). be done.

Enter this content as an address into the character generator (52),
A dot string of, for example, 5 x 7 dots that constitutes a character is read out from the clock generator (55) by a counter (55).
3) and feed it to the character generator (52).

This character pattern is output in parallel and the pattern register (5
4), and input it as a serial signal to the driver (56) by read-out to obtain a brightness modulation signal, and also generate horizontal and vertical scan signals with the clock from the clock generator (55) to correspond to characters. A serial brightness modulation signal and a scan control signal are sent to the CRT (57) to display a predetermined number of characters on the display screen.

Here, we will explain in more detail the address output of each display block to the screen memory (48) in the case of reading.6 For example, when the screen configuration is 80 character lines x 24 lines, 20 Assuming that the area up to the line is the display area of display block A, and the 21st line to 24th line is the display area of display block B, in the 1st line, the switching circuit (
59), the start address of display block A is set in the read address counter (50), and the rest is up to the last character of the 20th line.

The read address counter (50) is sequentially counted up according to the clock generator (55) and one screen memory (4
8) is output as a read address.

Next, when the timing of the 21st row arrives, the switching circuit (59) again sets the start address of display block B in the read address counter (50) and sets it to 1.
The addresses of display blocks B are sequentially output to the screen memory (48) until the first line of the screen is reached.

Next, considering the scrolling operation in this configuration, in this embodiment, the configuration of the read address line (60) is changed to address 10 as shown in FIG.
Instead of setting the next address to address 11 consecutively, the next address is set to address 12 one after another, and as mentioned above, the memory capacity of display blocks A and B is each 2 kilobytes (2048 bytes). The scrolling operation of display block A will be explained. Display block A
The memory area has a memory amount of 2 kilobytes, and if it has a normal continuous address structure, for example, from (0000)i to (
07FF),.

However, in the case of the address configuration of this embodiment, address 11 is skipped and address 12 is used, so the area is from (oooo), , to (OFF), and furthermore, it is (oooo) 1G. ~(o7FF)xi and (0800)1. ~(OFF)2. The two sets of address areas specify the same memory area. That is (oooo)1. ~(07FF)16 and (0800)
□, ~(OFF)4. Between the two sets of address areas,
A mirror image relationship is established with two addresses for the same memory cell. When the memory area of display block A with this address configuration is scrolled up sequentially from (oooo)□6, the read address is (07FF) 1.
From (0800) 1. In the normal continuous memory address configuration, the area of one display block A (2 kilobytes) is exceeded at the time when the memory address changes to , but in the read memory address configuration of this embodiment, the mirror image relationship as described earlier is established. (07FF) 4. From (0800),
, and when the address changes, (oaoo)i, and (oooo)1. of the same address. , and returns to the first memory of display block A. Furthermore, the start address is (080G)0. If the value exceeds the start address A N D (07FF), the result of 6 is written into the start address register (58a) by the program of the microprocessor (41). As a result, the read address does not exceed (OFF)□6, and the drum configuration can be performed using software.

The same is true for display block B; for example, the memory areas (1000), ~(IFFF), and s are set to be the memory area of B. The read address of area B is (10
00)xi~(17FF), and (1800)8. ~(I
Since a mirror image relationship is established with FFF)□6, the scrolling operation described for 1 display block A will be performed exactly the same. Therefore, one display block A and one display block B can be scrolled independently, and either one can be made into a fixed area that is not scrolled. Further, in this embodiment, the number of display blocks is two, but the number of display blocks can be expanded to any number depending on the memory capacity, etc., and each block can be scrolled independently.

Effects of the Invention As described above, according to the present invention, by mirroring the address structure for screen memory readout, a display control device having a simple circuit structure and a high-speed scrolling process and a high-speed partial scrolling function is provided. can be provided at low cost.

[Brief explanation of the drawing]

FIG. 1 is a circuit block diagram of a display control device according to an embodiment of the present invention, FIG. 2 is an explanatory diagram of an image memory read address circuit in the same display control device, and FIG. 3 is a scroll display control of the first conventional example. FIG. 4 is a diagram explaining the principle of the second conventional example, and FIG. 5 is a circuit block diagram of the second conventional example. (48)--Screen memory, (57) ・CRT, (
58a) (58b)...Start address register, (59)...Switching circuit agent Morimoto
Yoshihiro Diagram 1 ~ @ Monument Prayer Diagram 2 Diagram 3 Diagram 4

Claims (1)

[Claims] 1. A display device that displays a pattern for a predetermined number of characters;
A screen memory having an address area that can store data corresponding to the pattern for the number of characters, and a control device that supplies a predetermined address to the screen memory, A display control device configured to read and display the contents of an address area corresponding to the number of characters, and to have a plurality of addresses for one memory cell that designate the screen memory. 2. The display control device according to claim 1, wherein the addresses specifying the screen memory overlap in units of screen memory capacity or more for a predetermined number of characters for one memory cell. 3. The display according to claim 2, wherein the addresses specifying the screen memory overlap each other in units of more than a predetermined number of characters and a factorial of 2 for one memory cell. Control device. 4. The control device includes a plurality of start address registers,
2. The display control device according to claim 1, further comprising a switching circuit for selecting one of these start address registers according to a display row.