JPS61123160A - 半導体装置パツケ−ジのピン溶接法 - Google Patents

半導体装置パツケ−ジのピン溶接法

Info

Publication number
JPS61123160A
JPS61123160A JP24330684A JP24330684A JPS61123160A JP S61123160 A JPS61123160 A JP S61123160A JP 24330684 A JP24330684 A JP 24330684A JP 24330684 A JP24330684 A JP 24330684A JP S61123160 A JPS61123160 A JP S61123160A
Authority
JP
Japan
Prior art keywords
package
semiconductor device
pin
layer
electrode pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24330684A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0478184B2 (enrdf_load_stackoverflow
Inventor
Shigeki Harada
茂樹 原田
Kiyoshi Muratake
村竹　清
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP24330684A priority Critical patent/JPS61123160A/ja
Publication of JPS61123160A publication Critical patent/JPS61123160A/ja
Publication of JPH0478184B2 publication Critical patent/JPH0478184B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps

Landscapes

  • Engineering & Computer Science (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP24330684A 1984-11-20 1984-11-20 半導体装置パツケ−ジのピン溶接法 Granted JPS61123160A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24330684A JPS61123160A (ja) 1984-11-20 1984-11-20 半導体装置パツケ−ジのピン溶接法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24330684A JPS61123160A (ja) 1984-11-20 1984-11-20 半導体装置パツケ−ジのピン溶接法

Publications (2)

Publication Number Publication Date
JPS61123160A true JPS61123160A (ja) 1986-06-11
JPH0478184B2 JPH0478184B2 (enrdf_load_stackoverflow) 1992-12-10

Family

ID=17101869

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24330684A Granted JPS61123160A (ja) 1984-11-20 1984-11-20 半導体装置パツケ−ジのピン溶接法

Country Status (1)

Country Link
JP (1) JPS61123160A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4970570A (en) * 1986-10-28 1990-11-13 International Business Machines Corporation Use of tapered head pin design to improve the stress distribution in the braze joint

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5466467A (en) * 1977-11-04 1979-05-29 Hitachi Ltd Method of connecting parts to printed circuit substrate

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5466467A (en) * 1977-11-04 1979-05-29 Hitachi Ltd Method of connecting parts to printed circuit substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4970570A (en) * 1986-10-28 1990-11-13 International Business Machines Corporation Use of tapered head pin design to improve the stress distribution in the braze joint

Also Published As

Publication number Publication date
JPH0478184B2 (enrdf_load_stackoverflow) 1992-12-10

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