JPS61112250A - Data processing system - Google Patents

Abstract

PURPOSE:To monitor the operation of a data processing system after the break conditions are satisfied by delivering a stop signal to a microprocessor when a prescribed period of time passed after the break conditions are satisfied. CONSTITUTION:A detection signal phiC is deliveres for start of the counting action of a counter 22 when a break conditions deciding circuit 21 detects the break point of a program. Then a time-out signal phit is sent to a break generating circuit 23 when the count value of the counter 22 reaches a prescribed level. The circuit 23 sends an MPU interruption stop signal IRQ to an MPU 10 to discontinue the actuation of the MPU 10. Then the circuit 23 delivers a trace stop signal phist to a trace circuit 12 to stop the fetching of signals on a bus.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to data processing technology, and relates to a technology that is effective when used in a device such as an emulator that emulates a microprocessor.

[Background Art] When developing software for a microcomputer system developed by a user or performing devasogging, an apparatus as shown in FIG. 2 is sometimes used. That is, an I for a microprocessor (hereinafter referred to as MPU) provided on board la constituting a microcomputer system (user system) 1.
MP of system l is connected to C socket 2 via connector 3.
Adaptive system with built-in MPU same as U
An emulator (hereinafter referred to as ASE) 4 is connected. This ASE4 connects to the CRT display 5 via a cable.
It is connected to a system development device 7 called a support tool, which is equipped with a floppy disk device 6a, 6b, and the like.

In the above system, a source program written in a language such as an assembler or compiler that is input from the keyboard of the CRT display 5 is first written to a floppy disk 6a, and then translated into machine language by the MPU in the system development device 7. It is written to the floppy disk 6b in the form of an object program. The program written on the floppy disk 6b is transferred to a RAM (random access memory) 8 or the like in the user system 1 by the MPU in ASEA and written therein.

The user program written to RAM8 etc. is
When the connector 3 is pulled out from the C socket 2 and the system's MPU 9 is inserted, 1 Normally, this MPU 9 executes the operation, but in the system shown in Fig. 2,
The user program can be debugged while being emulated by the MPU (same type as MPU9) in ASEJ.

In this case, it controls the CRT display 5, floppy disk devices i6a, 6b, etc.

There is a host MPU in the system development device 7 that translates assembler and compiler languages into machine language, and also edits data obtained by executing user programs using the MPU in the ASE4 and displays it on the CRT display 5. However, the emulator can be provided with a function that allows the MPU in the system development device 7 to process data obtained as a result of emulation in a form that is easy to edit. In the above system, ASE
The MPU in 4 has both emulation and data processing functions. Therefore, MP in ASE4
Based on the control signal output from the controller in the system development device 7, U is spatially divided into emulation mode and system mode for execution.

An emulator system having the above configuration has already been disclosed in Japanese Patent Application No. 58-34565.

By the way, when debugging a user program using the emulator system mentioned above, the program is generally cut into pieces and emulated. This is detected and the execution of the program is interrupted at that point.

In the break method described above, if the signal etc. on the address bus is monitored and the program is interrupted (break) when the address matches a predetermined condition, the execution of the program is stopped as soon as the break condition such as the address is met. Ru. Therefore, the state in the system just before the break is
Data on the bus is captured in real time into a storage device called trace memory, and the contents of the trace memory are analyzed after a break to determine the cause of program runaway and debug user programs and systems. I can do it.

However, rather than interrupting the program as soon as the break condition is met, it is easier to determine the cause of the runaway if the program is stopped several cycles after the break condition is met and the operating state of the system up to that point is known. This was revealed by the present inventors.

However, in conventional systems, in order to stop a program after a predetermined amount of time has passed after a break condition is satisfied, it is necessary to set a new breakpoint and continue the program, which is a tedious task. It is. Furthermore, if there is a jump instruction or the like on the way to a newly set breakpoint, there is also the inconvenience that the program cannot be interrupted immediately.

[Object of the Invention] An object of the present invention is to make it easier to determine the cause of program runaway in a data processing system such as an emulator, thereby improving debugging efficiency.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Summary of the Invention] Representative inventions disclosed in this application will be summarized as follows.

That is, in a data processing system such as an emulator, in addition to means for detecting the establishment of a break condition, a break generating means is provided that outputs a stop signal to the microprocessor when a predetermined period of time has elapsed after the establishment of the break condition. With this, it is possible to see the operating state of the system after a break condition is established, thereby making it easier to identify the cause of runaway, etc., and achieving the above purpose of improving debugging efficiency.
Ru.

[Embodiment] FIG. 1 shows an embodiment of an emulator system according to the present invention.

In the figure, the reference numeral 10 indicates an emulation MPU (microprocessor) provided in the ASE (adaptive system emulator) 4 shown in FIG. , this MPU10 is constituted by an MPU of the same type as MPU9 constituting the user system. The emulation MPU 1 O, a controller 11 provided in the system development device 7, a retouch circuit 12, and a break circuit 20 constitute an in-circuit emulator.

In the trace circuit 12, the MPU10 is
It has a memory and a counter that chronologically captures input/output signals appearing on the bus while the program is running. The break circuit 20 includes a register for setting conditions for the end (breakpoint) of a series of programs to be divided and executed during debugging, and the contents of this register.7. A, I believe 6th grade, 7, -6□. 4 comparison, a ・°! A break condition judgment circuit 21 detects whether the two match, a counter 22 starts counting operation in response to a coincidence detection signal φC output from this judgment circuit 21, and a count value of this counter 22 reaches a predetermined value. The MPU interrupt stop signal IRQ interrupts the M P tJ 1.0 to stop the operation of the MPU based on the timeout signal φt that is output at the time, and the trace circuit 12 stops receiving signals on the bus. A break generation circuit 23 generates a trace stop signal φst.

Although not particularly limited, the MPU interrupt stop signal IRQ is configured to be a signal that can interrupt the MPU10 using software. This makes it possible to open all the interrupt control terminals provided in MPU10 to the user.

The controller 11 is also connected to the host MPU 15 that controls the system development device 7 via the bus 14, and when a command such as execution of a user program is received from the keyboard of the CRT display, the AS
Determine whether it is a command for E and send MPU10
supply that command to When MPU10 receives this command, it outputs an appropriate address signal to switch the space, that is, to switch from the system mode to the emulation mode in which a user program is executed.

The counter 22 is configured such that the count value can be arbitrarily set by the controller 11 in advance, and for example, MPU10
is output from. A system that regulates memory cycles.
By counting the clock E, an appropriate delay time is obtained.

Next, use the above emulator system to
The operation when debugging a program will be explained.

If a loop in the user program you are trying to debug contains a bug, the program may be pulled out of the loop and jump to another location while the program is being debugged. Therefore, when debugging, the program is divided and emulation is performed. Therefore, there are conditions (
You need to set breakpoints.

The above breakpoint may target a signal output from MPU10 onto the address bus, or may target a signal output onto the data bus.

In this embodiment, before a user program is executed by emulation, the controller 11 receives a command from the host MPU 15 to set a breakpoint given from the keyboard or the like in a register in the break condition determination circuit 21. It has become. Also, in the same way, counter 2 is set before starting emulation.
The count value of 2 is also set by the controller 11.

Then, by a command from the host MPU 15, M
PU10 starts emulation.

At the same time, the trace circuit 12 operates an internal counter in response to a control signal from the controller 11, and sequentially captures the signals appearing on the bus at that time into the internal memory.

Further, the break condition determination circuit 21 also monitors a predetermined signal on the bus supplied from the MPU10, and successively compares it with a breakpoint set in an internal register.

In this way, while performing emulation without activating the trace circuit 12 and the break condition determination circuit 21, if it is determined that the signal on the bus matches the break condition and the break point has been passed, the break condition A match signal φC is output from the determination circuit 21. This signal causes the counter 22 to start counting, and when the counted value reaches the set value after a predetermined time, a timeout signal φ
t is output.

Then, upon receiving this timeout signal φt.

The break generation circuit 23 issues a software interrupt to stop the operation of the MPU10, and also sends a trace stop signal φst to the trace circuit 12 to stop taking in data on the bus.

and stops the internal counter.

As a result, the data in the memory in the trace circuit 12 is read out while referring to the counter, and after being subjected to appropriate processing, it is sent to the host MPU 15. After the host MPU 15 edits the data, it is displayed on the CRT display (see Figure 2). By displaying this information, it is possible to know the state of the bus before MPU10 is stopped. As a result, even if MPU10 goes out of control immediately after passing a breakpoint, the state can be known, and the cause of the runaway can be easily clarified.

Furthermore, by changing the setting value of the counter 22, the delay time from passing the breakpoint until stopping the MPU can be arbitrarily changed, thereby enabling efficient debugging.

Furthermore, it goes without saying that if the set value of the counter 22 is set to zero, the MPU can be stopped when a breakpoint is passed, as in conventional emulator systems.

However, instead of making the count value of the counter 22 variable as in the above embodiment, it may be fixed and the MPU always stops after a certain period of time after passing a breakpoint. In the above embodiment, there is a limit to the size of the memory capacity within the memory.

When the memory overflows, it returns to the starting address and writes new data over the data that has already been taken in.

As a result, even if it takes a long time to reach a breakpoint, it is possible to always know the state of the bus immediately before the MPU stops.

Also, when debugging a program, there are times when you repeat a certain loop dozens or hundreds of times, then pull out of the loop and jump to another location. Therefore, in order to find such debugging, a counter for counting the number of times the breakpoint has been passed and a register for setting the number of times the breakpoint has been passed are provided in the break condition determination circuit 21. When the breakpoint has been passed a certain number of times, the counter is set. 22 may be operated and the operation of the MPU may be stopped after a certain delay time.

In addition, as mentioned above, the memory in the trace circuit 12 has a limit on the amount of data that can be loaded into it, so when a certain loop of a program is repeatedly executed, it is necessary to run a series of programs and then You may want to capture the signal into the memory in the trace circuit. Therefore, in order to be able to detect when a certain point has been passed and start tracing from there, we need to create a register to set the specified point (trigger point) and detect whether or not the trigger point has been passed. A circuit for forming a trace start signal may also be provided.

[In addition to means of detecting the establishment of a break condition in a data processing system such as an effect co-emulator.

By providing a break generating means that outputs a stop signal to the microprocessor when a predetermined amount of time has elapsed after the break condition has been met, it is now possible to see the operating state of the system after the break condition has been met. As a result, it becomes easy to clarify the causes of runaway, etc., and it is also possible to know the passing state of coverage paths, etc., which has the effect of improving the efficiency of devanogging.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor. For example, in the embodiment described above, the break generation circuit 23 is configured to generate a signal that can interrupt the MPU10 by software to stop the operation.

It is also possible to adopt a configuration in which an appropriate signal is applied to an interrupt control terminal provided in the MPU to cause the MPU to stop.

[Field of Application] The above explanation mainly concerns the application of the invention made by the present inventor to the emulator system, which is the field of application behind the invention. However, the present invention is not limited thereto, and can be used in a system such as a logic analyzer where it is desired to detect the occurrence of a specific event and start or stop some operation.

[Brief explanation of drawings]

FIG. 1 is a block configuration diagram showing an example of the main part of an emulator system to which the present invention is applied. FIG. 2 is a schematic configuration diagram showing an example of the overall configuration of an emulator system to which the present invention is applied. It is. 1... User system, 2... IC socket, 3... Connector, 4... ASE (Adaptive System Emulator), 5... CRT
Display, 6a, 6b...Floppy disk device, 7...System development device, 8...RAM
, 9...MPU (microprocessor).

Claims (1)

[Claims] 1. Data for detecting the occurrence of a certain event in a data processing system equipped with the same type of microprocessor as the microprocessor of the target system and capable of emulating that system. has a register in which is stored, means for detecting the occurrence of the above event by comparing the contents of this register with a signal on the bus, and a means for detecting the occurrence of the above event after a predetermined period of time based on the detection signal from the detecting means. A data processing system comprising break generating means for outputting a stop signal to the microprocessor, and storage means for sequentially capturing and holding the state of the bus until the microprocessor is stopped by the stop signal. 2. The break generation means has a counter whose set value can be arbitrarily changed, and the counter is operated based on the detection signal from the detection means, and outputs a stop signal after a predetermined time. A data processing system according to claim 1, characterized in that: