JPS61111553A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS61111553A
JPS61111553A JP60212499A JP21249985A JPS61111553A JP S61111553 A JPS61111553 A JP S61111553A JP 60212499 A JP60212499 A JP 60212499A JP 21249985 A JP21249985 A JP 21249985A JP S61111553 A JPS61111553 A JP S61111553A
Authority
JP
Japan
Prior art keywords
plating
thickness
inner lead
tab
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60212499A
Other languages
English (en)
Inventor
Susumu Okikawa
進 沖川
Hajime Sato
佐藤 始
Hiromichi Suzuki
博通 鈴木
Hiroshi Mikino
三木野 博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60212499A priority Critical patent/JPS61111553A/ja
Publication of JPS61111553A publication Critical patent/JPS61111553A/ja
Pending legal-status Critical Current

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    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
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  • Engineering & Computer Science (AREA)
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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 この発明は金めつきを施こしたリードフレーム以下余白 に半導体ペレットをAu−3i共晶合金により接着させ
、後にワイヤーボンディングと樹脂封止や金属封止を行
なった構造に関する。
半導体ペレットをリードフレームに取シ付けるため、従
来では第1図囚のようにタブ部2とインナーリード部3
のAuめつき1の厚さを一様に等しくしたリードフレー
ムに、人u−3i共晶5を用いて第1図■のように半導
体ペレット4をタブ部2に接着している。6はワイヤ、
7はワイヤ圧着部である。
ここで間層になるのは、金は高価であるため、出来るだ
け金の使用量を低減することが望まれるのであるが、こ
れに応えてあまシタプの金めつき厚さを薄くするとAu
−3i共晶の濡れ不良を起こし、ペレットクラックを生
じる可能性がある。
しかし、実際には半導体ペレットとリードフレームの導
通をはかる為に金ワイヤーを熱圧着しているが、インナ
ーリードの金めつきが薄くとも第2図から判るように圧
着ハガレ等の間項はない。従って従来では余分な金がイ
ンナーリード部に使われているため、リードフレームが
原価高となっているのが実情である。
本発明の目的はリードフレームの金めつき量を低減して
、安定なベレットとタブのAu−8i共晶の濡れを得る
と共にワイヤボンデングの熱圧着性を従来と同じレベル
とするリードフレーム焉参牛#を有する半導体装置を提
供するものである。
本発明は、半導体ベレットをコバール(又は4270イ
)のリードフレーム上にAu−8i共晶で接着するもの
において、タブ部の金めつき厚さは1.5μm以上を維
持するものの、インナーリードの金めつき厚さを0.3
〜1.0μmに薄くしたことを特徴とするもので、以下
、実施例につい゛て説明する。
第3図は本発明の実施例を示すもので第1図囚と異なる
点はリードフレームのタブ2上の金めつきlの厚さが1
.5μm以上であるのに対して、原価低減のためインナ
ーリード部3の金めつき1の厚さを0.3〜1.0μm
と薄くした点でちる。このようにしても、ベレットの濡
れは第1図[F]と同じでAu−3i共晶5の濡れ不良
によるベレットクラックの可能性はない。また、インナ
ーリード部3のA tt線6.圧着部7ノ・ガレに対し
ても、金めつき厚さを0.3〜1.0μmにすることに
より問題は生じない。
第4図はタブ2上で人Uめつき1の厚さが異なりベレッ
ト接着部1aのみ入りめっき厚さを1.5μm以上とし
、その他のタブ部1b及びインナーリード部3のめつき
1の厚さを0.3〜1.0μmとした場合である。この
ようにしても第3図と同様に問題は生ぜず、一方金の使
用量を更に低減できる。
以上のように本発明の構成によυ金めつき使用量の低減
が出来、大巾な   ゛ 参用≠央ヰ導体装置の原価低減が可能となるのでちる。
【図面の簡単な説明】
第1図(A)(B)は従来のリードフレームの概略断面
図とベレット接着の概略断面図、第2図はインナーリー
ドめつき厚とAu線の圧着・・ガレの相関図、第3図と
第4図は本発明のリードフレーム構造の概略断面図であ
る。 1・・・金めつき、2・・・リードフレーム(タブ部)
、3・・・リードフレーム(インナーリード部)、4・
・・半導体ペレット、5・・・Au−5i共晶接着層、
6・・・ALli、7・・・インナーリードのAu線圧
着部。 ソ 1 図 りυ

Claims (1)

    【特許請求の範囲】
  1. 1、インナーリード部の金めっき厚さをタブの金めっき
    厚さよりも薄くしたリードフレームを有し、このリード
    フレームのタブ上には半導体ペレットをボンディングす
    る一方、インナーリード部にはワイヤをボンディングし
    たことを特徴とする半導体装置。
JP60212499A 1985-09-27 1985-09-27 半導体装置 Pending JPS61111553A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60212499A JPS61111553A (ja) 1985-09-27 1985-09-27 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60212499A JPS61111553A (ja) 1985-09-27 1985-09-27 半導体装置

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP13516579A Division JPS5660043A (en) 1979-10-22 1979-10-22 Lead frame and semiconductor device having the same

Publications (1)

Publication Number Publication Date
JPS61111553A true JPS61111553A (ja) 1986-05-29

Family

ID=16623673

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60212499A Pending JPS61111553A (ja) 1985-09-27 1985-09-27 半導体装置

Country Status (1)

Country Link
JP (1) JPS61111553A (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2752334A1 (fr) * 1996-07-15 1998-02-13 Matsushita Electronics Corp Dispositif a semiconducteurs muni d'un cadre de montage et son procede de fabrication
CN103887183A (zh) * 2012-12-21 2014-06-25 华为技术有限公司 金/硅共晶芯片焊接方法及晶体管
CN104319242A (zh) * 2014-10-27 2015-01-28 中国兵器工业集团第二一四研究所苏州研发中心 厚膜基板无焊料共晶贴装方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2752334A1 (fr) * 1996-07-15 1998-02-13 Matsushita Electronics Corp Dispositif a semiconducteurs muni d'un cadre de montage et son procede de fabrication
CN103887183A (zh) * 2012-12-21 2014-06-25 华为技术有限公司 金/硅共晶芯片焊接方法及晶体管
WO2014094436A1 (zh) * 2012-12-21 2014-06-26 华为技术有限公司 金/硅共晶芯片焊接方法及晶体管
CN104319242A (zh) * 2014-10-27 2015-01-28 中国兵器工业集团第二一四研究所苏州研发中心 厚膜基板无焊料共晶贴装方法

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