JPS6094744A - 混成集積回路装置 - Google Patents

混成集積回路装置

Info

Publication number
JPS6094744A
JPS6094744A JP20242983A JP20242983A JPS6094744A JP S6094744 A JPS6094744 A JP S6094744A JP 20242983 A JP20242983 A JP 20242983A JP 20242983 A JP20242983 A JP 20242983A JP S6094744 A JPS6094744 A JP S6094744A
Authority
JP
Japan
Prior art keywords
solder
coefficient
substrate
thermal expansion
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20242983A
Other languages
English (en)
Inventor
Koji Tanaka
幸二 田中
Chikashi Ito
史 伊藤
Yasunari Sugito
杉戸　泰成
Junji Sugiura
純二 杉浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Priority to JP20242983A priority Critical patent/JPS6094744A/ja
Publication of JPS6094744A publication Critical patent/JPS6094744A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は基板上へフリップチップ素子等の部品を搭載し
た混成集積回路装置の保護材１１による被覆構造に関す
るものである。
〔従来技術〕
従来のフリップチップ素子等を搭載する混成集積回路装
置は、フリップチップを基板へ半田で固定した後、樹脂
にて被覆している。その際基板とフリップチップとの間
隙へ、半田１とは熱膨張係数が大きく違う被覆保護用の
樹脂が浸入するため、（１） 熱ストレスが生じて半田が疲労して破断′４″る恐れが
ある。そして、この種の対策として番、１特開昭５’ｌ
−２０８１４９号公報のように、素子と基板の間隙の周
を囲って樹脂の浸入を防ぐもの等が示されているが、万
一樹脂が中へ浸入しても外見からは確認の方法がない。
〔発明の目的〕
本発明は上記問題に鑑み、基板と素子とを接続する半田
の熱ストレスを防止して信頼１１１の高い混成集積回路
装置の提供を目的とするものである。
〔実施例〕
以下本発明を第１図に示す第一実施例について説明する
。ｌは部品搭載用の基板、２はフリップチップ、３は基
板１にフリ・ノブチップ２を組付ける半田接続部、４は
熱膨張係数が半１１３に近く、同時に電気絶縁抵抗が高
い材料、例えば炭化珪素やアルミナの微粒と樹脂５の混
合物で、この微粒の粒径は約１０μｍ程度のものである
。５は基板１上に組付されたチップ２等の部品を保護す
るシリコーンゲルなどの樹脂である。
（２） 次に上記構成においてその作用を説明する。一般に半田
３の熱膨張係数は１５．０〜３０．０Ｘ１０−６／℃、
同様にアルミナは６．７Ｘ１０−”、そして樹脂５は１
．０〜１０．０ｘｌＯ〜４であって、アルミナの微粒と
樹脂５の混合物４の混合比を半田３の熱膨張係数に近く
なるよう設定し、基板１ヘフリソブチツプ２を半田付し
たあとの基板ｌとフリップチップ２の隙間へ、この混合
物４を充填する。
この場合アルミナの微粒を予め基板１との隙間へ充填し
てから樹脂５を注入して硬化させても良いし、すでに微
粒と樹脂５を混合したものを充填硬化させても良い。こ
の様にしてできた混合物４の熱膨張係数は、樹脂５とア
ルミナの微粒の混合時の体積混合比で変化させることが
可能であり、フリップチップ２を被覆するものが樹脂５
だけの場合と比較すると、大幅に熱膨張係数を半田３の
熱膨張係数に近づけることができるので、半田３と混合
物４との熱膨張係数の差は小さくなって発生ずる熱スト
レスも小さくなり、半田３の熱疲労を防止できる。同時
にアルミナの微粒を樹脂５に混（３） 合していることより、熱伝動率も高くなり、フリップチ
ップ２の放熱が改善されるのでフリップチップ２の信頼
性向上もはかれる。
なお、本発明の他の実施例を第２図、第３図に示す。第
２図は基板１上の保護＋）　ｌ’ｌ全体を炭化１素やア
ルミナの微粒と樹脂５の混合物４にて充填被覆したもの
で、第１実施例と同様の効果がある上、微粒を全体に含
んでいるため、フリップチップ２の放熱がさらに同士で
きる。
第３図に示すように、フリップチップ２だけでなく基板
１に組付けられた他のチップ部品６に対しても同じよう
な効果が期待できる。また上記と同様樹脂５と炭化珪素
やアルミリ−の微粒の混合物４はチップ部品６と基板１
の隙間部だＩノに充填した場合でもよいし、基板１とチ
ップ部品（ｉの接続材料も半田以外の材料の場合でもよ
い。
〔発明の効果〕
以上述べたように本発明によれば、半１１１に近い熱膨
張係数の絶縁物を基板と素子との間隙に充填しているか
ら、基板と素子を接続する半ＩＩ＋の熱ス（４） ドレスによる破断を防止して高い信頼性を得ることがで
きるという優れた効果がある。
【図面の簡単な説明】
第１図は本発明の第一実施例の断面図、第２図。 第３図は本発明の他の実施例図である。 ■・・・基板、２・・・フリップチップ、３・・・半田
、４・・・混合物、５・・・樹脂。 代理人弁理士　岡　部　隆 （５）

Claims (1)

  1. 【特許請求の範囲】 基板上に素子を半田付後、保護材１１を周囲に充填する
    混成集積回路装置において、 前記半田付に使用する半田と熱膨張係数が近い絶縁物を
    、前記基板と前記素子との間隙に充填したことを特徴と
    する混成集積回路装置。
JP20242983A 1983-10-27 1983-10-27 混成集積回路装置 Pending JPS6094744A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20242983A JPS6094744A (ja) 1983-10-27 1983-10-27 混成集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20242983A JPS6094744A (ja) 1983-10-27 1983-10-27 混成集積回路装置

Publications (1)

Publication Number Publication Date
JPS6094744A true JPS6094744A (ja) 1985-05-27

Family

ID=16457362

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20242983A Pending JPS6094744A (ja) 1983-10-27 1983-10-27 混成集積回路装置

Country Status (1)

Country Link
JP (1) JPS6094744A (ja)

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62217620A (ja) * 1986-03-19 1987-09-25 Hitachi Ltd チツプキヤリア
JPS63201337U (ja) * 1987-06-16 1988-12-26
JPH0215660A (ja) * 1988-07-01 1990-01-19 Sharp Corp 半導体装置
EP0446580A1 (en) * 1990-03-14 1991-09-18 International Business Machines Corporation Solder interconnection structure with encapsulant and composition of the latter
EP0446666A3 (en) * 1990-03-14 1992-01-08 International Business Machines Corporation Solder interconnection structure on organic substrates and process for making
EP0603928A1 (en) * 1992-12-21 1994-06-29 Delco Electronics Corporation Hybrid circuit
EP0620591A1 (en) * 1993-04-12 1994-10-19 Delco Electronics Corporation Silicone over-mould of a flip-chip device
US5444301A (en) * 1993-06-23 1995-08-22 Goldstar Electron Co. Ltd. Semiconductor package and method for manufacturing the same
US5478007A (en) * 1993-04-14 1995-12-26 Amkor Electronics, Inc. Method for interconnection of integrated circuit chip and substrate
US5483106A (en) * 1993-07-30 1996-01-09 Nippondenso Co., Ltd. Semiconductor device for sensing strain on a substrate
US5629566A (en) * 1994-08-15 1997-05-13 Kabushiki Kaisha Toshiba Flip-chip semiconductor devices having two encapsulants
US5795818A (en) * 1996-12-06 1998-08-18 Amkor Technology, Inc. Integrated circuit chip to substrate interconnection and method
US5866953A (en) * 1996-05-24 1999-02-02 Micron Technology, Inc. Packaged die on PCB with heat sink encapsulant
EP0827191A3 (en) * 1996-08-20 1999-12-29 Nec Corporation Semiconductor device mounting structure
US6117797A (en) * 1998-09-03 2000-09-12 Micron Technology, Inc. Attachment method for heat sinks and devices involving removal of misplaced encapsulant
US6297960B1 (en) 1998-06-30 2001-10-02 Micron Technology, Inc. Heat sink with alignment and retaining features
US6297548B1 (en) 1998-06-30 2001-10-02 Micron Technology, Inc. Stackable ceramic FBGA for high thermal applications
US6326687B1 (en) 1998-09-01 2001-12-04 Micron Technology, Inc. IC package with dual heat spreaders
EP1450402A1 (en) * 2003-02-21 2004-08-25 Fujitsu Limited Semiconductor device with improved heat dissipation, and a method of making semiconductor device
WO2006005304A3 (de) * 2004-07-05 2006-06-01 Infineon Technologies Ag Halbleiterbauteil mit einem halbleiterchip und elektrischen verbindungselementen zu einer leiterstruktur

Cited By (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62217620A (ja) * 1986-03-19 1987-09-25 Hitachi Ltd チツプキヤリア
JPS63201337U (ja) * 1987-06-16 1988-12-26
JPH0215660A (ja) * 1988-07-01 1990-01-19 Sharp Corp 半導体装置
EP0446580A1 (en) * 1990-03-14 1991-09-18 International Business Machines Corporation Solder interconnection structure with encapsulant and composition of the latter
EP0446666A3 (en) * 1990-03-14 1992-01-08 International Business Machines Corporation Solder interconnection structure on organic substrates and process for making
US5292688A (en) * 1990-03-14 1994-03-08 International Business Machines Corporation Solder interconnection structure on organic substrates and process for making
EP0603928A1 (en) * 1992-12-21 1994-06-29 Delco Electronics Corporation Hybrid circuit
EP0620591A1 (en) * 1993-04-12 1994-10-19 Delco Electronics Corporation Silicone over-mould of a flip-chip device
US5478007A (en) * 1993-04-14 1995-12-26 Amkor Electronics, Inc. Method for interconnection of integrated circuit chip and substrate
US5444301A (en) * 1993-06-23 1995-08-22 Goldstar Electron Co. Ltd. Semiconductor package and method for manufacturing the same
US5483106A (en) * 1993-07-30 1996-01-09 Nippondenso Co., Ltd. Semiconductor device for sensing strain on a substrate
US5629566A (en) * 1994-08-15 1997-05-13 Kabushiki Kaisha Toshiba Flip-chip semiconductor devices having two encapsulants
US6617684B2 (en) 1996-05-24 2003-09-09 Micron Technology, Inc. Packaged die on PCB with heat sink encapsulant
US5866953A (en) * 1996-05-24 1999-02-02 Micron Technology, Inc. Packaged die on PCB with heat sink encapsulant
US6534858B2 (en) 1996-05-24 2003-03-18 Micron Technology, Inc. Assembly and methods for packaged die on pcb with heat sink encapsulant
US6853069B2 (en) 1996-05-24 2005-02-08 Micron Technology, Inc. Packaged die on PCB with heat sink encapsulant and methods
EP0827191A3 (en) * 1996-08-20 1999-12-29 Nec Corporation Semiconductor device mounting structure
US5795818A (en) * 1996-12-06 1998-08-18 Amkor Technology, Inc. Integrated circuit chip to substrate interconnection and method
US6163463A (en) * 1996-12-06 2000-12-19 Amkor Technology, Inc. Integrated circuit chip to substrate interconnection
US6297960B1 (en) 1998-06-30 2001-10-02 Micron Technology, Inc. Heat sink with alignment and retaining features
US6297548B1 (en) 1998-06-30 2001-10-02 Micron Technology, Inc. Stackable ceramic FBGA for high thermal applications
US6858926B2 (en) 1998-06-30 2005-02-22 Micron Technology, Inc. Stackable ceramic FBGA for high thermal applications
US6760224B2 (en) 1998-06-30 2004-07-06 Micron Technology, Inc. Heat sink with alignment and retaining features
US6650007B2 (en) 1998-06-30 2003-11-18 Micron Technology, Inc. Stackable ceramic fbga for high thermal applications
US6525943B2 (en) 1998-06-30 2003-02-25 Micron Technology, Inc. Heat sink with alignment and retaining features
US7285442B2 (en) 1998-06-30 2007-10-23 Micron Technology, Inc. Stackable ceramic FBGA for high thermal applications
US6326687B1 (en) 1998-09-01 2001-12-04 Micron Technology, Inc. IC package with dual heat spreaders
US6765291B2 (en) 1998-09-01 2004-07-20 Micron Technology, Inc. IC package with dual heat spreaders
US6518098B2 (en) 1998-09-01 2003-02-11 Micron Technology, Inc. IC package with dual heat spreaders
US6920688B2 (en) 1998-09-01 2005-07-26 Micron Technology, Inc. Method for a semiconductor assembly having a semiconductor die with dual heat spreaders
US6432840B1 (en) 1998-09-03 2002-08-13 Micron Technology, Inc. Methodology of removing misplaced encapsulant for attachment of heat sinks in a chip on board package
US6806567B2 (en) 1998-09-03 2004-10-19 Micron Technology, Inc. Chip on board with heat sink attachment and assembly
US6596565B1 (en) 1998-09-03 2003-07-22 Micron Technology, Inc. Chip on board and heat sink attachment methods
US6229204B1 (en) 1998-09-03 2001-05-08 Micron Technology, Inc. Chip on board with heat sink attachment
US6451709B1 (en) 1998-09-03 2002-09-17 Micron Technology, Inc. Methodology of removing misplaced encapsulant for attachment of heat sinks in a chip on board package
US6117797A (en) * 1998-09-03 2000-09-12 Micron Technology, Inc. Attachment method for heat sinks and devices involving removal of misplaced encapsulant
EP1450402A1 (en) * 2003-02-21 2004-08-25 Fujitsu Limited Semiconductor device with improved heat dissipation, and a method of making semiconductor device
US7115444B2 (en) 2003-02-21 2006-10-03 Fujitsu Limited Semiconductor device with improved heat dissipation, and a method of making semiconductor device
US7199467B2 (en) 2003-02-21 2007-04-03 Fujitsu Limited Semiconductor device with improved heat dissipation, and a method of making semiconductor device
US7381592B2 (en) 2003-02-21 2008-06-03 Fujitsu Limited Method of making a semiconductor device with improved heat dissipation
WO2006005304A3 (de) * 2004-07-05 2006-06-01 Infineon Technologies Ag Halbleiterbauteil mit einem halbleiterchip und elektrischen verbindungselementen zu einer leiterstruktur
US9082706B2 (en) 2004-07-05 2015-07-14 Infineon Technologies Ag Semiconductor device with a semiconductor chip and electrical connecting elements to a conductor structure

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