JPS609343B2 - 電子部品製造法 - Google Patents

電子部品製造法

Info

Publication number
JPS609343B2
JPS609343B2 JP49120505A JP12050574A JPS609343B2 JP S609343 B2 JPS609343 B2 JP S609343B2 JP 49120505 A JP49120505 A JP 49120505A JP 12050574 A JP12050574 A JP 12050574A JP S609343 B2 JPS609343 B2 JP S609343B2
Authority
JP
Japan
Prior art keywords
temperature
bonded
molten metal
electronic component
electronic components
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP49120505A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5146072A (enExample
Inventor
学 盆子原
好雄 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP49120505A priority Critical patent/JPS609343B2/ja
Publication of JPS5146072A publication Critical patent/JPS5146072A/ja
Publication of JPS609343B2 publication Critical patent/JPS609343B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]

Landscapes

  • Wire Bonding (AREA)
JP49120505A 1974-10-18 1974-10-18 電子部品製造法 Expired JPS609343B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP49120505A JPS609343B2 (ja) 1974-10-18 1974-10-18 電子部品製造法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP49120505A JPS609343B2 (ja) 1974-10-18 1974-10-18 電子部品製造法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP60263373A Division JPS61190954A (ja) 1985-11-22 1985-11-22 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5146072A JPS5146072A (enExample) 1976-04-20
JPS609343B2 true JPS609343B2 (ja) 1985-03-09

Family

ID=14787845

Family Applications (1)

Application Number Title Priority Date Filing Date
JP49120505A Expired JPS609343B2 (ja) 1974-10-18 1974-10-18 電子部品製造法

Country Status (1)

Country Link
JP (1) JPS609343B2 (enExample)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2205800B1 (enExample) * 1972-11-09 1976-08-20 Honeywell Bull Soc Ind
JPS5537868B2 (enExample) * 1972-11-09 1980-09-30

Also Published As

Publication number Publication date
JPS5146072A (enExample) 1976-04-20

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