JPS6086642A - メモリ制御情報設定方式 - Google Patents

メモリ制御情報設定方式

Info

Publication number
JPS6086642A
JPS6086642A JP58195752A JP19575283A JPS6086642A JP S6086642 A JPS6086642 A JP S6086642A JP 58195752 A JP58195752 A JP 58195752A JP 19575283 A JP19575283 A JP 19575283A JP S6086642 A JPS6086642 A JP S6086642A
Authority
JP
Japan
Prior art keywords
memory
control information
address
card
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58195752A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0562380B2 (enrdf_load_stackoverflow
Inventor
Kiyoshi Sudo
清 須藤
Toshihiro Sakai
酒井　利弘
Toru Otsu
徹 大津
Tadashi Kaneko
正 金古
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58195752A priority Critical patent/JPS6086642A/ja
Publication of JPS6086642A publication Critical patent/JPS6086642A/ja
Publication of JPH0562380B2 publication Critical patent/JPH0562380B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2289—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by configuration test

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
JP58195752A 1983-10-18 1983-10-18 メモリ制御情報設定方式 Granted JPS6086642A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58195752A JPS6086642A (ja) 1983-10-18 1983-10-18 メモリ制御情報設定方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58195752A JPS6086642A (ja) 1983-10-18 1983-10-18 メモリ制御情報設定方式

Publications (2)

Publication Number Publication Date
JPS6086642A true JPS6086642A (ja) 1985-05-16
JPH0562380B2 JPH0562380B2 (enrdf_load_stackoverflow) 1993-09-08

Family

ID=16346371

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58195752A Granted JPS6086642A (ja) 1983-10-18 1983-10-18 メモリ制御情報設定方式

Country Status (1)

Country Link
JP (1) JPS6086642A (enrdf_load_stackoverflow)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63131245A (ja) * 1986-11-20 1988-06-03 Anritsu Corp メモリバンク制御装置
JPS63135442U (enrdf_load_stackoverflow) * 1987-02-25 1988-09-06
JPH02150936A (ja) * 1988-12-01 1990-06-11 Pfu Ltd 拡張メモリアクセス方式
JPH04211846A (ja) * 1991-02-20 1992-08-03 Toshiba Corp コンピュータシステム
JPH07200458A (ja) * 1993-12-17 1995-08-04 Internatl Business Mach Corp <Ibm> メモリ・アクセス装置及びその方法
JPH086849A (ja) * 1994-06-16 1996-01-12 Kofu Nippon Denki Kk 半導体記憶装置
US5625847A (en) * 1994-12-26 1997-04-29 Kabushiki Kaisha Toshiba High-speed ISA bus control system for changing command cycle execution speed by selectively using ISA bus controller and high-speed bus controller
JP2012168979A (ja) * 2000-08-17 2012-09-06 Sandisk Corp ホストと順次通信する複数の取り外し可能な不揮発性メモリ・カード

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58158754A (ja) * 1982-03-15 1983-09-21 Hitachi Ltd 制御システム

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58158754A (ja) * 1982-03-15 1983-09-21 Hitachi Ltd 制御システム

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63131245A (ja) * 1986-11-20 1988-06-03 Anritsu Corp メモリバンク制御装置
JPS63135442U (enrdf_load_stackoverflow) * 1987-02-25 1988-09-06
JPH02150936A (ja) * 1988-12-01 1990-06-11 Pfu Ltd 拡張メモリアクセス方式
JPH04211846A (ja) * 1991-02-20 1992-08-03 Toshiba Corp コンピュータシステム
JPH07200458A (ja) * 1993-12-17 1995-08-04 Internatl Business Mach Corp <Ibm> メモリ・アクセス装置及びその方法
JPH086849A (ja) * 1994-06-16 1996-01-12 Kofu Nippon Denki Kk 半導体記憶装置
US5625847A (en) * 1994-12-26 1997-04-29 Kabushiki Kaisha Toshiba High-speed ISA bus control system for changing command cycle execution speed by selectively using ISA bus controller and high-speed bus controller
JP2012168979A (ja) * 2000-08-17 2012-09-06 Sandisk Corp ホストと順次通信する複数の取り外し可能な不揮発性メモリ・カード
US8386678B2 (en) 2000-08-17 2013-02-26 Sandisk Corporation Enhanced data storage device
US8700833B2 (en) 2000-08-17 2014-04-15 Sandisk Corporation Data storage device with host-accessible indicator

Also Published As

Publication number Publication date
JPH0562380B2 (enrdf_load_stackoverflow) 1993-09-08

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