JPS607676A - メモリ書込み回路 - Google Patents

メモリ書込み回路

Info

Publication number
JPS607676A
JPS607676A JP58114479A JP11447983A JPS607676A JP S607676 A JPS607676 A JP S607676A JP 58114479 A JP58114479 A JP 58114479A JP 11447983 A JP11447983 A JP 11447983A JP S607676 A JPS607676 A JP S607676A
Authority
JP
Japan
Prior art keywords
input
memory
bit
data
inputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58114479A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0120514B2 (enExample
Inventor
Kazuo Yokoyama
和夫 横山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58114479A priority Critical patent/JPS607676A/ja
Publication of JPS607676A publication Critical patent/JPS607676A/ja
Publication of JPH0120514B2 publication Critical patent/JPH0120514B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store

Landscapes

  • Digital Computer Display Output (AREA)
JP58114479A 1983-06-25 1983-06-25 メモリ書込み回路 Granted JPS607676A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58114479A JPS607676A (ja) 1983-06-25 1983-06-25 メモリ書込み回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58114479A JPS607676A (ja) 1983-06-25 1983-06-25 メモリ書込み回路

Publications (2)

Publication Number Publication Date
JPS607676A true JPS607676A (ja) 1985-01-16
JPH0120514B2 JPH0120514B2 (enExample) 1989-04-17

Family

ID=14638767

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58114479A Granted JPS607676A (ja) 1983-06-25 1983-06-25 メモリ書込み回路

Country Status (1)

Country Link
JP (1) JPS607676A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6343246U (enExample) * 1986-09-02 1988-03-23
US4954988A (en) * 1988-10-28 1990-09-04 Rockwell International Corporation Memory device wherein a shadow register corresponds to each memory cell
KR100303857B1 (ko) * 1998-05-08 2002-04-24 홍탁 목재 마루 공법

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5449824U (enExample) * 1977-09-13 1979-04-06

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5449824U (enExample) * 1977-09-13 1979-04-06

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6343246U (enExample) * 1986-09-02 1988-03-23
US4954988A (en) * 1988-10-28 1990-09-04 Rockwell International Corporation Memory device wherein a shadow register corresponds to each memory cell
KR100303857B1 (ko) * 1998-05-08 2002-04-24 홍탁 목재 마루 공법

Also Published As

Publication number Publication date
JPH0120514B2 (enExample) 1989-04-17

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