JPS6072345A - デイジタル信号位相同期回路 - Google Patents

デイジタル信号位相同期回路

Info

Publication number
JPS6072345A
JPS6072345A JP58178283A JP17828383A JPS6072345A JP S6072345 A JPS6072345 A JP S6072345A JP 58178283 A JP58178283 A JP 58178283A JP 17828383 A JP17828383 A JP 17828383A JP S6072345 A JPS6072345 A JP S6072345A
Authority
JP
Japan
Prior art keywords
phase
output
clock
signal
input signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58178283A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0342737B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Hisahiro Sakakida
尚弘 榊田
Naofumi Nagai
直文 永井
Toshio Shimoe
敏夫 下江
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP58178283A priority Critical patent/JPS6072345A/ja
Publication of JPS6072345A publication Critical patent/JPS6072345A/ja
Publication of JPH0342737B2 publication Critical patent/JPH0342737B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP58178283A 1983-09-28 1983-09-28 デイジタル信号位相同期回路 Granted JPS6072345A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58178283A JPS6072345A (ja) 1983-09-28 1983-09-28 デイジタル信号位相同期回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58178283A JPS6072345A (ja) 1983-09-28 1983-09-28 デイジタル信号位相同期回路

Publications (2)

Publication Number Publication Date
JPS6072345A true JPS6072345A (ja) 1985-04-24
JPH0342737B2 JPH0342737B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-06-28

Family

ID=16045756

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58178283A Granted JPS6072345A (ja) 1983-09-28 1983-09-28 デイジタル信号位相同期回路

Country Status (1)

Country Link
JP (1) JPS6072345A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62269531A (ja) * 1986-05-19 1987-11-24 Hitachi Ltd 同期信号抽出回路
JPS6345934A (ja) * 1986-03-31 1988-02-26 Nec Corp ビツト同期回路及び方法
JPS63229934A (ja) * 1987-03-19 1988-09-26 Fujitsu Ltd タイミングpll方式

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56116755U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1980-02-05 1981-09-07

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56116755U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1980-02-05 1981-09-07

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6345934A (ja) * 1986-03-31 1988-02-26 Nec Corp ビツト同期回路及び方法
JPS62269531A (ja) * 1986-05-19 1987-11-24 Hitachi Ltd 同期信号抽出回路
JPS63229934A (ja) * 1987-03-19 1988-09-26 Fujitsu Ltd タイミングpll方式

Also Published As

Publication number Publication date
JPH0342737B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-06-28

Similar Documents

Publication Publication Date Title
JPH0292021A (ja) ディジタルpll回路
JPS6072345A (ja) デイジタル信号位相同期回路
GB2112236A (en) Digital device for clock signal synchronization
JP2541398B2 (ja) 多重周波数デジタル位相同期ル―プ回路
JPS63996B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPS5535545A (en) Digital phase synchronous circuit
JPS6315517A (ja) クロツク発生回路
JPS61167224A (ja) デジタル位相同期回路
JPS6367022A (ja) 位相同期回路
JPH0631795Y2 (ja) デイジタル信号同期回路
JPS6327121A (ja) クロツク回路の自動同期装置
JPS6281177A (ja) 同期制御回路
JPH01228325A (ja) ディジタル位相周期ループ回路
JP2979811B2 (ja) クロック出力回路
JPH02171049A (ja) 外部同期クロツクパルス発生回路
KR100290845B1 (ko) 평판디스플레이시스템의동기신호처리장치
JPS6346814A (ja) デイジタル位相同期回路
JPS60190024A (ja) デイジタル位相同期回路
JPS6367823A (ja) デイレ−ラインによるdpll
JPS63152224A (ja) クロツク自動同期方式
JPS5967730A (ja) Pll回路
JPH02250445A (ja) 制御用クロックの位相調整回路
JPH0267034A (ja) ビット同期回路
JPS6398221A (ja) デイジタル信号位相同期方式
JPS5955690A (ja) バ−ストゲ−トパルス発生回路