JPS6043653B2 - Manufacturing method of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device suitable for obtaining a thyristor.

Generally, when obtaining a thyristor, N
For conductive type wafer (asgrownwafer) 1,
By performing sealed tube diffusion of Ga, P-type layers 2 and 3 are formed as shown in FIG.

At this time, the wafer surface remains exposed, so if unnecessary impurities are present in the sealed tube itself, Ga as an impurity source, or other impurities, the impurities will enter the wafer 1 along with the Ga, and the lifetime of the minority carriers will be reduced. or a decrease in PN
There is a risk that breakdown voltage deterioration may occur at the joint. Also,
After the step shown in FIG. 1, a step of scraping off the front side of the P-type layer 2 by chemically etching one side of the wafer 1 is usually performed. This is to obtain the desired electrical characteristics (switching sensitivity, etc.) when the N1 diffusion layer 4 is formed on the P-type layer 2 as shown in FIG. 1c.
Controlling the amount of etching of the mold layer 2 requires considerable accuracy. However, the above-mentioned etching is usually performed by covering the surface of the P-type layer 3 with acid-resistant tape or wax, etc., and etching the P-type layer 2, but the coating film with the tape or wax is 10 μm thick.
Moreover, since it is soft, errors may occur when measuring the amount of etching with a dial gauge, which is a problem. The present invention was made in view of the above circumstances, and it is possible to carry out sealed tube diffusion of Ga to prevent unnecessary impurities from entering the semiconductor substrate (wafer), and to perform accurate etching of the semiconductor substrate after this sealed tube diffusion. The present invention aims to provide a method for manufacturing a semiconductor device that can eliminate the problems of the conventional method.

An embodiment of the present invention will be described below with reference to the drawings.

First, as shown in Figure 2a, an N-type wafer (asgrow
By subjecting the wafer (nwafer) 11 to high-temperature thermal oxidation, Si0 is deposited on the entire surface of the wafer 11. A film 12 is formed. Thereafter, this wafer was placed in a quartz tube 13 as shown in FIG.
P-type diffusion layers 14 and 15 are formed as shown in FIG. 2b by sealing and heating together with diffusion in a sealed tube. This diffusion layer formation is possible because Ga can easily pass through the SiO2 film 12. The thickness of the SlO2 film 12 may be about 3μ, and the surface concentration of the P-type layers 14 and 15 is 2×1019 cm.
It means that high-concentration diffusion (different from low-concentration diffusion of 1×10i7cm-3 or less) was performed at about 3'. , 18 is a quartz boat, and 19 is a dummy wafer on which Ga is attached as a diffusion source.
As shown, the SlO2 film (thermal oxide film) 1 on the P-type layer 15 side
The surface of SiO2 on the P-type layer 14 side is covered with a coating 19 made of acid-resistant tape, wax, resist, etc.
The film 12 is etched away to expose the surface of the P-type layer 14.

Next, as shown in FIG. 4b, after removing the coating 19,
Using the SiO2 film 12 on the surface of the mold layer 15 as a protector,
The surface portion of the P-type layer 14 is chemically etched, for example, to a point on the dashed line. According to the above method, the following advantages are provided.

First, when forming the P-type layers 14 and 15 by sealed-tube diffusion of Ga, only Ga is diffused into the wafer 11 because the SiO2 film 12 acts as a protector against unnecessary impurities.
Therefore, it is possible to prevent a decrease in the lifetime of minority carriers, and also to prevent a decrease in breakdown voltage of the PN junction. According to experiments, in the case of the configuration obtained using the method shown in FIG. 1, the lifetime was 100 μS, but with the method shown in FIG. The time was reduced to 200 to 300 μs, a significant improvement. Particularly recently, the diameter of the wafers constituting power thyristors has tended to increase to 60 to 150φ.
In the method shown in FIG. 1, there is an increased risk of impurities other than Ga entering when forming the P-type layers 14 and 15, but in the method shown in FIG. 2, this risk is almost eliminated. Conventionally, a large number of dummy wafers 19 were arranged on the boat 18 for diffusion, but in the method shown in FIG.
Since it is protected by two films 12 and Ga is diffused,
The number of dummy wafers 19 is reduced, and instead, diffusion wafer 1
The number of 1's increases and productivity improves. In addition, when etching one side as shown in FIG. 4b, the etching amount is measured using a dial gauge.
Since it is very thin and hard, with a thickness of about 3 μm, the possibility of measurement errors is reduced, and therefore electrical characteristics (switching sensitivity, etc.) can be maintained well. It should be noted that the present invention is not limited to the above-mentioned embodiments, but can also be applied to the manufacture of rectifying elements, for example, by obtaining the three-layer structure shown in FIG. 2b and removing the P-type layer on one side. Various applications are possible. As explained above, according to the present invention, Ga is diffused in a sealed tube with a high concentration after the formation of a thermal oxide film, so that the electrical characteristics are improved. Since the semiconductor device (wafer) is etched, it is possible to provide a method for manufacturing a semiconductor device that has advantages such as being able to accurately etch the amount of etching.

[Brief explanation of the drawing]

Figures 1 a-c are explanatory diagrams of the manufacturing process of the conventional device, Figure 2 A,
b is an explanatory diagram of the process of one embodiment of the present invention, FIG. 3 is an explanatory diagram of the sealed tube diffusion step in the same process, and FIGS. 4A and b are diagrams of FIG. 2b.
It is a process explanatory diagram following the process of. 11...N-type wafer, 12...thermal oxide film, 13...
・Quartz tube, 14, 15...P type layer.

Claims (1)

[Claims] 1. A step of forming a high-temperature thermal oxide film on the entire surface of an N-type semiconductor substrate, and a step of performing sealed tube diffusion of gallium on the semiconductor substrate on which the thermal oxide film is formed to form a P-type impurity region. , a step of removing a thermal oxide film on one surface of the semiconductor substrate, and a sealed tube diffusion of the gallium formed on the one semiconductor substrate surface using the thermal oxide film remaining on the other surface of the semiconductor substrate as a protector. 1. A method of manufacturing a semiconductor device, comprising: etching at least a portion of a P-type impurity region; and forming an N-type impurity region on the etched surface of the semiconductor substrate.