JPS59100563A - Manufacture of mesa type semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the cracking of a wafer, which occurs during the manufacturing processes and to prevent the decrease in a yield rate, by forming mesa grooves on the wafer except the peripheral edge of the wafer. CONSTITUTION:Thermally oxidized films 3 are formed on both surfaces of a large area N type silicon wafer 1. Then, one oxidized film is removed. P type impurities are diffused and a P<+> region is formed. Then a P-N junction 2 is formed. The oxidized film on the P<+> region on the wafer is divided into elements. At this time, windows are selectively opened in the oxidized film, which is deposited on the parts located at the surrounding parts of the elements. Mesa grooves 7 are formed by chemical etching. At this time, an end 7a of each mesa groove 7 is terminated in front of the peripheral edge of the wafer 1. Then, the cracking of the wafer, which occurs during the manufacturing processes, can be prevented, and the yield rate is improved. Handling of the wafer also becomes easy.

Description

[Detailed Description of the Invention] Technical Field The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a mesa-type semiconductor device in which the periphery of a semiconductor element substrate on which a pn junction or the like is formed is processed into a mesa shape. be.

<Prior Art> Among various semiconductor devices, a mesa structure is often used, for example, in order to increase the breakdown voltage.

That is, as shown in FIG. 1(a), after a pn junction 2, a surface oxide film 3, etc. required for each semiconductor element such as a diode and a transistor are appropriately formed on a semiconductor wafer 1, a layer is formed on the boundary of each element region. The mesa groove 4 reaching the pn junction 2 is processed by etching or the like, and is divided into each element region as shown in FIG. 1(b). An electrode 5 and a passivation film 6 are formed on the surface of the semiconductor substrate that becomes each divided element, and the wafer is separated into each element as shown in FIG. 1(c).
) becomes a mesa-type semiconductor device.

In manufacturing the above-mentioned semiconductor device, a large-area semiconductor wafer is usually used to increase productivity, and a large number of semiconductor elements are simultaneously fabricated two-dimensionally on this wafer, and in a later process, each unit of semiconductor element is The process of dividing into

When manufacturing a mesa-type semiconductor device using a semiconductor wafer as described above, the processing of the mesa groove 4 is performed in the middle of the process when the wafer is in a state in which a large number of elements are two-dimensionally fabricated. As shown in the figure, this is applied over the entire area of the semiconductor wafer 1. In this way, semiconductor wafer 1
When mesa grooves are machined over the entire area of the wafer, especially to the peripheral edge of the wafer, cracks often occur along the wafer 1 or mesa groove 4 during subsequent processes, which may hinder subsequent processing. This not only causes problems, but also becomes a major cause of a decrease in yield.

<Purpose of the Invention> The present invention has been made in view of the above-mentioned problems in the conventional manufacturing process of mesa-type semiconductor devices, and has a simple structure that prevents cracking of semiconductor wafers that occurs during the process and prevents a reduction in yield. How can it be manufactured? It is to provide.

<Example> The process of manufacturing a high voltage diode will be described.

An oxide film is created on both sides of a large-area n-type silicon wafer by thermal oxidation, and then the oxide film covering one surface is removed.
Exposing the silicon wafer surface 0 Exposed wafer 1
A p-type impurity is diffused into the − plane to form a p+ region, and a pn junction is created. The silicon wafer on which the p-n junction had been formed was exposed to a thermal oxidation atmosphere again to form an oxide film on the surface of the p-10 region.Next, the oxide film on the p-10 region was divided into each element. A window is selectively opened in the oxide film deposited on the area around the device using photoetching technology, and then the remaining oxide film is used as a mask to dry the silicon wafer using a mixture of nitric acid and hydrofluoric acid. No.1-
chemically etched. That is, a mesa groove passing through the pn junction is two-dimensionally machined on one surface of the ji bar in order to increase the withstand voltage. As shown in FIGS. 3 and 4, the mesa grooves are formed on a large-area silicon wafer 1 without the end 7a of each mesa groove 7 reaching the peripheral edge of the wafer 1. A mask is used which is positioned to a dimension that terminates in front of the peripheral edge, and the mesa groove 7 is etched using this mask. The silicon wafer in which the mesa groove has been formed is subjected to passivation, electrode formation, and dicing using known techniques to obtain a mesa-type cavity surface pressure diode.

In the manufacturing process mentioned above, the silicon wafer 1- is formed excluding the mesa groove or the wafer peripheral edge, so it is possible to prevent the wafer λ- from cracking that occurs during the manufacturing process, and it is easy to handle the wafer 1-. It is possible to easily improve the yield.

Note that the mesa grooves to be formed on the wafer are not limited to being formed on one side as in the above embodiments, but the present invention can also be applied to processes in which the mesa grooves are formed on both sides.

<Effects> According to the present invention, it is possible to facilitate the handling of wafers during the mesa semiconductor device process and improve the yield of the device.

[Brief explanation of the drawing]

1(a) to 1(C) are cross-sectional views for explaining the manufacturing process of a mesa-type semiconductor device, and FIG. 2 is a plan view of the wafer 1 during the conventional process. The figure is a plan view of an embodiment of the present invention. l: Silicon wafer 7: Mesa groove 7a: To mesa groove l
End 64, No. 1, Section 2, Section 3, Fig. 4

Claims (1)

[Claims] 1. In a method of manufacturing a mesa type semiconductor device by forming all mesa grooves at the boundaries of unit regions from a semiconductor wafer in which a region having a pn junction is repeatedly formed in two dimensions, after the pn junction is formed, the unit region A method for manufacturing a mesa-type semiconductor device, characterized in that the mesa groove formed at the boundary is terminated before reaching the peripheral edge of the semiconductor wafer.