JPH01223741A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To improve the degree of integration of a semiconductor element by forming an isolating oxide film of the element in a MOS integrated circuit in a trench provided to a semiconductor substrate. CONSTITUTION:A thin oxide film 2 is formed onto a P-type silicon substrate 1, an silicon nitride film 3 is shaped onto the oxide film 2, and the silicon nitride film 3 is patterned through photo-lithography, and left only on an element forming region. Masks composed of photoresist films 4 are shaped, the oxide films in the periphery of the silicon nitride films 3 are removed through anisotropic etching, and trenches 5 in approximately 2mum depth and approximately 3000Angstrom width are formed to the silicon substrate. The photoresist films 4 are gotten rid of, and the whole is positioned to an oxide film shape. When an silicon crystal is oxidized, the trenches 5 in the silicon substrate are filled with an silicon oxide and element isolation oxide films 6 are formed because oxide film layers bite into the silicon crystal by approximately 45% of film thickness and approximately 55% as the remainder is projected. Accordingly, since the trenches 5 in width of approximately 3000Angstrom are shaped and the silicon crystal is oxidized, the element isolation oxide films 6 in approximately 5000Angstrom width can be formed, thus remarkably improving the degree of integration of an element.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor device and a method for manufacturing the same, and in particular to a MOS
The present invention relates to a type integrated circuit and a manufacturing method thereof.

[Conventional technology]

In a conventional MOS type integrated circuit, as shown in FIG. 2, a thick element isolation oxide film 6A is formed between elements by selective oxidation, and a thick element isolation oxide film 6A is formed along the outer periphery of the transistor under the element isolation oxide film 6A. Electrical isolation between elements was achieved by forming a P-type impurity diffusion layer (hereinafter referred to as a channel stopper) 9 in a P-type silicon substrate 1.

To form the element isolation oxide film 6A by the selective oxidation method,
In order to alleviate the stress on the semiconductor substrate that occurs when forming a thick oxide film, a thin oxide film 2 is first deposited on a P-type silicon substrate 1.
Next, a silicon nitride film 3 is formed thereon and patterned. Next, by placing the entire device in an oxidized state, a thick element isolation oxide film 6A is formed only in areas where the silicon nitride film 3 is not present.

[Problem to be solved by the invention]

In the conventional MOS integrated circuit described above, the effect of electrical isolation between elements is achieved by thick element isolation oxide M formed between elements.
This was achieved by the width of 6A and the channel stopper 9 formed under the element isolation oxide film 6A.

However, when the element isolation oxide film 6A is formed by the selective oxidation method, oxidation also progresses below the silicon nitride film 3 of the mask, resulting in so-called bird's beaks. This diagonal element forming area becomes narrower, which hinders the integration of elements and has the disadvantage that controllability of element dimensions becomes worse.

[Means to solve the problem]

A semiconductor device of the present invention is a semiconductor device having an element isolation oxide film, and the element isolation oxide film is formed in a vortex provided on a semiconductor substrate.

Further, the method for manufacturing a semiconductor device of the present invention includes a step of sequentially forming an oxide film and a nitride film on a semiconductor substrate, a step of patterning the nitride film and leaving it only on an element formation region, and a step of patterning the nitride film and leaving the remaining nitride film only on an element formation region. The method includes the steps of removing the oxide film along the outer periphery of the semiconductor substrate, forming a groove in the semiconductor substrate, and then oxidizing the semiconductor substrate to form an element-sized N oxide film in the groove.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(d) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining one embodiment of the present invention.

First, as shown in FIG. 1(a), a P-type silicon substrate 1
A thin oxide film 2 is formed on the oxide film 2, and a silicon nitride film 3 is further formed on the silicon nitride film 3.The silicon nitride film 3 is then patterned by photolithography so as to remain only in the region where the element is to be formed.

Next, as shown in FIG. 1(b), after forming a mask consisting of a photoresist film 4, anisotropic etching is performed.
A groove 5 having a depth of about 2 μm and a width of about 3000 mm is formed in the silicon substrate, excluding the oxide film around the eyebrows of the silicon nitride film 3.

Next, as shown in FIG. 1C, after removing the photoresist film 4, the entire structure is placed in an oxidized state. When the silicon crystal is oxidized, the oxide film layer sinks into the silicon crystal by about 45% of its thickness and rises by the remaining 55%, so the groove 5 in the silicon substrate is filled with silicon oxide and the element isolation oxide film 6 is formed. It is formed.

As shown in FIG. 1(d), after the gate electrode 7 is formed, N-type impurity ions are implanted to form source/drain diffusions N8.

In the conventional manufacturing method, the oxide film penetrates into the silicon nitride film as a mask by 1.5 μm or more for an element isolation oxide film having a width of 1 μm.

Therefore, it has been difficult to reduce the width of the element isolation region between transistors to 4 μm or less.

However, according to the above embodiment, by forming grooves 5 with a depth dimension of about 2 μm and a width of about 3000 between the elements and oxidizing them, an element isolation oxide film 6 with a width of about 5000 is formed. Since it can be formed, the integration of elements is significantly improved.

In the above embodiment, a P-type impurity is introduced into the bottom surface of the groove 5, and the element number III! A channel stopper may be provided below the oxide film 6.

〔Effect of the invention〕

As explained above, the present invention has the following advantages: By forming an element isolation oxide film of a semiconductor device in a groove provided in a semiconductor substrate,
This has the effect of improving the integration of elements.

[Brief explanation of the drawing]

FIGS. 1(a) to (d) are cross-sectional views of a semiconductor chip shown in order of steps for explaining an embodiment of the present invention, and FIG. 2 is a cross-sectional view of a semiconductor chip for explaining a conventional method of manufacturing a semiconductor device. FIG. 3 is a cross-sectional view of the chip. 1... P-type silicon substrate, 2... oxide film, 3...
Silicon nitride film, 4... Photoresist film, 5...
Groove, 6.6A... Element isolation oxide film, 7... Gate electrode, 8... Source/drain diffusion layer, 9... Channel stopper.

Claims (2)

[Claims] (1) A semiconductor device having an element isolation oxide film, wherein the element isolation oxide film is formed in a groove provided in a semiconductor substrate. (2) A step of sequentially forming an oxide film and a nitride film on a semiconductor substrate, a step of patterning the nitride film and leaving it only on the element formation region, and a step of forming the oxide film along the outer periphery of the remaining nitride film. 1. A method of manufacturing a semiconductor device, comprising the steps of: removing and forming a groove in the semiconductor substrate; and then oxidizing to form an element isolation oxide film in the groove.