JPH0645617A - Manufacture of single-crystal thin-film member - Google Patents

Abstract

PURPOSE:To obtain a single-crystal thin-film member wherein an irregularity in the size of a thin-film part is eliminated, the inessential etching of the outer circumferential part of a silicon substrate is prevented and it is not required to vapor-deposit a metal thin film. CONSTITUTION:In the manufacturing method of a single-crystal thin-film member, a process wherein a region 11 into which n-type impurities at high concentration have been introduced in a p-type silicon substrate 10 is formed as well as an n-type high-concentration silicon layer 14 introduced deep into the region 11 at high concentration and an n-type high-concentration layer 18 connected to the n-type high-concentration silicon layer 14 are grown sequentially and a process wherein a prescribed region is electrochemically etched by making use of the n-type high-concentration layer 18 as an electrode are executed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a single crystal thin film member such as a diaphragm type silicon pressure sensor.

[0002]

2. Description of the Related Art Conventionally, as a technique in such a field,
For example, there is one as described in JP-A-2-203570. FIG. 3 is a sectional view of a manufacturing process of such a conventional single crystal thin film member, and FIG. 4 is a view showing another conventional manufacturing method of a single crystal thin film member.

First, as shown in FIG. 3A, a mask 2 such as a SiO ₂ film is formed on the entire surface of an n-type silicon substrate 1, and a predetermined region on the back surface of the n-type silicon substrate 1 is covered with the same mask 3. To selectively coat. Then, the n-type silicon substrate 1 is immersed in an etchant such as KOH or EPW (water of ethylenediamine pyrocatechol).

Then, as shown in FIG. 3B, a region of the back surface of the n-type silicon substrate 1 which is not covered with the mask 3 is etched, and after a predetermined time has passed, the n-type silicon substrate 1 is taken out from the etchant. The n-type silicon thin film 4 is formed in this region x by cleaning with this. The n-type silicon substrate 1 has a thickness of several hundred μm. Then, for example, the etching rate when the crystal orientation is (100) is usually 6 μm / min, and the etching rate when the crystal orientation is (110) is usually 11 μm / min.

Therefore, a depth of 100 to 200 μm is removed by etching for 10 to 20 minutes. In this case, the composition of the etchant is, for example, 50 in order to form the silicon thin film 4 having a predetermined thickness.
It is necessary to keep the etching rate constant by controlling the concentration with a densitometer so that the concentration becomes% KOH and by controlling the liquid temperature of the etchant to a predetermined temperature within 110 to 120 ° C. with high accuracy.

However, even if such concentration control and temperature control are performed, the stability of the etching rate of silicon is not sufficient. Further, the thickness of the silicon substrate usually has a variation of ± 10 to 15 μm locally or between lots. For this reason, it is necessary to etch and remove most of the substrate having a thickness of several hundreds of μm to form a thin film having a thickness of several μm uniformly and with high yield. Considering the variation in the thickness of the silicon substrate, it is extremely difficult.

As a method of eliminating the drawbacks of the thin film forming method by wet etching and forming a highly accurate thin film, there is a method of forming a silicon thin film by electrochemical etching. In this electrochemical etching method, as shown in FIG. 4, an n-type epitaxial silicon layer 6 is formed on the surface of a p-type silicon substrate 5, and a mask 7 such as a SiO ₂ film is further formed on the n-type silicon layer 6. At the same time, a similar mask 8 is selectively formed on the back surface of the p-type silicon substrate 5. Then, the electrode 9 is provided on the n-type silicon layer 6, the substrate is immersed in the etchant, a positive voltage is applied to the n-type silicon layer 6 through the electrode 9, and a negative voltage is applied to the etchant side. As a result, the p-type silicon substrate 5 that is not covered with the mask 8 is etched. In this case, since only the p-type silicon substrate 5 is etched and the n-type silicon layer 6 is not etched under the above voltage condition, an n-type silicon thin film made of the n-type silicon layer 6 having a predetermined thickness is formed.

[0008]

However, in the above-mentioned conventional method, although the thickness of the thin film can be controlled to a predetermined thickness, the variation of the dimension x of the thin film portion caused by the variation in the thickness of the silicon substrate can be controlled. Couldn't control until. Further, since the electrochemical etching etches the silicon substrate for a long time, the etching extends to the outer peripheral portion of the silicon substrate and destroys the outer peripheral shape, making it impossible to detect the orientation flat necessary for the process. In addition, there is a problem that vapor deposition of a metal film is required.

In order to solve the above problems, the present invention provides
An object of the present invention is to provide a method for producing a single crystal thin film member that eliminates the above-mentioned variation in the dimensions of the thin film portion, prevents unnecessary etching on the outer peripheral portion of the silicon substrate, and does not require vapor deposition of a metal thin film. .

[0010]

In order to achieve the above object, the present invention is a method of manufacturing a single crystal thin film member in which a second conductivity type semiconductor layer is deeply introduced into a first conductivity type semiconductor substrate at a high concentration. A step of forming a second-conductivity-type high-concentration epitaxial layer connected to the second-conductivity-type semiconductor layer, and a step of performing electrochemical etching on a predetermined region using the epitaxial layer as an electrode. It was done.

[0011]

According to the present invention, since it is configured as described above,
Since the region where the n-type impurity is introduced at a high concentration can be used as an electrode, it is possible to supply a current to the silicon substrate without forming a metal film during the electrochemical etching. Further, by selectively forming a region into which n-type impurities are introduced at a high concentration, etching by electrochemical etching can be stopped only in a predetermined region. Therefore, when manufacturing a diaphragm-type silicon pressure sensor or the like. Moreover, the film thickness and thin film dimensions of the diaphragm portion can be accurately finished to predetermined values.

[0012]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a sectional view of a main part manufacturing process of a single crystal thin film member showing an embodiment of the present invention, and FIG. 2 is a view showing a first manufacturing process of a single crystal thin film member showing an embodiment of the present invention. 2A is a cross-sectional view thereof, and FIG. 2C is a rear view thereof.

First, as shown in FIG. 2B, for example,
P-type silicon substrate 1 having a thickness of 200 to 500 μm
0 is used to selectively introduce an n-type impurity at a high concentration to form the region 11 deep (15 to 20 μm). In that case,
As shown in FIG. 2A, a non-introduced portion 12 that determines the dimensions of the thin film portion is formed on the surface of the silicon substrate 10. Similarly, as shown in FIG. 2C, the etching opening 1 for forming a thin film portion is formed on the back surface of the P-type silicon substrate 10.
3 is formed.

The size of the etching opening 13 is determined by the size of the non-introduced portion 12 due to the characteristics of wet etching. Here, the misalignment is expected and the size of the etching opening 13 is set large. The region 11 into which the n-type impurity is introduced at a high concentration plays a role of an etching stopper in the electrochemical etching. The region 11 in which the n-type impurity is introduced at a high concentration is the p-type silicon substrate 1
Since it extends to the side surface of 0, the p-type silicon substrate 10
Plays a role of protecting the shape of the outer periphery of the.

Then, as shown in FIG.
The high-concentration n-type silicon layer 14 and the n-type silicon layer 15 are epitaxially grown on the surface of the silicon substrate into which the type impurities are introduced at a high concentration. The high-concentration n-type silicon layer 14 is for etching stop, and the n-type silicon layer 15 is for enabling the formation of a semiconductor circuit. The sum of the thickness of the high-concentration n-type silicon layer 14 and the thickness of the n-type silicon layer 15 becomes the thickness of the thin film portion as it is.

Next, as shown in FIG. 1B, Si is used as a mask film 17 in the electrochemical etching.
An N / SiO ₂ film or the like is selectively formed. A mask film 17 is formed on the outer peripheral portion of the p-type silicon substrate 10 and the n-type silicon layer.
To form an area not covered by
The n-type high concentration layer 18 is formed by introducing the type impurities at a high concentration. The n-type high concentration layer 18 is used as a low resistance electrode region. After that, the opening 20 for electrochemical etching is provided in the mask film 17. The reason why the opening 20 is provided after the formation of the n-type high concentration layer 18 is to prevent the introduction of an n-type impurity into the p-type silicon substrate 10.

When performing the electrochemical etching, the n-type high-concentration layer 18 is used as an electrode to lead out a wire, which is connected to the positive terminal and the mask film is formed by the electrochemical etching in which the substrate is immersed in an etchant. The p-type silicon substrate 10 is etched from the region not covered with 17 with a certain regularity. In this electrochemical etching,
The etching of silicon proceeds only in the p-type silicon substrate 10, and when the high-concentration n-type silicon layer 14 and the region 11 into which a high concentration of n-type impurities are introduced are exposed, this etching stops.

Therefore, in the electrochemical etching step, the high-concentration n-type silicon layer 14 and the n-type silicon layer 15 remain with the thickness before etching,
As shown in FIG. 1B, the thin film portion 19 can be formed. In terms of the dimensions of the thin film portion, since the etching does not proceed in the region 11 into which the n-type impurity is introduced at a high concentration, the etching proceeds only from the etching opening 13 where the n-type impurity is not introduced. Since the etching opening 13 which is the non-introduced portion of the n-type impurity is larger than the calculated value, when the etching reaches the region 11 in which the n-type impurity is introduced at a high concentration, the size of the thin film portion is not determined. The etching is wider than that of the introduction portion 12.

Thereafter, as shown in FIG. 1C, when the etching is further advanced, the etching does not proceed in the region 11 into which the n-type impurity is introduced at a high concentration. Only part 12 is etched.
At this time, the step 16 is formed by the region 11 into which the n-type impurity is introduced at a high concentration, and this portion is deeply introduced (15 to 20 μm) at the time of introducing the n-type impurity to obtain a necessary and sufficient thickness. Therefore, there is no effect on the thin film portion.

In this way, the thickness and dimensions of the thin film portion can be finished to predetermined values. In FIG. 1C, reference numeral 21 is an electrode to which a negative potential is applied for etching. The same applies to the side surface portion of the p-type silicon substrate 10, and the region 11 in which n-type impurities are introduced at a high concentration
Since etching is formed, the etching stops.

The present invention is not limited to the above embodiments, and various modifications can be made within the scope of the present invention, which are not excluded from the scope of the present invention.

[0022]

As described above in detail, according to the present invention, the region in which the n-type impurity is introduced at a high concentration can be used as an electrode, so that a metal film is not formed during the electrochemical etching. , Can supply current to the silicon substrate. Furthermore, by selectively forming a region into which n-type impurities are introduced at a high concentration, etching by electrochemical etching can be stopped only in a predetermined region, so that a diaphragm-type silicon pressure sensor or the like is manufactured. At that time, the film thickness and the thin film dimension of the diaphragm portion can be accurately finished to predetermined values. At the same time, the region where the n-type impurity is introduced at a high concentration is
It also has the effect of preventing the shape of the outer peripheral portion of the silicon substrate from being deformed against electrochemical etching for a long time.

During the epitaxial formation, the n-type high-concentration epitaxial layer for etching stop and the normal n-type epitaxial layer are formed in two layers.
A semiconductor circuit can be easily formed on the surface.

[Brief description of drawings]

FIG. 1 is a sectional view of a main part manufacturing process of a single crystal thin film member showing an example of the present invention.

FIG. 2 is a diagram showing a first manufacturing process of a single crystal thin film member showing an example of the present invention.

FIG. 3 is a sectional view of a manufacturing process of a conventional single crystal thin film member.

FIG. 4 is a diagram showing another conventional method for manufacturing a single crystal thin film member.

[Explanation of symbols]

 10 P-type silicon substrate 11 Region where n-type impurities are introduced at high concentration 12 Non-introduced part 13 Etching opening for forming thin film portion 14 High-concentration n-type silicon layer 15 n-type silicon layer 16 Step 17 Mask film 18 n-type high concentration Layer 19 Thin film portion 20 Electrochemical etching opening 21 Electrode

Claims (1)

[Claims] 1. A step of (a) introducing a second conductive type semiconductor layer into a first conductive type semiconductor substrate at a high concentration and deeply, and (b) a second conductive type semiconductor layer connected to the second conductive type semiconductor layer. A method for manufacturing a single crystal thin film member, which comprises performing a step of forming a high-concentration epitaxial layer and (c) performing a step of performing electrochemical etching on a predetermined region using the epitaxial layer as an electrode.