WO2011013290A1

WO2011013290A1 - Method for manufacturing semiconductor device

Info

Publication number: WO2011013290A1
Application number: PCT/JP2010/003994
Authority: WO
Inventors: 名古屋孝俊; 高見澤彰一; 佐山隆司
Original assignee: 信越半導体株式会社
Priority date: 2009-07-30
Filing date: 2010-06-16
Publication date: 2011-02-03
Also published as: JP5029661B2; JP2011035069A

Abstract

Disclosed is a method for manufacturing a semiconductor device, which has: a step of epitaxially growing an N-type epitaxial layer, which is to be an etch stop layer and has an N-type conductivity, and a semiconductor epitaxial layer for forming a semiconductor element in this order on one main surface of a silicon single crystal substrate having a P-type conductivity; a step of forming the semiconductor element on the semiconductor epitaxial layer for forming the semiconductor element; a step of bonding a retaining substrate on the surface having the semiconductor element formed thereon; and a step of removing the P-type silicon single crystal substrate by electrochemical etching with the N-type epitaxial layer as the etch stop layer, by applying a positive voltage to the N-type epitaxial layer. Thus, the thickness of the semiconductor epitaxial layer to be an active region in a back-illuminated image pickup element and the like can be easily managed to be a desired thickness without using an SOI substrate, and gettering of contaminating impurities can be smoothly performed.

Description

Manufacturing method of semiconductor device

The present invention relates to a method for manufacturing a semiconductor device, and more specifically, to a method for manufacturing a semiconductor device in which a back-illuminated imaging element or the like is formed on an epitaxial layer made of a semiconductor such as silicon.

In recent years, the miniaturization of image pickup devices has progressed. In particular, in CMOS image sensors, the number of wiring layers has increased, making it difficult for light to enter from the surface side.
In view of this, a backside-illuminated imaging device having a structure in which visible light is incident from the backside of the semiconductor substrate has been proposed (see, for example, Patent Documents 1 to 4) and is being used specifically.

Specifically, the back-illuminated imaging element is formed by forming a wiring layer on the surface side of the epitaxial layer from the viewpoint of improving the aperture ratio for recent light reception and improving the flexibility of the layout of the wiring layer, The light is incident from the back side of the epitaxial layer so that it can be imaged. The light is incident from the back side of the epitaxial substrate, the incident light is photoelectrically converted in the semiconductor substrate, and the generated signal charge is converted to the surface. It has a configuration for reading from the side.

In an SOI (Silicon on Insulator) substrate normally used for manufacturing a back-illuminated imaging device, an insulating layer such as a silicon oxide (SiO ₂ ) layer is formed on the surface of a silicon single crystal substrate, and silicon or the like is formed thereon. A semiconductor epitaxial layer whose thickness is increased through an epitaxial process is formed. A CCD or CMOS image sensor is formed on the semiconductor epitaxial layer. Thereafter, the silicon single crystal substrate is removed from the back surface side by grinding or etching, the insulating layer is exposed, and a color filter or a microlens is formed on the back surface.

JP 2006-19360 A JP 2008-177487 A JP 2003-273343 A JP 2009-16431 A

By the way, even in the manufacturing process of the back-illuminated imaging device, the imaging device is very sensitive to metal contamination in the material substrate device process, so that some gettering ability is given to the substrate even in the conventional structure. is doing. A gettering layer for gettering metal impurities is usually formed outside the active region of the semiconductor epitaxial layer.
However, in the manufacturing process of the image sensor as described above, there are restrictions on the formation of the gettering layer.

For example, when a back-illuminated imaging device is formed on a silicon semiconductor epitaxial layer of an SOI substrate, a gettering layer is generally formed on a silicon single crystal substrate facing the SOI layer with the silicon oxide layer interposed therebetween. It is. However, in this case, the silicon oxide layer becomes a barrier for diffusion of metal impurities, and the metal that enters the semiconductor epitaxial layer cannot be gettered.

Also, the removal process of the silicon single crystal substrate on the back side is essential, but this removal process is performed by grinding, polishing, etching, etc., but is very unstable. This is because although the thickness of the silicon single crystal substrate to be removed is known to some extent, it is very difficult to stop the removal at a desired position, and it has not been possible to remove it stably.

And, since the SOI substrate is usually manufactured using two silicon single crystal substrates, it becomes very expensive. Therefore, a semiconductor device manufactured using an expensive SOI substrate is naturally expensive and has a problem. In particular, in order to avoid the influence of resistance fringes derived from CZ crystals in an image pickup device substrate, it is necessary to use a device formation region as an epitaxial layer. Therefore, instead of a normal SOI substrate, an ion implantation separation method (smart cut (registered) Also, the epitaxial layer having a predetermined thickness is grown on the SOI substrate formed by the above method.

The present invention has been made in view of the above problems, and easily manages the thickness of a semiconductor epitaxial layer serving as an active region to a desired thickness without using an SOI substrate. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can perform gettering of contaminant impurities.

In order to solve the above problems, in the present invention, a semiconductor element is formed on one main surface of a silicon single crystal substrate having a conductivity type of P type and an N type epitaxial layer having an N type conductivity serving as an etch stop layer. Epitaxially growing the semiconductor epitaxial layer for forming the semiconductor element in this order, forming the semiconductor element on the semiconductor epitaxial layer for forming the semiconductor element, and attaching the holding substrate to the surface on which the semiconductor element is formed And a step of applying a positive voltage to the N-type epitaxial layer and removing the P-type silicon single crystal substrate by electrochemical etching using the N-type epitaxial layer as an etch stop layer. An apparatus manufacturing method is provided.

Thus, after epitaxially growing a semiconductor epitaxial layer for forming a semiconductor element on the N-type epitaxial layer serving as an etch stop layer and forming a semiconductor element such as a back-illuminated imaging element on the semiconductor epitaxial layer, The P-type silicon single crystal substrate is removed by electrochemical etching.
As a result, the P-type silicon single crystal substrate can be removed with very high accuracy compared to conventional grinding, polishing, and etching, and a semiconductor device having an active region with a desired thickness can be obtained.
Further, for example, an insulator can be formed on the etch stop surface after electrochemical etching, and an insulator having a good quality and a desired thickness can be easily formed. Therefore, the quality of the manufactured semiconductor element can be improved.

Furthermore, since the P-type silicon single crystal substrate used in the epitaxial growth process and the semiconductor epitaxial layer on which the semiconductor element is formed can be in contact with each other without an oxide film, for example, a getter is attached to the P-type silicon single crystal substrate. By imparting ring capability, the metal impurity concentration of the semiconductor epitaxial layer can be made extremely low, and the yield of the manufactured semiconductor device can be improved.
Further, a semiconductor device in which a semiconductor element such as an imaging element is formed can be manufactured without using an expensive SOI substrate, and a method for manufacturing a semiconductor device that is less expensive than the conventional one can be obtained.

Here, in the epitaxial growth step, it is preferable that the N-type epitaxial layer is epitaxially grown directly on the P-type silicon single crystal substrate.
As described above, by epitaxially growing the N-type epitaxial layer serving as the etch stop layer directly on the P-type silicon single crystal substrate, it is possible to remove only the P-type silicon single crystal substrate. Therefore, waste of the silicon single crystal substrate and the epitaxial layer can be eliminated, and the semiconductor device can be manufactured efficiently.

Further, the P-type silicon single crystal substrate is a substrate in which a polycrystalline silicon layer is formed on the main surface opposite to the main surface on which the N-type epitaxial layer is formed, or in the P-type silicon single crystal substrate. It is preferable to have oxygen precipitation nuclei.
As described above, in order to give a gettering capability to a P-type silicon single crystal substrate to be removed later, a polycrystalline silicon layer is formed on the back surface side, or oxygen precipitation nuclei are provided, so that gettering can be further performed. A P-type silicon single crystal substrate with high capability can be obtained, and a semiconductor device with fewer metal impurities in the active region can be manufactured. This is because it is not necessary to use an SOI substrate having a buried insulating film in the present invention, and gettering is not performed through an insulating film having a very low diffusion rate of metal impurities as in the prior art. The metal impurity concentration of the layer can be reduced.
Moreover, these methods are general, can be implemented easily, and are suitable in terms of cost.

In the electrochemical etching, the P-type silicon single crystal substrate is held on a substrate holder that covers at least the semiconductor epitaxial layer on which the semiconductor element is formed, and then the N-type epitaxial layer is used as an etch stop layer to form an alkaline electrolyte solution. It is preferable to immerse the substrate in water.
By performing the electrochemical etching by the method as described above, the semiconductor epitaxial layer in which the semiconductor element is formed can be reliably prevented from being etched. Further, since the etching is surely stopped when the N-type epitaxial layer is exposed, only the portion to be removed such as the P-type silicon single crystal substrate can be surely and easily removed.

Furthermore, it is preferable that after the semiconductor element forming step and before the bonding step, an electrode wiring is formed on the semiconductor element, and then the holding substrate is bonded to the surface on which the electrode wiring is formed.
In this way, by attaching the electrode wiring side to the holding substrate after forming the electrode wiring, a positive voltage can be easily applied to the N-type epitaxial layer, and electrochemical etching can be easily performed. Further, by grounding the electrode wiring in the step after being bonded to the holding substrate, static electricity or the like can be released to the ground through the electrode wiring. Therefore, the semiconductor element can be prevented from being destroyed by static electricity or the like, which is more preferable.

Moreover, it is preferable that the said holding substrate has an electrode which reaches the surface on the opposite side from the said bonding surface.
In this way, if the holding substrate has an electrode that reaches the opposite surface from the bonding surface, a positive voltage can be more easily applied to the N-type epitaxial layer, and electrochemical etching can be performed more easily. It can be carried out. Moreover, it can protect more easily from electrostatic breakdown.

The step of removing the P-type silicon single crystal substrate preferably includes performing the electrochemical etching after performing at least one of grinding, polishing, and etching on the P-type silicon single crystal substrate. .
In this way, instead of removing the P-type silicon single crystal substrate only by electrochemical etching, the P-type silicon single crystal substrate is removed to some extent in advance by a method such as grinding, polishing, and etching. Thus, the P-type silicon single crystal substrate can be completely removed, and the effect of shortening the working time of the process can be achieved.

Further, after the step of removing the P-type silicon single crystal substrate, it is preferable to polish the exposed electrochemical etch stop surface to remove the N-type epitaxial layer.
In this way, by removing the N-type epitaxial layer by polishing, the flatness of the surface irradiated with light, which becomes the light receiving surface, can be increased, and irregular reflection can be reduced and produced. The performance of the imaging device or the like can be made higher.

In the epitaxial growth step, a P-type low resistance layer and a P-type high resistance layer can be formed immediately above the N-type epitaxial layer. Alternatively, an N-type low resistance layer and an N-type high resistance layer can be formed directly on the N-type epitaxial layer. Furthermore, an N-type layer and a partial P-type low resistance layer in the N-type layer can be formed immediately above the N-type epitaxial layer.
As described above, the semiconductor epitaxial layer formed on the N-type epitaxial layer can have any configuration suitable for the semiconductor element to be manufactured, and the configuration is not particularly limited. A semiconductor epitaxial layer can be formed.

As described above, according to the present invention, for example, after introducing a semiconductor epitaxial layer for forming an N-type epitaxial layer and a semiconductor element on one main surface of a P-type silicon single crystal substrate having gettering capability, Form. Further, after that, a holding substrate is added, and the P-type silicon single crystal substrate can be removed by grinding or the like and electrochemical etching using the N-type epitaxial layer as an etch stop layer. A semiconductor device in which a color filter, a lens, and the like can be formed on the side subjected to electrochemical etching, and a high-performance semiconductor element having a desired thickness and a low metal impurity concentration in the active region is formed. Can be manufactured.

5 is a process flow illustrating an example of a method for manufacturing a semiconductor device according to the present invention. It is the schematic which shows the structure in the middle of the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is the schematic which shows the structure in the middle of the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is the schematic which shows the structure in the middle of the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is the schematic which shows the structure in the middle of the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is the schematic which shows the structure in the middle of the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is the schematic which shows the structure in the middle of the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is the schematic which shows the structure in the middle of the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is the schematic which shows the structure in the middle of the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is the schematic which shows the structure in the middle of the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is the figure which showed an example of the structure of the apparatus used in the case of the electrochemical etching in the manufacturing method of the semiconductor device of this invention. It is the schematic which showed typically the state of the voltage applied to the N type epitaxial layer in the case of the electrochemical etching of this invention, and a P type silicon single crystal substrate. In the manufacturing method of the semiconductor device of the present invention, it is a figure showing other examples of the P type silicon single crystal substrate in which the semiconductor epitaxial layer was formed. It is the process flow which showed an example of the manufacturing method of the conventional semiconductor device. It is the figure which showed the outline of an example of the backside illumination type semiconductor device. It is the figure which showed the outline of an example of the conventional semiconductor device.

Hereinafter, the present invention will be described in detail with reference to the drawings, but the present invention is not limited thereto.
As described above, the type of the semiconductor device 40 in which light is incident from the surface side has conventionally existed in the imaging element as shown in FIG.
This includes, for example, a silicon single crystal substrate 41, a P ⁺ layer 50, for example, a semiconductor element having an isolation trench 44a and a photodiode 44b, a wiring layer 46, a P ⁺ layer 43a, an insulating layer 48, a microlens 49a and a color filter 49b. And a passivation layer 49 having The light incident from the microlens 49 a is photoelectrically converted by the photodiode 44 b and read from the wiring formed in the wiring layer 46.

However, as shown in a portion surrounded by a dotted line in FIG. 16, light incident from the microlens 49a is blocked or scattered by the wiring of the wiring layer 46, the gate, the source, or the drain of the semiconductor element layer. There was a limit to the amount to reach 44b.

In order to solve this problem, a back-illuminated image sensor as shown in FIG. 15 has been developed.
This includes, for example, a holding substrate 17, a wiring layer 16, a semiconductor element having an isolation trench 14a and a photodiode 14b, a P ⁺ layer 13a, an insulating layer 18, a passivation layer 19 having a microlens 19a and a color filter 19b. Is. The light incident from the microlens 19 a is photoelectrically converted by the photodiode 14 b and read from the wiring formed in the wiring layer 16.

In the case of the semiconductor device as shown in FIG. 15, light can be incident from the surface of the wiring layer or semiconductor element layer where the gate, source, and drain are not formed, as shown by the portion surrounded by the dotted line. The amount of light reaching the photodiode 14b can be increased as compared with the surface incident type.

Such a semiconductor device can be manufactured, for example, by a manufacturing method as shown in FIG. First, an SOI substrate is manufactured by a general SOI substrate manufacturing method.
Specifically, a plurality of silicon single crystal substrates are prepared (step 1), an oxide film is formed on the silicon single crystal substrate (step 2), hydrogen ion implantation is performed (step 3), and the oxide film is formed. (Step 4). Then, the SOI substrate is obtained by peeling from the hydrogen ion implanted layer by heat treatment or the like (step 5).
In addition, the SOI substrate is annealed, and in some cases, further touch-polished, and the peeled surface is mirror-finished (smart cut method) (step 6). In the thickness of the I layer of a general smart cut SOI substrate, the depth of ion implantation is 0.5 μm, and even if it is hard, about 1 μm is the limit. It is insufficient. For this reason, after polishing the SOI layer, the I layer is used as a seed layer and is epitaxially grown on the SOI wafer (step 7).

Thereafter, a semiconductor element such as an image pickup element is formed (step 8), a holding substrate is bonded to the surface (step 9), and the silicon single crystal substrate is removed by grinding, polishing, and etching (step 10). Color filters, microlenses, and the like are formed on the surface on the side from which the substrate has been removed (step 11).

However, the conventional method for manufacturing a semiconductor device as shown in FIG. 14 is inevitably expensive because it is manufactured using an SOI substrate that requires two silicon single crystal substrates.
Further, even if gettering capability is imparted to the silicon single crystal substrate to be removed, gettering occurs through an oxide film in which the diffusion rate of metal impurities is very slow, so that the metal impurity concentration in the semiconductor element formation region is reduced. It was difficult to reduce.
The method of manufacturing the semiconductor device of the present invention has solved this problem.

Hereinafter, the method for manufacturing a semiconductor device of the present invention will be described with reference to the drawings, taking as an example the case of forming a back-illuminated CIS (CMOS image sensor), but is not limited thereto.
FIG. 1 is a process flow showing an example of a method for manufacturing a semiconductor device of the present invention. FIGS. 2 to 10 are schematic views showing the configuration of an intermediate stage of the semiconductor device manufacturing method according to the present embodiment.

First, as shown in Step 1 of FIG. 1 and FIG. 2, a P-type silicon single crystal substrate 11 is prepared.
The P-type silicon single crystal substrate prepared at this time is not particularly limited except that the conductivity type is P-type, and may be any generally used one. For example, a material prepared by slicing a silicon single crystal rod doped with a P-type dopant and grown by the CZ method may be used.

Here, the P-type silicon single crystal substrate to be prepared is one in which a polycrystalline silicon layer is formed on the main surface opposite to the main surface on which an N-type epitaxial layer is formed later, or the P-type silicon The single crystal substrate can have oxygen precipitation nuclei.
Thereby, the gettering capability of the P-type silicon single crystal substrate can be easily increased, and the metal impurity concentration in a region where a semiconductor element such as an imaging element to be formed later can be easily reduced. . Further, since the P-type silicon single crystal substrate is removed later, the metal impurities can be removed together with the P-type silicon single crystal substrate, which is more convenient.

Next, as an epitaxial growth step, an N-type epitaxial layer 12 is epitaxially grown on the main surface of the P-type silicon single crystal substrate 11 as shown in Step 2 of FIG. 1 or FIG.
In this way, the N-type epitaxial layer 12 can be directly epitaxially grown on the main surface of the P-type silicon single crystal substrate 11, whereby only the P-type silicon single crystal substrate can be removed by subsequent electrochemical etching. This eliminates the need for forming unnecessary layers and is efficient.

Next, as shown in step 3 of FIG. 1 and FIG. 3, a semiconductor epitaxial layer 13 is formed on the N-type epitaxial layer 12. Here, a P-type low resistance layer 13a and a P-type high resistance layer 13b are formed. This completes the epitaxial growth process.
Here, it is desirable that the thickness of the N-type epitaxial layer 12 and the P-type low resistance layer 13a be 3 μm or less. This is preferable because it does not require a long time for epitaxial growth.

Further, as shown in FIG. 13A, for example, a semiconductor epitaxial layer grown in this epitaxial growth step is formed on the P-type low resistance layer 33a directly on the N-type epitaxial layer 32 immediately above the P-type silicon single crystal substrate 31. The P-type high resistance layer 33b can be formed. Alternatively, as shown in FIG. 13B, the N-type low resistance layer 33a ′ and the N-type high resistance layer 33b ′ can be formed immediately above the N-type epitaxial layer 32 ′. Further, as shown in FIG. 13 (d), an N-type layer 33a ′ ″ and a partial P-type low resistance in the N-type layer 33a ′ ″ are directly above the N-type epitaxial layer 32 ′ ″. Layer 33b '''may be formed. Further, as shown in FIG. 13C, an N-type epitaxial layer 32 ″ can be epitaxially grown directly on the P-type silicon single crystal substrate 31.
A polycrystalline silicon layer 34 for gettering may be provided on the surface opposite to the side on which the N-type epitaxial layer or the like is formed.

In the method for manufacturing a semiconductor device of the present invention, a positive voltage is applied to the previously formed N-type epitaxial layer 12 and the P-type silicon single crystal substrate 11 is removed by electrochemical etching. Therefore, the semiconductor epitaxial layer 13 which becomes the semiconductor element formation region can have a structure optimal for the semiconductor element to be manufactured. For example, the structure as described above can be used, but it is not limited to this.

Thereafter, as shown in Step 4 of FIG. 1 and FIG. 4, a semiconductor element 14 is formed in the semiconductor epitaxial layer 13.
In this step, a conventional CMOS image sensor process can be basically used.
For example, as shown in FIG. 4, a relatively deep isolation trench 14a made of an insulator, a photodiode 14b, a source 14c, a drain 14d, and a gate 14e can be formed. At this time, it is more desirable to consider that alignment can be performed when the color filter and the microlens are formed on the back side.

Thereafter, as shown in FIG. 5, a wiring layer 16 having a wiring 16 a inside is formed on the semiconductor element 14.
The formation of the wiring layer is not particularly limited and may be three layers, four layers or more corresponding to the advancement of the peripheral CMOS image sensor.

Next, as shown in Step 5 of FIG. 1 and FIG. 6, the surface on which the semiconductor element 14 and the wiring layer 16 are formed and the holding substrate 17 are bonded together.
The bonding is desirably performed by aligning the electrode on the side where the semiconductor element is formed and the lead-out electrode of the holding substrate, and bonding them with solder or the like.
The holding substrate is not particularly limited, and for example, a glass substrate, a quartz substrate, a silicon substrate (with an oxide film), or the like can be used.

Thus, the side on which the electrode wiring is formed and the holding substrate can be bonded together.
Thus, by grounding the electrode wiring in the process after bonding the holding substrate, it is possible to suppress the semiconductor element from being destroyed by static electricity from an operator or the like in the subsequent process. Can be reduced. Further, a positive voltage can be easily applied to the N-type epitaxial layer, and electrochemical etching can be easily performed, which is more convenient.
At this time, it is more desirable to consider that the electrode can be taken out in a bonded state by any method.

Moreover, the holding substrate 17 can include the through electrode 20 that reaches the surface on the opposite side from the bonding surface.
Thereby, a positive voltage can be more easily applied to the N-type epitaxial layer, and the semiconductor element can be protected from electrostatic breakdown.

Thereafter, as shown in Step 6 of FIG. 1 and FIG. 7, the thickness of the P-type silicon single crystal substrate 11 can be reduced by performing at least one of grinding, polishing and etching.
In this way, the P-type silicon single crystal substrate is efficiently removed by thinning the P-type silicon single crystal substrate by at least one of grinding, polishing, and etching, which has a higher removal rate than electrochemical etching. Therefore, the working time of the removal process can be shortened.
When grinding is performed, it is desirable to perform grinding by setting a substrate after epitaxial growth with reference to the back surface side so that the ground surface is as parallel as possible to the interface.

Thereafter, as shown in Step 7 and FIG. 8 of FIG. 1, a positive voltage is applied to the N-type epitaxial layer 12, and the P-type silicon single crystal substrate 11 is removed by electrochemical etching.
For example, as shown in FIG. 11, after holding the P-type silicon single crystal substrate 11 on the substrate holder 25 so as to cover at least the semiconductor epitaxial layer on which the semiconductor element is formed, the N-type epitaxial layer 12 is formed as an etch stop layer. As described above, it is performed by immersing in an alkaline electrolyte solution 21 and applying a voltage between the N-type epitaxial layer 12 and the working electrode 22 so that the N-type epitaxial layer 12 has a positive potential. it can. Further, it is more desirable to use the reference electrode 23 and the potentiostat 24 in order to control the applied voltage to be constant.

The case where KOH is used as an alkaline electrolyte solution will be described as an example. In the state where a positive voltage is applied to the N-type epitaxial layer in an aqueous solution of KOH (concentration around 40%), etching is advanced electrochemically.
For example, while the P-type silicon single crystal substrate is exposed to the KOH solution, as shown in FIG. 12, the substrate surface is at an open circuit voltage (OCP), and etching proceeds in the same manner as in a normal soaked state in KOH. . In addition, a depletion layer is formed on the P-type silicon single crystal substrate, and no voltage is applied to a place away from the interface.
When the P-type silicon single crystal substrate is etched and the N-type epitaxial layer to which a positive voltage is applied is exposed to the solution, anodic oxidation proceeds on the surface, a thick non-conductive film is formed, and etching is not performed. Thereby, the etching can be stopped at the N-type epitaxial layer.

By performing electrochemical etching in the above-described manner, only the P-type silicon single crystal substrate can be removed reliably and easily. Moreover, it can suppress easily that the semiconductor epitaxial layer in which the semiconductor element was formed is etched, and it can suppress that a malfunction arises in an element formation area.

The alkaline electrolyte solution used for etching is preferably KOH, a concentration of about 40%, and a liquid temperature of 50 to 60 ° C. However, it is not limited to KOH or the above conditions, and other TMAH (tetramethylammonium hydroxide aqueous solution) or ethylenediamine aqueous solution can achieve the same effect.

Next, as shown in Step 8 of FIG. 1 and FIG. 9, the N-type epitaxial layer 12 can be removed by polishing.
Thereby, irregular reflection of light received by an imaging element or the like formed on the side where the N-type epitaxial layer is formed can be reduced, and the performance of the manufactured semiconductor device can be improved.

Thereafter, as shown in Step 9 and FIG. 10 of FIG. 1, an insulating layer 18 that is transparent to incident light, and a semiconductor element based on the insulating layer 18 and the P-type high resistance layer 13b are formed. A passivation layer 19 having a high refractive index that is transparent to incident light can be formed to prevent reflection of light due to a difference in refractive index from the formed layer. In addition, microlenses 19a and color filters 19b can be formed on the passivation layer 19, and the semiconductor device 10 can be manufactured by forming such elements.

By such a method for manufacturing a semiconductor device of the present invention, an insulating layer, a color filter, a microlens, or the like can be formed on a highly flat surface layer that has been subjected to electrochemical etching, and a desired thickness can be obtained. It can have. Further, for example, an N-type epitaxial layer or a semiconductor epitaxial layer on which a semiconductor element is formed can be formed on a P-type silicon single crystal substrate having gettering capability without an insulating film, so that the metal in the active region The impurity concentration can be made lower than conventional.
And it can manufacture from an epitaxial substrate instead of an SOI substrate, and can be made cheaper than before.
Therefore, it is possible to manufacture a semiconductor device in which a high-performance and inexpensive backside-illuminated imaging element having a low metal impurity concentration is formed.

EXAMPLES Hereinafter, although an Example is shown and this invention is demonstrated more concretely, this invention is not limited to this.
(Example)
A semiconductor device was manufactured according to the process as shown in FIG.
First, a P-type silicon single crystal substrate having a P-type crystal plane (100), 10 Ωcm, a diameter of 8 inches (200 mm), an oxygen concentration of 15 ppma, and a heat treatment for precipitation of oxygen precipitates was prepared.
Next, an N-type epitaxial layer having an N-type resistivity of 1 Ωcm and a thickness of 3 μm was grown using a single-wafer reactor at 1150 ° C. using trichlorosilane as a source gas. Thereafter, a P-type low-resistance layer having a P-type resistivity of 0.1 Ωcm and a thickness of 1.5 μm was epitaxially grown, and then a P-type resistivity of 20 Ωcm and a thickness of 6 μm was epitaxially grown. .

Thereafter, a CMOS image sensor as shown in FIG. 4 was produced on the produced P-type high resistance layer. Thereafter, a wiring layer as shown in FIG. 5 was formed.
Then, after bonding the surface on which the wiring layer was formed and the holding substrate, in removing the P-type silicon single crystal substrate, first, the thickness of the substrate was ground to about 10 μm by grinding.
After that, grinding is performed by applying a potential to a KOH aqueous solution having a liquid temperature of 50 ° C. and a concentration of 30% so that the N type epitaxial layer becomes +1.5 V at the interface between the N type epitaxial layer and the P type silicon single crystal substrate. The P-type silicon single crystal substrate remaining in step 1 was removed by electrochemical etching.

Thereafter, in order to make the etch stop surface completely mirror-finished, the N-type epitaxial layer was removed by polishing using a colloidal silica abrasive.
Next, a low-temperature oxide film was formed on the surface from which the N-type epitaxial layer was removed. The thickness was 500 nm. Thereafter, silicon nitride for passivation was formed by plasma CVD.
Thereafter, color filters and microlenses were formed to complete the semiconductor device.

Note that the flatness of the exposed N-type epitaxial layer was evaluated after electrochemical etching. As a result, the thickness variation was 0.2 to 0.3 μm, and it was found that the P-type silicon single crystal substrate could be removed with high accuracy. In the conventional grinding, polishing and etching, the limit is about ± 1 μm, and it was confirmed that the electrochemical etching of the present invention is excellent.

The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

Claims

On one main surface of a silicon single crystal substrate having a P-type conductivity, an N-type epitaxial layer having an N-type conductivity serving as an etch stop layer and a semiconductor epitaxial layer for forming a semiconductor element are epitaxially grown in this order. Process,
Forming the semiconductor element in a semiconductor epitaxial layer for forming the semiconductor element;
Attaching a holding substrate to the surface on which the semiconductor element is formed;
A step of applying a positive voltage to the N-type epitaxial layer and removing the P-type silicon single crystal substrate by electrochemical etching using the N-type epitaxial layer as an etch stop layer. Production method.
2. The method of manufacturing a semiconductor device according to claim 1, wherein in the epitaxial growth step, the N-type epitaxial layer is epitaxially grown directly on the P-type silicon single crystal substrate.
The P-type silicon single crystal substrate is a substrate in which a polycrystalline silicon layer is formed on the main surface opposite to the main surface on which the N-type epitaxial layer is formed, or oxygen is contained in the P-type silicon single crystal substrate. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor device has precipitation nuclei.
In the electrochemical etching, the P-type silicon single crystal substrate is held in a substrate holder that covers at least the semiconductor epitaxial layer on which the semiconductor element is formed, and then immersed in an alkaline electrolyte solution using the N-type epitaxial layer as an etch stop layer. The method for manufacturing a semiconductor device according to claim 1, wherein the method is performed.
The electrode wiring is formed on the semiconductor element after the semiconductor element forming step and before the bonding step, and then the holding substrate is bonded to the surface on the side where the electrode wiring is formed. The method for manufacturing a semiconductor device according to claim 1.
The method of manufacturing a semiconductor device according to claim 5, wherein the holding substrate has an electrode reaching the surface on the opposite side from the bonding surface.
The step of removing the P-type silicon single crystal substrate is characterized in that the electrochemical etching is performed after at least one of grinding, polishing, and etching is performed on the P-type silicon single crystal substrate. The method for manufacturing a semiconductor device according to claim 1.
8. The N-type epitaxial layer is removed by polishing the exposed electrochemical etch stop surface after the step of removing the P-type silicon single crystal substrate. A method for manufacturing a semiconductor device according to claim 1.
The said epitaxial growth process shall form a P-type low resistance layer and a P-type high resistance layer directly on the said N type epitaxial layer, The one of Claim 1 thru | or 8 characterized by the above-mentioned. Semiconductor device manufacturing method.
9. The epitaxial growth process according to claim 1, wherein in the epitaxial growth step, an N-type low resistance layer and an N-type high resistance layer are formed immediately above the N-type epitaxial layer. Semiconductor device manufacturing method.
2. The epitaxial growth step according to claim 1, wherein an N-type layer and a partial P-type low resistance layer are formed immediately above the N-type epitaxial layer. 9. A method for manufacturing a semiconductor device according to any one of items 8 to 9.