JPS6041249A - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPS6041249A
JPS6041249A JP14989583A JP14989583A JPS6041249A JP S6041249 A JPS6041249 A JP S6041249A JP 14989583 A JP14989583 A JP 14989583A JP 14989583 A JP14989583 A JP 14989583A JP S6041249 A JPS6041249 A JP S6041249A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
integrated circuit
circuit
hybrid integrated
base ribbon
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14989583A
Inventor
Naoharu Senba
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of H01L27/00 - H01L49/00 and H01L51/00, e.g. forming hybrid circuits
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor

Abstract

PURPOSE:To obtain an inexpensive hybrid integrated circuit having mass productivity and high reliability by providing an insulating layer on a base ribbon, further providing a circuit constituent, connecting an active element and a passive element, and resin-molding them. CONSTITUTION:An insulating layer 7 is formed on part of a base ribbon 1, and a circuit 6 of conductor is placed on the layer. Further, a semiconductor element 3, a resistor 8 and a capacitor 9 are placed on the circuit 6, and connecting wirings 2 are used to connect the necessary connections. Thus, even in a base ribbon system for facilitating the mass production and labor-saving, a hybrid integrated circuit can be manufactured.
JP14989583A 1983-08-17 1983-08-17 Hybrid integrated circuit device Pending JPS6041249A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14989583A JPS6041249A (en) 1983-08-17 1983-08-17 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14989583A JPS6041249A (en) 1983-08-17 1983-08-17 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPS6041249A true true JPS6041249A (en) 1985-03-04

Family

ID=15484962

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14989583A Pending JPS6041249A (en) 1983-08-17 1983-08-17 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6041249A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62265733A (en) * 1986-05-13 1987-11-18 Nec Corp Hybrid integrated circuit device
JPS6315447A (en) * 1986-07-07 1988-01-22 Nec Corp Hybrid integrated circuit device
US4908933A (en) * 1988-05-12 1990-03-20 Ibiden Co., Ltd. Method of manufacturing a substrate for mounting electronic components
US4949225A (en) * 1987-11-10 1990-08-14 Ibiden Co., Ltd. Circuit board for mounting electronic components
US5022960A (en) * 1989-05-01 1991-06-11 Ibiden Co., Ltd. Method of manufacturing circuit board for mounting electronic components
US5093713A (en) * 1989-01-30 1992-03-03 Kabushiki Kaisha Toshiba Semiconductor device package
US5096852A (en) * 1988-06-02 1992-03-17 Burr-Brown Corporation Method of making plastic encapsulated multichip hybrid integrated circuits
US5124783A (en) * 1989-01-30 1992-06-23 Kabushiki Kaisha Toshiba Semiconductor device having insulating substrate adhered to conductive substrate
US5446309A (en) * 1992-06-22 1995-08-29 Matsushita Electric Industrial Co., Ltd. Semiconductor device including a first chip having an active element and a second chip having a passive element
EP1396885A1 (en) * 2002-09-03 2004-03-10 Hitachi, Ltd. Resin moulded automotive electronic control unit

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62265733A (en) * 1986-05-13 1987-11-18 Nec Corp Hybrid integrated circuit device
JPS6315447A (en) * 1986-07-07 1988-01-22 Nec Corp Hybrid integrated circuit device
US4949225A (en) * 1987-11-10 1990-08-14 Ibiden Co., Ltd. Circuit board for mounting electronic components
US4908933A (en) * 1988-05-12 1990-03-20 Ibiden Co., Ltd. Method of manufacturing a substrate for mounting electronic components
US5096852A (en) * 1988-06-02 1992-03-17 Burr-Brown Corporation Method of making plastic encapsulated multichip hybrid integrated circuits
US5093713A (en) * 1989-01-30 1992-03-03 Kabushiki Kaisha Toshiba Semiconductor device package
US5124783A (en) * 1989-01-30 1992-06-23 Kabushiki Kaisha Toshiba Semiconductor device having insulating substrate adhered to conductive substrate
US5022960A (en) * 1989-05-01 1991-06-11 Ibiden Co., Ltd. Method of manufacturing circuit board for mounting electronic components
US5088008A (en) * 1989-05-01 1992-02-11 Ibiden Co., Ltd. Circuit board for mounting electronic components
US5446309A (en) * 1992-06-22 1995-08-29 Matsushita Electric Industrial Co., Ltd. Semiconductor device including a first chip having an active element and a second chip having a passive element
EP1396885A1 (en) * 2002-09-03 2004-03-10 Hitachi, Ltd. Resin moulded automotive electronic control unit
US7439452B2 (en) 2002-09-03 2008-10-21 Hitachi, Ltd. Multi-chip module packaging with thermal expansion coefficiencies

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